From: lange360@hotmail.com (Amstel) Newsgroups: comp.arch.fpga Subject: Electronic Dice ( 3 die ) In VHDL Date: 14 Oct 2003 09:24:54 -0700 Organization: http://groups.google.com Lines: 11 Message-ID: <56f7756d.0310140824.7d8fe744@posting.google.com> NNTP-Posting-Host: 203.124.2.59 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8bit X-Trace: posting.google.com 1066148694 15319 127.0.0.1 (14 Oct 2003 16:24:54 GMT) X-Complaints-To: groups-abuse@google.com NNTP-Posting-Date: Tue, 14 Oct 2003 16:24:54 +0000 (UTC) Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!postnews1.google.com!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34336 Hi to all, I'm trying to make an electronic dice (3 die). Basically the dice has 3 seven-segment displays and the 3 dice values will run randomly so that we would always get different values combinations. However I tried and was unable to write the program in VHDL . I need help urgently .. Anyone know how to write the program ? Thanks a lot :-) ###### From: "Jonathan Bromley" Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL Date: Tue, 14 Oct 2003 17:56:31 +0100 Lines: 59 Message-ID: References: <56f7756d.0310140824.7d8fe744@posting.google.com> NNTP-Posting-Host: external-3.doulos.co.uk X-Trace: news.demon.co.uk 1066150553 25132 62.49.79.189 (14 Oct 2003 16:55:53 GMT) X-Complaints-To: abuse@demon.net NNTP-Posting-Date: Tue, 14 Oct 2003 16:55:53 +0000 (UTC) X-MimeOLE: Produced By Microsoft MimeOLE V5.50.4910.0300 X-Priority: 3 X-Newsreader: Microsoft Outlook Express 5.50.4807.1700 X-MSMail-Priority: Normal Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.mailgate.org!newsfeed.stueberl.de!kibo.news.demon.net!news.demon.co.uk!demon!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34340 "Amstel" wrote in message news:56f7756d.0310140824.7d8fe744@posting.google.com... > I'm trying to make an electronic dice (3 die). Basically the dice has > 3 seven-segment displays and the 3 dice values will run randomly so > that we would always get different values combinations. However I > tried and was unable to write the program in VHDL . Do you have any idea how incredibly hard this is? I guess you are expecting to use a fast oscillator, and let the dice "roll" very rapidly for as long as someone holds their finger on the button. But of course you need 3 separate oscillators, so that the three dice don't stay in lockstep. Next you need to ensure that the three oscillators don't in any way influence one another. This is amazingly hard, requiring very sophisticated engineering of the oscillators and their power supplies; they will need extremely careful shielding from one another, and you will need to ensure that any inductors in each oscillator's signal path are mutually perpendicular to inductors in the other two oscillators. (Presumably that's why you have been asked for only 3 dice, because adding a fourth would make the mutual-perpendicularity constraint quite hard to achieve in this universe). Once you have your three uncoupled oscillators, you will need to condition the user push button in such a way that it cannot affect the oscillators' behaviour, and it enables the counts in a way that is protected against the inevitable metastability you will see given that the oscillators and pushbutton are all asynchronous. There are also some tricky issues about whether the LED currents may affect the oscillators (via power supply coupling effects) in such a way that the outcome is biased. Oh... and once you've done all that, you have to create the trivial counters, enable logic and 7-segment decode. But I'm sure that you can do that easily, after all the other challenges. It's nice to see people posting these really exciting research-level problems on the group. -- Jonathan Bromley, Consultant DOULOS - Developing Design Know-how VHDL * Verilog * SystemC * Perl * Tcl/Tk * Verification * Project Services Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, Hampshire, BH24 1AW, UK Tel: +44 (0)1425 471223 mail: jonathan.bromley@doulos.com Fax: +44 (0)1425 471573 Web: http://www.doulos.com The contents of this message may contain personal views which are not the views of Doulos Ltd., unless specifically stated. ###### From: Peter Alfke Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL Date: Tue, 14 Oct 2003 11:03:57 -0700 Organization: Xilinx,Inc Lines: 67 Message-ID: <3F8C3A8E.46F71A51@xilinx.com> References: <56f7756d.0310140824.7d8fe744@posting.google.com> NNTP-Posting-Host: peter.xilinx.com Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Mailer: Mozilla 4.77C-CCK-MCD {C-UDP; EBM-APPLE} (Macintosh; U; PPC) X-Accept-Language: en To: Jonathan Bromley Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!irazu.switch.ch!switch.ch!news.belwue.de!newsfeed01.sul.t-online.de!t-online.de!newsfeed.media.kyoto-u.ac.jp!ctu-gate!news.nctu.edu.tw!feeder.seed.net.tw!attdv1!attdv2!ip.att.net!newsgate.xilinx.com!cliff.xsj.xilinx.com!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34345 Hi, Jonathan, let me disagree. I would run this with a single 200 MHz oscillator, and drive the indicators with a simple counter ( three mod 6 counters cascaded). The counter goes through all its 216 values once per microsecond, and I am sure that the human hand cannot cheat with fractional microsecond accuracy. Peter Alfke Jonathan Bromley wrote: > > "Amstel" wrote in message > news:56f7756d.0310140824.7d8fe744@posting.google.com... > > I'm trying to make an electronic dice (3 die). Basically the dice has > > 3 seven-segment displays and the 3 dice values will run randomly so > > that we would always get different values combinations. However I > > tried and was unable to write the program in VHDL . > > Do you have any idea how incredibly hard this is? > > I guess you are expecting to use a fast oscillator, and let > the dice "roll" very rapidly for as long as someone holds their > finger on the button. But of course you need 3 separate > oscillators, so that the three dice don't stay in lockstep. > > Next you need to ensure that the three oscillators don't in any > way influence one another. This is amazingly hard, requiring > very sophisticated engineering of the oscillators and their > power supplies; they will need extremely careful shielding > from one another, and you will need to ensure that any > inductors in each oscillator's signal path are mutually > perpendicular to inductors in the other two oscillators. > (Presumably that's why you have been asked for only 3 dice, > because adding a fourth would make the mutual-perpendicularity > constraint quite hard to achieve in this universe). > > Once you have your three uncoupled oscillators, you will need > to condition the user push button in such a way that it cannot > affect the oscillators' behaviour, and it enables the counts > in a way that is protected against the inevitable > metastability you will see given that the oscillators and > pushbutton are all asynchronous. > > There are also some tricky issues about whether the LED > currents may affect the oscillators (via power supply > coupling effects) in such a way that the outcome is > biased. > > Oh... and once you've done all that, you have to create > the trivial counters, enable logic and 7-segment decode. > But I'm sure that you can do that easily, after all the > other challenges. > > It's nice to see people posting these really exciting > research-level problems on the group. > -- > Jonathan Bromley, Consultant > > DOULOS - Developing Design Know-how > VHDL * Verilog * SystemC * Perl * Tcl/Tk * Verification * Project Services > > Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, Hampshire, BH24 1AW, UK > Tel: +44 (0)1425 471223 mail: jonathan.bromley@doulos.com > Fax: +44 (0)1425 471573 Web: http://www.doulos.com > > The contents of this message may contain personal views which > are not the views of Doulos Ltd., unless specifically stated. ###### Reply-To: "Nial Stewart" From: "Nial Stewart" Newsgroups: comp.arch.fpga References: <56f7756d.0310140824.7d8fe744@posting.google.com> <3F8C3A8E.46F71A51@xilinx.com> Subject: Re: Electronic Dice ( 3 die ) In VHDL Date: Tue, 14 Oct 2003 20:28:27 +0100 X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 5.00.2615.200 X-MimeOLE: Produced By Microsoft MimeOLE V5.00.2615.200 Lines: 30 Message-ID: <3f8c4d91$0$10956$fa0fcedb@lovejoy.zen.co.uk> Organization: Zen Internet NNTP-Posting-Host: 217.155.72.198 X-Trace: 1066159505 lovejoy.zen.co.uk 10956 217.155.72.198 X-Complaints-To: abuse@zen.co.uk Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.mailgate.org!newsfeed.icl.net!newsfeed.fjserv.net!newsfeed.icl.net!newsfeed.fjserv.net!news.tdcnorge.no!zen.net.uk!lovejoy.zen.co.uk.POSTED!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34352 Peter Alfke wrote in message news:3F8C3A8E.46F71A51@xilinx.com... > Hi, Jonathan, let me disagree. > I would run this with a single 200 MHz oscillator, and drive the > indicators with a simple counter ( three mod 6 counters cascaded). > The counter goes through all its 216 values once per microsecond, and I > am sure that the human hand cannot cheat with fractional microsecond accuracy. > > Peter Alfke Peter, Was Jonathan not being ironic? The original request reeked of 'late assignment'. Nial. ------------------------------------------------ Nial Stewart Developments Ltd FPGA and High Speed Digital Design www.nialstewartdevelopments.co.uk ###### From: Peter Alfke Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL Date: Tue, 14 Oct 2003 13:25:40 -0700 Organization: Xilinx,Inc Lines: 31 Message-ID: <3F8C5BC4.641FA8DA@xilinx.com> References: <56f7756d.0310140824.7d8fe744@posting.google.com> <3F8C3A8E.46F71A51@xilinx.com> <3f8c4d91$0$10956$fa0fcedb@lovejoy.zen.co.uk> NNTP-Posting-Host: peter.xilinx.com Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Mailer: Mozilla 4.77C-CCK-MCD {C-UDP; EBM-APPLE} (Macintosh; U; PPC) X-Accept-Language: en Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.mailgate.org!newsfeed.icl.net!newsfeed.fjserv.net!news.tele.dk!news.tele.dk!small.news.tele.dk!newsfeed.media.kyoto-u.ac.jp!ctu-gate!news.nctu.edu.tw!feeder.seed.net.tw!attdv1!ip.att.net!newsgate.xilinx.com!cliff.xsj.xilinx.com!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34356 I admit, my "irony detector" was temporarily asleep, and the German seriousness took over... But the scare story was really so neat. Beware of these super-urgent class assignments! Peter ================== Nial Stewart wrote: > > Peter Alfke wrote in message > news:3F8C3A8E.46F71A51@xilinx.com... > > Hi, Jonathan, let me disagree. > > I would run this with a single 200 MHz oscillator, and drive the > > indicators with a simple counter ( three mod 6 counters cascaded). > > The counter goes through all its 216 values once per microsecond, and I > > am sure that the human hand cannot cheat with fractional microsecond > accuracy. > > > > Peter Alfke > > Peter, > > Was Jonathan not being ironic? > > The original request reeked of 'late assignment'. > > Nial. > > ------------------------------------------------ > Nial Stewart Developments Ltd > FPGA and High Speed Digital Design > www.nialstewartdevelopments.co.uk ###### Message-ID: <3F8C69EF.1410@designtools.co.nz> From: Jim Granville Reply-To: jim.granville@designtools.co.nz Organization: Mandeno Granville elect X-Mailer: Mozilla 3.0C-XTRA (Win95; I) MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL References: <56f7756d.0310140824.7d8fe744@posting.google.com> <3F8C3A8E.46F71A51@xilinx.com> <3f8c4d91$0$10956$fa0fcedb@lovejoy.zen.co.uk> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 27 Date: Wed, 15 Oct 2003 10:26:07 +1300 NNTP-Posting-Host: 210.246.2.169 X-Complaints-To: abuse@tsnz.net X-Trace: news02.tsnz.net 1066166782 210.246.2.169 (Wed, 15 Oct 2003 10:26:22 NZDT) NNTP-Posting-Date: Wed, 15 Oct 2003 10:26:22 NZDT Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!irazu.switch.ch!switch.ch!in.100proofnews.com!in.100proofnews.com!news02.tsnz.net!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34359 Peter Alfke wrote in message > news:3F8C3A8E.46F71A51@xilinx.com... > > Hi, Jonathan, let me disagree. > > I would run this with a single 200 MHz oscillator, and drive the > > indicators with a simple counter ( three mod 6 counters cascaded). > > The counter goes through all its 216 values once per microsecond, and I > > am sure that the human hand cannot cheat with fractional microsecond > accuracy. No, but suppose this has a single push button ? Each spin is going to be close to random, but the designer might be a tad dissappointed at the correlation _across_ the 3 displays ? Maybe some prime number freq multiplies, to give three vfast clocks with different spin rates, would be sufficent. Could be a good exercise for the student, to check the cross-correlation of the 3 displays ? Nial Stewart wrote: > > The original request reeked of 'late assignment'. It certainly did :) -jg ###### From: symon_brewer@hotmail.com (Symon) Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL Date: 14 Oct 2003 14:30:58 -0700 Organization: http://groups.google.com Lines: 22 Message-ID: References: <56f7756d.0310140824.7d8fe744@posting.google.com> NNTP-Posting-Host: 67.121.164.17 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8bit X-Trace: posting.google.com 1066167059 30717 127.0.0.1 (14 Oct 2003 21:30:59 GMT) X-Complaints-To: groups-abuse@google.com NNTP-Posting-Date: Tue, 14 Oct 2003 21:30:59 +0000 (UTC) Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.mailgate.org!newsfeed.icl.net!newsfeed.fjserv.net!newsfeed.icl.net!newsfeed.fjserv.net!news.maxwell.syr.edu!postnews1.google.com!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34361 Jonathan, Please pay attention to the OPs spec. He/she said 'randomly'. This implies the measurement of some random process, I suggest radioactive decay measurement is the preferred solution. This is why Xilinx offer radiation hardened devices specifically so people can make reliable unbiased dice. (It's no coincidence the chips are also called 'dice'.) Note these parts are not usually offered in BGA packages, but in leaded ones. The lead protects against radiation. HTH, Syms. "Jonathan Bromley" wrote in message news:... > "Amstel" wrote in message > news:56f7756d.0310140824.7d8fe744@posting.google.com... > > I'm trying to make an electronic dice (3 die). Basically the dice has > > 3 seven-segment displays and the 3 dice values will run randomly so > > that we would always get different values combinations. However I > > tried and was unable to write the program in VHDL . > > Do you have any idea how incredibly hard this is? > snipped to avoid wrath of Uwe! ###### From: john_doebertson@yahoo.com (Chip) Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL Date: 14 Oct 2003 17:01:00 -0700 Organization: http://groups.google.com Lines: 26 Message-ID: <49cdb4ba.0310141601.6e630958@posting.google.com> References: <56f7756d.0310140824.7d8fe744@posting.google.com> NNTP-Posting-Host: 153.90.199.201 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8bit X-Trace: posting.google.com 1066176060 5429 127.0.0.1 (15 Oct 2003 00:01:00 GMT) X-Complaints-To: groups-abuse@google.com NNTP-Posting-Date: Wed, 15 Oct 2003 00:01:00 +0000 (UTC) Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.imp.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!postnews1.google.com!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34372 How about using linear feedback shift registers instead of counters. I've never actually used one so someone correct me if I'm wrong. They could be driven by a single clock. They each could be initialized with a different seed and could be long enough to run for a long time before repeating. They would still be coupled in the respect that each time the electronic dice is powered up each shift register will output the same pseudo random sequence. Then a roll consists of registering some of the lfsr bits when the dice button is released (the lsfr is still changing while the button is not pressed) Thus, if you could roll the dice at exactly the same times throughout an entire game you would get the same (pseuorandom) sequence of dice values. (But this would be highly unlikely) lange360@hotmail.com (Amstel) wrote in message news:<56f7756d.0310140824.7d8fe744@posting.google.com>... > Hi to all, > > I'm trying to make an electronic dice (3 die). Basically the dice has > 3 seven-segment displays and the 3 dice values will run randomly so > that we would always get different values combinations. However I > tried and was unable to write the program in VHDL . > > I need help urgently .. > Anyone know how to write the program ? > > Thanks a lot :-) ###### Sender: eric@ruckus.brouhaha.com From: Eric Smith Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL References: <56f7756d.0310140824.7d8fe744@posting.google.com> <49cdb4ba.0310141601.6e630958@posting.google.com> Organization: Eric Conspiracy Secret Labs X-Eric-Conspiracy: There is no conspiracy. Date: 14 Oct 2003 19:27:21 -0700 Message-ID: Lines: 6 User-Agent: Gnus/5.09 (Gnus v5.9.0) Emacs/21.2 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii NNTP-Posting-Host: 64.62.206.2 X-Trace: 14 Oct 2003 19:37:36 -0700, 64.62.206.2 Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.mailgate.org!newsfeed.icl.net!newsfeed.fjserv.net!newsfeed.freenet.de!newsfeed.stueberl.de!npeer.de.kpn-eurorings.net!newsfeed.kabelfoon.nl!195.129.110.21.MISMATCH!bnewsfeed00.bru.ops.eu.uu.net!bnewsinpeer01.bru.ops.eu.uu.net!emea.uu.net!ash.uu.net!newssorter-3001.bay.webtv.net!news.spies.com!64.62.206.2 Xref: redlance.franklin.ch comp.arch.fpga:34377 john_doebertson@yahoo.com (Chip) writes: > How about using linear feedback shift registers instead of counters. > I've never actually used one so someone correct me if I'm wrong. Wouldn't make any difference. Either way you can cycle through all 216 combinations very rapidly. ###### From: "Vinh Pham" Newsgroups: comp.arch.fpga References: <56f7756d.0310140824.7d8fe744@posting.google.com> <3F8C3A8E.46F71A51@xilinx.com> <3f8c4d91$0$10956$fa0fcedb@lovejoy.zen.co.uk> Subject: Re: Electronic Dice ( 3 die ) In VHDL Lines: 60 X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 6.00.2800.1158 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2800.1165 Message-ID: Date: Wed, 15 Oct 2003 02:27:26 GMT NNTP-Posting-Host: 66.8.207.16 X-Complaints-To: abuse@rr.com X-Trace: twister.socal.rr.com 1066184846 66.8.207.16 (Tue, 14 Oct 2003 19:27:26 PDT) NNTP-Posting-Date: Tue, 14 Oct 2003 19:27:26 PDT Organization: RoadRunner - West Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.ifi.unizh.ch!news.imp.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newshub.sdsu.edu!elnk-nf2-pas!elnk-pas-nf1!newsfeed.earthlink.net!cyclone.socal.rr.com!cyclone2.kc.rr.com!news2.kc.rr.com!twister.socal.rr.com.POSTED!53ab2750!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34378 > The original request reeked of 'late assignment'. I have to disagree with you. I think what we're seeing here is an enabling technology for a low latency, distributed, customer support system. Every time an end user has a problem with your equipment, instead of waiting on hold for a customer support representative, they receive immediate assistance by simply pressing a button and a 3-digit Instant Solution Code (tm) is generated. For example: Code #003 - Insufficient Memory The function you have chosen requires a Premium Platinum+ RAM Upgrade (tm). Internal diagnostics shows your equipment is a baseline model that contains only enough RAM to operate the Instant Solution Code (tm) functionality. Your local sales representative will be more than happy to assist you in improving your user experience. Code #012 - Undocumented Feature Congratulations End-User! You have discovered an undocumented feature. Please be kind enough to send us your day time phone number so we may forward to you all calls from other End-Users that also need to be educated. Win the adulation of your peers and support the user community today! Code #048 - Attention Deficit Disorder Please RTFM. Thank you. Code #192 - User Error Please forward the following message to your immediate supervisor: "Attention, I am a defective End-User. I do not meet the minimum system requirements. Please replace me with someone that has 5 more years of experience and a more advanced higher education degree, or two recent graduates." Code #768 - Product Defect You have possibly discovered a fault in our product. To be sure, press the Instant Solution Code (tm) button again to verify. If it generates Code #1000 then please contact us immediately. Otherwise, it's probably your fault. No longer does a user have to waste an inordinate amount of time becoming frustrated. Rather they can be frustrated immediately and use their precious time being productive in other ways. Forward thinking that keeps the customer's needs first is what will separate first class companies from second rate ones in this difficult economy. Regards, Vinh ###### Sender: eric@ruckus.brouhaha.com From: Eric Smith Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL References: <56f7756d.0310140824.7d8fe744@posting.google.com> <3F8C3A8E.46F71A51@xilinx.com> <3f8c4d91$0$10956$fa0fcedb@lovejoy.zen.co.uk> <3F8C69EF.1410@designtools.co.nz> Organization: Eric Conspiracy Secret Labs X-Eric-Conspiracy: There is no conspiracy. Date: 14 Oct 2003 19:28:50 -0700 Message-ID: Lines: 10 User-Agent: Gnus/5.09 (Gnus v5.9.0) Emacs/21.2 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii NNTP-Posting-Host: 64.62.206.2 X-Trace: 14 Oct 2003 19:39:06 -0700, 64.62.206.2 Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.imp.ch!news.imp.ch!nntp-out.monmouth.com!newspeer.monmouth.com!newsfeed.mathworks.com!news.kjsl.com!news.spies.com!64.62.206.2 Xref: redlance.franklin.ch comp.arch.fpga:34379 Jim Granville writes: > No, but suppose this has a single push button ? > Each spin is going to be close to random, but the designer might be > a tad dissappointed at the correlation _across_ the 3 displays ? Why would there be a correlation? You hold the button for tens or hundreds of milliseconds, and the display will cycle through all 216 possible combinations in less than a microsecond. There will be no measurable correlation between the individual dice unless the counter doesn't work correctly. ###### From: "Vinh Pham" Newsgroups: comp.arch.fpga References: <56f7756d.0310140824.7d8fe744@posting.google.com> <3F8C3A8E.46F71A51@xilinx.com> Subject: Re: Electronic Dice ( 3 die ) In VHDL Lines: 11 X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 6.00.2800.1158 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2800.1165 Message-ID: Date: Wed, 15 Oct 2003 02:49:25 GMT NNTP-Posting-Host: 66.8.207.16 X-Complaints-To: abuse@rr.com X-Trace: twister.socal.rr.com 1066186165 66.8.207.16 (Tue, 14 Oct 2003 19:49:25 PDT) NNTP-Posting-Date: Tue, 14 Oct 2003 19:49:25 PDT Organization: RoadRunner - West Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!irazu.switch.ch!switch.ch!solnet.ch!solnet.ch!newsfeed.tiscali.ch!npeer.de.kpn-eurorings.net!newsfeed.vmunix.org!peer02.cox.net!cox.net!news-server.columbus.rr.com!cyclone2.kc.rr.com!news2.kc.rr.com!twister.socal.rr.com.POSTED!53ab2750!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34380 > indicators with a simple counter ( three mod 6 counters cascaded). > The counter goes through all its 216 values once per microsecond, and I Why are we assuming that he's simulating six-sided dice? He could be talking about 1d4 or 1d8. Are there no gamers among us? Hmm then again a two-handed sword does 3d6 damage, so 1d6 would make sense. I have underestimated by peers. --Vinh ###### Message-ID: <3F8CB923.2C4D@designtools.co.nz> From: Jim Granville Reply-To: jim.granville@designtools.co.nz Organization: Mandeno Granville elect X-Mailer: Mozilla 3.0C-XTRA (Win95; I) MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL References: <56f7756d.0310140824.7d8fe744@posting.google.com> <3F8C3A8E.46F71A51@xilinx.com> <3f8c4d91$0$10956$fa0fcedb@lovejoy.zen.co.uk> <3F8C69EF.1410@designtools.co.nz> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 17 Date: Wed, 15 Oct 2003 16:04:03 +1300 NNTP-Posting-Host: 210.246.6.241 X-Complaints-To: abuse@tsnz.net X-Trace: news02.tsnz.net 1066187058 210.246.6.241 (Wed, 15 Oct 2003 16:04:18 NZDT) NNTP-Posting-Date: Wed, 15 Oct 2003 16:04:18 NZDT Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!irazu.switch.ch!switch.ch!in.100proofnews.com!in.100proofnews.com!news02.tsnz.net!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34382 Eric Smith wrote: > > Jim Granville writes: > > No, but suppose this has a single push button ? > > Each spin is going to be close to random, but the designer might be > > a tad dissappointed at the correlation _across_ the 3 displays ? > > Why would there be a correlation? You hold the button for tens or > hundreds of milliseconds, and the display will cycle through all 216 > possible combinations in less than a microsecond. There will be no > measurable correlation between the individual dice unless the counter > doesn't work correctly. You are right - I missread Peter's example, and did not register the word cascaded. -jg ###### From: nweaver@ribbit.CS.Berkeley.EDU (Nicholas C. Weaver) Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL Date: Wed, 15 Oct 2003 04:36:49 +0000 (UTC) Organization: University of California, Berkeley, EECS Department Lines: 19 Message-ID: References: <56f7756d.0310140824.7d8fe744@posting.google.com> <3F8C3A8E.46F71A51@xilinx.com> NNTP-Posting-Host: ribbit.cs.berkeley.edu X-Trace: agate.berkeley.edu 1066192609 31755 128.32.112.203 (15 Oct 2003 04:36:49 GMT) X-Complaints-To: usenet@agate.berkeley.edu NNTP-Posting-Date: Wed, 15 Oct 2003 04:36:49 +0000 (UTC) X-Newsreader: trn 4.0-test76 (Apr 2, 2001) Originator: nweaver@ribbit.CS.Berkeley.EDU (Nicholas C. Weaver) Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.imp.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed.stanford.edu!newsfeed.berkeley.edu!ucberkeley!agate.berkeley.edu!agate!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34385 In article , Vinh Pham wrote: >> indicators with a simple counter ( three mod 6 counters cascaded). >> The counter goes through all its 216 values once per microsecond, and I > >Why are we assuming that he's simulating six-sided dice? He could be >talking about 1d4 or 1d8. Are there no gamers among us? Hmm then again a >two-handed sword does 3d6 damage, so 1d6 would make sense. I have >underestimated by peers. It's a seven segment display, so it might be up to 1d16 To do it right, it would have to be a programmable (by DIP switches) between 1d2 and 1d16. Bonus points for only allowing configurations where an actual polygon would make a legal die (all sides the same area). -- Nicholas C. Weaver nweaver@cs.berkeley.edu ###### Message-ID: <3F8CD115.73329133@andraka.com> From: Ray Andraka Organization: Andraka Consulting Group, Inc X-Mailer: Mozilla 4.77 [en] (WinNT; U) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL References: <56f7756d.0310140824.7d8fe744@posting.google.com> <49cdb4ba.0310141601.6e630958@posting.google.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 47 Date: Wed, 15 Oct 2003 00:46:13 -0400 NNTP-Posting-Host: 68.15.41.165 X-Complaints-To: abuse@cox.net X-Trace: lakeread05 1066192559 68.15.41.165 (Wed, 15 Oct 2003 00:35:59 EDT) NNTP-Posting-Date: Wed, 15 Oct 2003 00:35:59 EDT Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.ifi.unizh.ch!news.imp.ch!news.imp.ch!newsfeed.vmunix.org!peer02.cox.net!cox.net!p01!lakeread05.POSTED!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34384 no need to. The cycle time is short if clocked fast enough and the human interface injects enough randomness to achieve a random result. See Peter's post above. Why seven segment LEDs though? It would be more appropriate to use 7 LEDs arranged like the 'six' and 'one' sides of the die superimposed. Chip wrote: > How about using linear feedback shift registers instead of counters. > I've never actually used one so someone correct me if I'm wrong. > > They could be driven by a single clock. They each could be > initialized with a different seed and could be long enough to run for > a long time before repeating. They would still be coupled in the > respect that each time the electronic dice is powered up each shift > register will output the same pseudo random sequence. Then a roll > consists of registering some of the lfsr bits when the dice button is > released (the lsfr is still changing while the button is not pressed) > Thus, if you could roll the dice at exactly the same times throughout > an entire game you would get the same (pseuorandom) sequence of dice > values. (But this would be highly unlikely) > > lange360@hotmail.com (Amstel) wrote in message news:<56f7756d.0310140824.7d8fe744@posting.google.com>... > > Hi to all, > > > > I'm trying to make an electronic dice (3 die). Basically the dice has > > 3 seven-segment displays and the 3 dice values will run randomly so > > that we would always get different values combinations. However I > > tried and was unable to write the program in VHDL . > > > > I need help urgently .. > > Anyone know how to write the program ? > > > > Thanks a lot :-) -- --Ray Andraka, P.E. President, the Andraka Consulting Group, Inc. 401/884-7930 Fax 401/884-7950 email ray@andraka.com http://www.andraka.com "They that give up essential liberty to obtain a little temporary safety deserve neither liberty nor safety." -Benjamin Franklin, 1759 ###### From: "Vinh Pham" Newsgroups: comp.arch.fpga References: <56f7756d.0310140824.7d8fe744@posting.google.com> <3F8C3A8E.46F71A51@xilinx.com> Subject: Re: Electronic Dice ( 3 die ) In VHDL Lines: 13 X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 6.00.2800.1158 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2800.1165 Message-ID: Date: Wed, 15 Oct 2003 04:57:47 GMT NNTP-Posting-Host: 66.8.207.16 X-Complaints-To: abuse@rr.com X-Trace: twister.socal.rr.com 1066193867 66.8.207.16 (Tue, 14 Oct 2003 21:57:47 PDT) NNTP-Posting-Date: Tue, 14 Oct 2003 21:57:47 PDT Organization: RoadRunner - West Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!irazu.switch.ch!switch.ch!news.tele.dk!news.tele.dk!small.news.tele.dk!newsfeed.stanford.edu!headwall.stanford.edu!newshub.sdsu.edu!elnk-nf2-pas!elnk-pas-nf1!newsfeed.earthlink.net!cyclone.socal.rr.com!cyclone2.kc.rr.com!news2.kc.rr.com!twister.socal.rr.com.POSTED!53ab2750!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34388 > It's a seven segment display, so it might be up to 1d16 ... > between 1d2 and 1d16. Bonus points for only allowing configurations > where an actual polygon would make a legal die (all sides the same > area). Whew. I was freaking out for a moment there. I thought there was a gap in my gaming lore, that I had somehow gone through life ignorant of the 16-sided die :_) ###### From: symon_brewer@hotmail.com (Symon) Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL Date: 14 Oct 2003 22:05:10 -0700 Organization: http://groups.google.com Lines: 35 Message-ID: References: <56f7756d.0310140824.7d8fe744@posting.google.com> <3F8C3A8E.46F71A51@xilinx.com> <3f8c4d91$0$10956$fa0fcedb@lovejoy.zen.co.uk> <3F8C5BC4.641FA8DA@xilinx.com> NNTP-Posting-Host: 67.30.103.17 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8bit X-Trace: posting.google.com 1066194310 18639 127.0.0.1 (15 Oct 2003 05:05:10 GMT) X-Complaints-To: groups-abuse@google.com NNTP-Posting-Date: Wed, 15 Oct 2003 05:05:10 +0000 (UTC) Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!postnews1.google.com!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34390 Ah, the clues were there! 'UK' anywhere in the post is a giveaway! Bloody island monkeys! Cheers, Syms. Peter Alfke wrote in message news:<3F8C5BC4.641FA8DA@xilinx.com>... > I admit, my "irony detector" was temporarily asleep, and the German > seriousness took over... > But the scare story was really so neat. > Beware of these super-urgent class assignments! > Peter > ================== > Nial Stewart wrote: > > > > Peter Alfke wrote in message > > news:3F8C3A8E.46F71A51@xilinx.com... > > > Hi, Jonathan, let me disagree. > > > I would run this with a single 200 MHz oscillator, and drive the > > > indicators with a simple counter ( three mod 6 counters cascaded). > > > The counter goes through all its 216 values once per microsecond, and I > > > am sure that the human hand cannot cheat with fractional microsecond > accuracy. > > > > > > Peter Alfke > > > > Peter, > > > > Was Jonathan not being ironic? > > > > The original request reeked of 'late assignment'. > > > > Nial. > > > > ------------------------------------------------ > > Nial Stewart Developments Ltd > > FPGA and High Speed Digital Design > > www.nialstewartdevelopments.co.uk ###### From: "Vinh Pham" Newsgroups: comp.arch.fpga References: <56f7756d.0310140824.7d8fe744@posting.google.com> <49cdb4ba.0310141601.6e630958@posting.google.com> Subject: Re: Electronic Dice ( 3 die ) In VHDL Lines: 23 X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 6.00.2800.1158 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2800.1165 Message-ID: Date: Wed, 15 Oct 2003 05:46:19 GMT NNTP-Posting-Host: 66.8.207.16 X-Complaints-To: abuse@rr.com X-Trace: twister.socal.rr.com 1066196779 66.8.207.16 (Tue, 14 Oct 2003 22:46:19 PDT) NNTP-Posting-Date: Tue, 14 Oct 2003 22:46:19 PDT Organization: RoadRunner - West Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.imp.ch!news.imp.ch!newsfeed.stueberl.de!peer01.cox.net!peer02.cox.net!cox.net!news-server.columbus.rr.com!cyclone2.kc.rr.com!news2.kc.rr.com!twister.socal.rr.com.POSTED!53ab2750!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34392 > How about using linear feedback shift registers instead of counters. One thing to keep in mind is that the LFSRs we mostly hear about are usually base-2. So if you're trying to emulate a 6-sided dice, you'll have to pick another number if an invalid value comes up. I have seen a base-5 LFSR combined with a base-2 one to create a base-10 one. I suppose you could do the same thing with a base-3 and base-2 for a six sided dice. I don't know the math involved in designing non base-2 LFSRs though. Plugging "lfsr gf(p)" into Google shows some promise but most of it is pretty math heavy and hard to read. gf() stands for Galois Field. I suppose there's no real difference with base-2 LFSRs. There's some sort of polynomial that dictates the taps for the LFSR and your adders are modulo-p instead of modulo-2 perhaps? Hopefully someone else can explain it more clearly. --Vinh ###### From: jetmarc@hotmail.com (jetmarc) Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL Date: 15 Oct 2003 03:10:17 -0700 Organization: http://groups.google.com Lines: 24 Message-ID: References: <56f7756d.0310140824.7d8fe744@posting.google.com> NNTP-Posting-Host: 80.58.13.44 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8bit X-Trace: posting.google.com 1066212617 31883 127.0.0.1 (15 Oct 2003 10:10:17 GMT) X-Complaints-To: groups-abuse@google.com NNTP-Posting-Date: Wed, 15 Oct 2003 10:10:17 +0000 (UTC) Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.imp.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!postnews1.google.com!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34396 > I'm trying to make an electronic dice (3 die). Basically the dice has > 3 seven-segment displays and the 3 dice values will run randomly so > that we would always get different values combinations. However I > tried and was unable to write the program in VHDL . Use an LFSR type pseudo random number generator (PRNG). [you will find a lot of documentation and VHDL example code in the crypto community, just google for the two acronyms]. Clock it at an arbitrarty rate. Write VHDL code to convert the output of the PRNG into dice values. Probably the easiest is to take 3 bits of output to form 1 dice value (0-5 => 1-6) and flag the other states as illegal. Clocking the PRNG should not stop until all 3 dice are legal. That solves the bias-by-mapping problem without adding lots of complexity to the logic. Write code to output the dice value on the 7-seg LCD. Write code to stop the PRNG on user request (respecting the legal state thing mentioned above). Quite easy once you know how to do the "random" portion of it. Marc ###### Message-ID: <3F8D450E.7BD39107@andraka.com> From: Ray Andraka Organization: Andraka Consulting Group, Inc X-Mailer: Mozilla 4.77 [en] (WinNT; U) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL References: <56f7756d.0310140824.7d8fe744@posting.google.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 46 Date: Wed, 15 Oct 2003 09:01:03 -0400 NNTP-Posting-Host: 68.15.41.165 X-Complaints-To: abuse@cox.net X-Trace: lakeread05 1066222247 68.15.41.165 (Wed, 15 Oct 2003 08:50:47 EDT) NNTP-Posting-Date: Wed, 15 Oct 2003 08:50:47 EDT Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.mailgate.org!newsfeed.stueberl.de!peer01.cox.net!cox.net!p01!lakeread05.POSTED!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34401 An LFSR output is only "random" for a single bit out per clock. The remaining bits are delayed copies of the first bit. In order to use an LFSR and really have a random stream of 3 bit numbers you'd need to clock it 3x per die. If you go further to reject 'illegal' combinations, then you are skewing the probabilities of the legal combinations so that they are no longer uniform. jetmarc wrote: > > I'm trying to make an electronic dice (3 die). Basically the dice has > > 3 seven-segment displays and the 3 dice values will run randomly so > > that we would always get different values combinations. However I > > tried and was unable to write the program in VHDL . > > Use an LFSR type pseudo random number generator (PRNG). [you will find > a lot of documentation and VHDL example code in the crypto community, > just google for the two acronyms]. > > Clock it at an arbitrarty rate. Write VHDL code to convert the > output of the PRNG into dice values. Probably the easiest is to take > 3 bits of output to form 1 dice value (0-5 => 1-6) and flag the other > states as illegal. Clocking the PRNG should not stop until all 3 dice > are legal. That solves the bias-by-mapping problem without adding > lots of complexity to the logic. > > Write code to output the dice value on the 7-seg LCD. > > Write code to stop the PRNG on user request (respecting the legal > state thing mentioned above). > > Quite easy once you know how to do the "random" portion of it. > > Marc -- --Ray Andraka, P.E. President, the Andraka Consulting Group, Inc. 401/884-7930 Fax 401/884-7950 email ray@andraka.com http://www.andraka.com "They that give up essential liberty to obtain a little temporary safety deserve neither liberty nor safety." -Benjamin Franklin, 1759 ###### From: "Jonathan Bromley" Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL Date: Wed, 15 Oct 2003 14:22:41 +0100 Lines: 45 Message-ID: References: <56f7756d.0310140824.7d8fe744@posting.google.com> NNTP-Posting-Host: external-3.doulos.co.uk X-Trace: news.demon.co.uk 1066224123 6952 62.49.79.189 (15 Oct 2003 13:22:03 GMT) X-Complaints-To: abuse@demon.net NNTP-Posting-Date: Wed, 15 Oct 2003 13:22:03 +0000 (UTC) X-MimeOLE: Produced By Microsoft MimeOLE V5.50.4910.0300 X-Priority: 3 X-Newsreader: Microsoft Outlook Express 5.50.4807.1700 X-MSMail-Priority: Normal Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.mailgate.org!newsfeed.icl.net!newsfeed.fjserv.net!kibo.news.demon.net!news.demon.co.uk!demon!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34402 "Symon" wrote in message news:a28bc07f.0310141330.6158537d@posting.google.com... > Jonathan, > Please pay attention to the OPs spec. He/she said 'randomly'. This > implies the measurement of some random process, I suggest radioactive > decay measurement is the preferred solution. My humblest apologies to all, and the OP in particular. You are of course quite correct. Unfortunately, this makes the problem even harder. As I'm sure you're aware, standard methods for detecting the randomness of radioactive decay mandate the use of a cat, a sealed box and a vial of some toxic substance. Since the cat has a 0.5 probability of survival in each measurement to determine one bit, and a 6-position die requires an average of approximately 2.5849625007211561814537389439478 bits of data, it's clear that this mechanism will entail a mean loss of 1.2924812503605780907268694719739 cats per displayed value, or nearly 4 cats per 3-dice roll. In order to achieve this with a 20% margin of spare bandwidth, it's clearly necessary to use CAT-5 cable for all the interfaces. > This is why Xilinx offer radiation hardened devices > specifically so people can make reliable unbiased dice. > (It's no coincidence the chips are also called 'dice'.) > Note these parts are not usually offered in BGA packages, > but in leaded ones. The lead protects against radiation. Superb. ROFL. -- Jonathan Bromley, Consultant DOULOS - Developing Design Know-how VHDL * Verilog * SystemC * Perl * Tcl/Tk * Verification * Project Services Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, Hampshire, BH24 1AW, UK Tel: +44 (0)1425 471223 mail: jonathan.bromley@doulos.com Fax: +44 (0)1425 471573 Web: http://www.doulos.com The contents of this message may contain personal views which are not the views of Doulos Ltd., unless specifically stated. ###### From: "PO Laprise" Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL Date: Wed, 15 Oct 2003 08:24:23 -0700 Organization: (none) Lines: 1 Message-ID: References: <56f7756d.0310140824.7d8fe744@posting.google.com> <3F8D450E.7BD39107@andraka.com> NNTP-Posting-Host: www.xtra.xilinx.com Mime-Version: 1.0 Content-Type: text/html; charset="ISO-8859-1" Content-Transfer-Encoding: 8bit Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!irazu.switch.ch!switch.ch!newsfeed00.sul.t-online.de!t-online.de!newsfeed.icl.net!newsfeed.fjserv.net!logbridge.uoregon.edu!arclight.uoregon.edu!news.asu.edu!ennfs.eas.asu.edu!noao.edu!ucar!frgp!attdv1!attdv2!ip.att.net!newsgate.xilinx.com!WebX Xref: redlance.franklin.ch comp.arch.fpga:34418 How about using one LFSR per die pip? Using the SRL16s in Xilinx chips (don't know A, sorry), that would mean somewhere around 9 slices (for 3x6 pips), plus overhead, decoding logic, etc..., if I'm not mistaken? Incidentally, would using different polynomials effectively (as far as the human is concerned) decorrelate the LFSRs? Or would varying lengths (16, 32, etc...) do the trick? Or even, would different seeds be enough? I've never gotten around to studying the math, and never been great with statistics anyway...

Pierre-Olivier

-- to contact me directly, remove the obvious from my email -- ###### Reply-To: "John_H" From: "John_H" Newsgroups: comp.arch.fpga References: <56f7756d.0310140824.7d8fe744@posting.google.com> <3F8C3A8E.46F71A51@xilinx.com> Subject: Re: Electronic Dice ( 3 die ) In VHDL Lines: 27 X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 6.00.2800.1158 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2800.1165 Message-ID: Date: Wed, 15 Oct 2003 15:44:07 GMT NNTP-Posting-Host: 192.65.17.17 X-Complaints-To: postmaster@opbu.xerox.com X-Trace: news-west.eli.net 1066232647 192.65.17.17 (Wed, 15 Oct 2003 09:44:07 MDT) NNTP-Posting-Date: Wed, 15 Oct 2003 09:44:07 MDT Organization: Xerox Officeprinting NewsReader Service Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.mailgate.org!newsfeed.icl.net!newsfeed.fjserv.net!newsfeed.icl.net!newsfeed.fjserv.net!news.maxwell.syr.edu!news-out1.nntp.be!propagator2-sterling!news-in-sterling.newsfeed.com!newshosting.com!news-xfer2.atl.newshosting.com!news-feed01.roc.ny.frontiernet.net!nntp.frontiernet.net!news-west.eli.net!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34417 "Vinh Pham" wrote in message news:ft4jb.12621$ZH4.10910@twister.socal.rr.com... > > It's a seven segment display, so it might be up to 1d16 > > ... > > > between 1d2 and 1d16. Bonus points for only allowing configurations > > where an actual polygon would make a legal die (all sides the same > > area). > > Whew. I was freaking out for a moment there. I thought there was a gap in > my gaming lore, that I had somehow gone through life ignorant of the > 16-sided die :_) Just because 16 sided dice aren't used doesn't mean they can't be done. I could supply three different types of 16 sided polyhedra, all with equal faces. I was, after all, responsible for getting the 30 sided die on the market (back in the summer of '82). Now it's FPGA design for me. - John_H ###### From: "Vinh Pham" Newsgroups: comp.arch.fpga References: <56f7756d.0310140824.7d8fe744@posting.google.com> <3F8D450E.7BD39107@andraka.com> Subject: Re: Electronic Dice ( 3 die ) In VHDL Lines: 32 X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 6.00.2800.1158 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2800.1165 Message-ID: Date: Wed, 15 Oct 2003 15:51:51 GMT NNTP-Posting-Host: 66.8.207.16 X-Complaints-To: abuse@rr.com X-Trace: twister.socal.rr.com 1066233111 66.8.207.16 (Wed, 15 Oct 2003 08:51:51 PDT) NNTP-Posting-Date: Wed, 15 Oct 2003 08:51:51 PDT Organization: RoadRunner - West Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!irazu.switch.ch!switch.ch!in.100proofnews.com!in.100proofnews.com!news-xfer.cox.net!peer02.cox.net!cox.net!news-server.columbus.rr.com!cyclone2.kc.rr.com!news2.kc.rr.com!twister.socal.rr.com.POSTED!53ab2750!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34419 > An LFSR output is only "random" for a single bit out per clock. The > remaining bits are delayed copies of the first bit. In order to use an There are two forms of an LFSR. One where the bits are just delayed versions and you have a huge adder that feeds the chain (good ol' Google says this is called the Fibonacci form). And there's another one where there are adders inbetween the registers so that the bits are not delayed versions of each other (called the Galois form). Even in the case of the Fibonacci form, I have a feeling that grabbing a few adjacent bits will still produce a "random" number. Of course it depends on what you consider random, and I don't know much about the measurements they use for that. > it 3x per die. If you go further to reject 'illegal' combinations, then > you are skewing the probabilities of the legal combinations so that they > are no longer uniform. Rejecting illegal combinations should be okay. The legal combinations will remain uniform. Unfortunately I don't know a good way to explain this. But you can take a six sided dice, reject values of 5 and 6, and have it act like a uniform four sided dice. The only problem with the rejection method is you're not guaranteed a valid value every clock cycle, which is no big deal in this human operated push button application, but for some deterministic applications, you can't afford to wait for a "reroll" of the number. --Vinh ###### Message-ID: <3F8D875B.219DCFEE@andraka.com> From: Ray Andraka Organization: Andraka Consulting Group, Inc X-Mailer: Mozilla 4.77 [en] (WinNT; U) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL References: <56f7756d.0310140824.7d8fe744@posting.google.com> <3F8D450E.7BD39107@andraka.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 40 Date: Wed, 15 Oct 2003 13:43:55 -0400 NNTP-Posting-Host: 68.15.41.165 X-Complaints-To: abuse@cox.net X-Trace: lakeread05 1066239219 68.15.41.165 (Wed, 15 Oct 2003 13:33:39 EDT) NNTP-Posting-Date: Wed, 15 Oct 2003 13:33:39 EDT Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.imp.ch!news.imp.ch!zen.net.uk!cox.net!news-xfer.cox.net!p01!lakeread05.POSTED!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34426 You could either use 3 copies of a long LFSR with unique seeds that are placed sufficiently far apart to produce uncorrelated sequences *within the observation period*, or you could use LFSRs with 3 different relatively prime lengths. There is a very limited set of polynomials that will produce an LFSR of a given length, and the resulting sequence is usually a permutation of the same sequence, so it does not provide much randomness. PO Laprise wrote: > How about using one LFSR per die pip? Using the SRL16s in > Xilinx chips (don't know A, sorry), that would mean > somewhere around 9 slices (for 3x6 pips), plus overhead, > decoding logic, etc..., if I'm not mistaken? Incidentally, > would using different polynomials effectively (as far as > the human is concerned) decorrelate the LFSRs? Or would > varying lengths (16, 32, etc...) do the trick? Or even, > would different seeds be enough? I've never gotten around > to studying the math, and never been great with statistics > anyway... > > Pierre-Olivier > > -- to contact me directly, remove the obvious from my > email -- -- --Ray Andraka, P.E. President, the Andraka Consulting Group, Inc. 401/884-7930 Fax 401/884-7950 email ray@andraka.com http://www.andraka.com "They that give up essential liberty to obtain a little temporary safety deserve neither liberty nor safety." -Benjamin Franklin, 1759 ###### Message-ID: <3F8D889D.F4841F06@andraka.com> From: Ray Andraka Organization: Andraka Consulting Group, Inc X-Mailer: Mozilla 4.77 [en] (WinNT; U) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL References: <56f7756d.0310140824.7d8fe744@posting.google.com> <3F8D450E.7BD39107@andraka.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 53 Date: Wed, 15 Oct 2003 13:49:17 -0400 NNTP-Posting-Host: 68.15.41.165 X-Complaints-To: abuse@cox.net X-Trace: lakeread05 1066239541 68.15.41.165 (Wed, 15 Oct 2003 13:39:01 EDT) NNTP-Posting-Date: Wed, 15 Oct 2003 13:39:01 EDT Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.imp.ch!news.imp.ch!newsfeed.vmunix.org!peer02.cox.net!cox.net!p01!lakeread05.POSTED!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34428 Well, not really an adder. It is an XOR or XNOR combination of the terms in the polynomial. In either case, grabbing adjacent bits will give a random as long as you let N clocks go by between successive samples (N is the number of bits taken from the LFSR). Note that this is the same as taking one bit at a time and filling a shift register. The restriction is that you get one new bit for each time you clock the LFSR, the remaining bits are shifted copies of the first bit. If you take more bits out per sample than you have clocks per sample, you will get a correlation between successive samples. Vinh Pham wrote: > > An LFSR output is only "random" for a single bit out per clock. The > > remaining bits are delayed copies of the first bit. In order to use an > > There are two forms of an LFSR. One where the bits are just delayed > versions and you have a huge adder that feeds the chain (good ol' Google > says this is called the Fibonacci form). And there's another one where > there are adders inbetween the registers so that the bits are not delayed > versions of each other (called the Galois form). > > Even in the case of the Fibonacci form, I have a feeling that grabbing a few > adjacent bits will still produce a "random" number. Of course it depends on > what you consider random, and I don't know much about the measurements they > use for that. > > > it 3x per die. If you go further to reject 'illegal' combinations, then > > you are skewing the probabilities of the legal combinations so that they > > are no longer uniform. > > Rejecting illegal combinations should be okay. The legal combinations will > remain uniform. Unfortunately I don't know a good way to explain this. But > you can take a six sided dice, reject values of 5 and 6, and have it act > like a uniform four sided dice. > > The only problem with the rejection method is you're not guaranteed a valid > value every clock cycle, which is no big deal in this human operated push > button application, but for some deterministic applications, you can't > afford to wait for a "reroll" of the number. > > --Vinh -- --Ray Andraka, P.E. President, the Andraka Consulting Group, Inc. 401/884-7930 Fax 401/884-7950 email ray@andraka.com http://www.andraka.com "They that give up essential liberty to obtain a little temporary safety deserve neither liberty nor safety." -Benjamin Franklin, 1759 ###### From: Bob Perlman Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL Message-ID: References: <56f7756d.0310140824.7d8fe744@posting.google.com> X-Newsreader: Forte Agent 1.92/32.572 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 25 Date: Wed, 15 Oct 2003 19:02:57 GMT NNTP-Posting-Host: 67.121.245.54 X-Complaints-To: abuse@sonic.net X-Trace: typhoon.sonic.net 1066244577 67.121.245.54 (Wed, 15 Oct 2003 12:02:57 PDT) NNTP-Posting-Date: Wed, 15 Oct 2003 12:02:57 PDT Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.mailgate.org!newsfeed.icl.net!newsfeed.fjserv.net!newsfeed.icl.net!newsfeed.fjserv.net!newsfeed.frii.net!newsfeed.frii.net!140.99.99.194.MISMATCH!newsfeed1.easynews.com!easynews.com!easynews!sjc72.webusenet.com!news.webusenet.com!feed.news.sonic.net!typhoon.sonic.net!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34429 On Tue, 14 Oct 2003 17:56:31 +0100, "Jonathan Bromley" wrote: >"Amstel" wrote in message >news:56f7756d.0310140824.7d8fe744@posting.google.com... >> I'm trying to make an electronic dice (3 die). Basically the dice has >> 3 seven-segment displays and the 3 dice values will run randomly so >> that we would always get different values combinations. However I >> tried and was unable to write the program in VHDL . > >Do you have any idea how incredibly hard this is? > > Superb answer, Jonathan. I suspect that, even as you read this, someone is talking to their dean about transferring from electrical engineering to political science or animal husbandry. And should you need it, I can give you the name of an excellent removing-tongue-from-cheek surgeon. Take care, Bob Perlman Cambrian Design Works ###### From: jetmarc@hotmail.com (jetmarc) Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL Date: 15 Oct 2003 12:09:07 -0700 Organization: http://groups.google.com Lines: 31 Message-ID: References: <56f7756d.0310140824.7d8fe744@posting.google.com> <3F8D450E.7BD39107@andraka.com> NNTP-Posting-Host: 80.58.13.44 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8bit X-Trace: posting.google.com 1066244947 26084 127.0.0.1 (15 Oct 2003 19:09:07 GMT) X-Complaints-To: groups-abuse@google.com NNTP-Posting-Date: Wed, 15 Oct 2003 19:09:07 +0000 (UTC) Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.imp.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!postnews1.google.com!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34430 > An LFSR output is only "random" for a single bit out per clock. The > remaining bits are delayed copies of the first bit. In order to use an > LFSR and really have a random stream of 3 bit numbers you'd need to clock > it 3x per die. If you go further to reject 'illegal' combinations, then > you are skewing the probabilities of the legal combinations so that they > are no longer uniform. I agree that you have to implement the full PRNG and not just use some bits of the LFSR, to get the full quality of the PRNG. However, rejecting illegal values is IMHO a "good" thing to do, meaning that it doesn't bias. After all, each and every output value of the PRNG is "unpredictable" (within the quality limits of the PRNG). Thus, rejecting all 0x6 and 0x7 doesn't reveal more information than that the final output won't ever be 0x6 or 0x7. Still, an attacker can't predict any output value, given that he couldn't predict them already before we added the reject circuit. It's a consequence of the lack of feedback into the PRNG. The PRNGs internal state is only changed through the intended means - by going from state n to n+1 (next value) etc. All cryptographic study that the PRNG design has received, inherently also applies to the combination of PRNG and rejection circuit. The only disadvantage of this method is that the execution time is not predictable. Although highly unprobable, the PRNG could output 0x6 / 0x7 for a lot of cycles in sequence. Thus you don't know how long it takes to get an acceptable (legal) output. In this particular application (dice) however, I don't think that it will be a problem of significance. Marc ###### Message-ID: <3F8DBCD2.6FC5@designtools.co.nz> From: Jim Granville Reply-To: jim.granville@designtools.co.nz Organization: Mandeno Granville elect X-Mailer: Mozilla 3.0C-XTRA (Win95; I) MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL References: <56f7756d.0310140824.7d8fe744@posting.google.com> <49cdb4ba.0310141601.6e630958@posting.google.com> <3F8CD115.73329133@andraka.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 16 Date: Thu, 16 Oct 2003 10:32:02 +1300 NNTP-Posting-Host: 210.246.2.73 X-Complaints-To: abuse@tsnz.net X-Trace: news02.tsnz.net 1066253537 210.246.2.73 (Thu, 16 Oct 2003 10:32:17 NZDT) NNTP-Posting-Date: Thu, 16 Oct 2003 10:32:17 NZDT Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.imp.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!in.100proofnews.com!in.100proofnews.com!news02.tsnz.net!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34441 Ray Andraka wrote: > > > Why seven segment LEDs though? It would be more appropriate to use 7 LEDs arranged > like the 'six' and 'one' sides of the die superimposed. Correct - and the design also does not have to have Mod 6 counting -> Decoder; it is possible to count directly in either 7 segment Font patterns, or in Ray's Dice-Font pattern. I have actually done a design that counts directly in 7 segment Font patterns (0..9) - the student can explain why that might be a good idea. -jg ###### Message-ID: <3F8DF5B8.ADA2B7D8@andraka.com> From: Ray Andraka Organization: Andraka Consulting Group, Inc X-Mailer: Mozilla 4.77 [en] (WinNT; U) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL References: <56f7756d.0310140824.7d8fe744@posting.google.com> <49cdb4ba.0310141601.6e630958@posting.google.com> <3F8CD115.73329133@andraka.com> <3F8DBCD2.6FC5@designtools.co.nz> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 34 Date: Wed, 15 Oct 2003 21:34:48 -0400 NNTP-Posting-Host: 68.15.41.165 X-Complaints-To: abuse@cox.net X-Trace: lakeread05 1066267471 68.15.41.165 (Wed, 15 Oct 2003 21:24:31 EDT) NNTP-Posting-Date: Wed, 15 Oct 2003 21:24:31 EDT Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.mailgate.org!newsfeed.icl.net!newsfeed.fjserv.net!proxad.net!proxad.net!194.168.4.91.MISMATCH!newspeer1-gui.server.ntli.net!ntli.net!peer01.cox.net!cox.net!p01!lakeread05.POSTED!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34454 I did a similar 3 die design way back when (ca 1976) using TTL parts. It could easily be done in a small CPLD and a short time with current tools. Jim Granville wrote: > Ray Andraka wrote: > > > > > > Why seven segment LEDs though? It would be more appropriate to use 7 LEDs arranged > > like the 'six' and 'one' sides of the die superimposed. > > Correct - and the design also does not have to have Mod 6 counting -> > Decoder; > it is possible to count directly in either 7 segment Font patterns, or > in Ray's Dice-Font pattern. > > I have actually done a design that counts directly in 7 > segment Font patterns (0..9) - the student can explain why that > might be a good idea. > > -jg -- --Ray Andraka, P.E. President, the Andraka Consulting Group, Inc. 401/884-7930 Fax 401/884-7950 email ray@andraka.com http://www.andraka.com "They that give up essential liberty to obtain a little temporary safety deserve neither liberty nor safety." -Benjamin Franklin, 1759 ###### Message-ID: <3F8DF632.F45BCB64@andraka.com> From: Ray Andraka Organization: Andraka Consulting Group, Inc X-Mailer: Mozilla 4.77 [en] (WinNT; U) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL References: <56f7756d.0310140824.7d8fe744@posting.google.com> <3F8D450E.7BD39107@andraka.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 50 Date: Wed, 15 Oct 2003 21:36:50 -0400 NNTP-Posting-Host: 68.15.41.165 X-Complaints-To: abuse@cox.net X-Trace: lakeread05 1066267593 68.15.41.165 (Wed, 15 Oct 2003 21:26:33 EDT) NNTP-Posting-Date: Wed, 15 Oct 2003 21:26:33 EDT Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.imp.ch!news.imp.ch!newsfeed.stueberl.de!peer01.cox.net!cox.net!p01!lakeread05.POSTED!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34455 As long as you discard all the bits for each illegal value it is uniform. Some reason I was thinking the OP was looking at discarding a bit until the right one came in. Must have been before my coffee. jetmarc wrote: > > An LFSR output is only "random" for a single bit out per clock. The > > remaining bits are delayed copies of the first bit. In order to use an > > LFSR and really have a random stream of 3 bit numbers you'd need to clock > > it 3x per die. If you go further to reject 'illegal' combinations, then > > you are skewing the probabilities of the legal combinations so that they > > are no longer uniform. > > I agree that you have to implement the full PRNG and not just use some > bits of the LFSR, to get the full quality of the PRNG. > > However, rejecting illegal values is IMHO a "good" thing to do, meaning > that it doesn't bias. After all, each and every output value of the > PRNG is "unpredictable" (within the quality limits of the PRNG). Thus, > rejecting all 0x6 and 0x7 doesn't reveal more information than that the > final output won't ever be 0x6 or 0x7. Still, an attacker can't predict > any output value, given that he couldn't predict them already before we > added the reject circuit. > > It's a consequence of the lack of feedback into the PRNG. The PRNGs > internal state is only changed through the intended means - by going > from state n to n+1 (next value) etc. All cryptographic study that > the PRNG design has received, inherently also applies to the > combination of PRNG and rejection circuit. > > The only disadvantage of this method is that the execution time is not > predictable. Although highly unprobable, the PRNG could output 0x6 / 0x7 > for a lot of cycles in sequence. Thus you don't know how long it takes > to get an acceptable (legal) output. In this particular application > (dice) however, I don't think that it will be a problem of significance. > > Marc -- --Ray Andraka, P.E. President, the Andraka Consulting Group, Inc. 401/884-7930 Fax 401/884-7950 email ray@andraka.com http://www.andraka.com "They that give up essential liberty to obtain a little temporary safety deserve neither liberty nor safety." -Benjamin Franklin, 1759 ###### From: "Vinh Pham" Newsgroups: comp.arch.fpga References: <56f7756d.0310140824.7d8fe744@posting.google.com> <3F8D450E.7BD39107@andraka.com> <3F8D889D.F4841F06@andraka.com> Subject: Re: Electronic Dice ( 3 die ) In VHDL Lines: 7 X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 6.00.2800.1158 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2800.1165 Message-ID: Date: Thu, 16 Oct 2003 01:56:32 GMT NNTP-Posting-Host: 66.8.207.16 X-Complaints-To: abuse@rr.com X-Trace: twister.socal.rr.com 1066269392 66.8.207.16 (Wed, 15 Oct 2003 18:56:32 PDT) NNTP-Posting-Date: Wed, 15 Oct 2003 18:56:32 PDT Organization: RoadRunner - West Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!irazu.switch.ch!switch.ch!news.maxwell.syr.edu!newshub.sdsu.edu!elnk-nf2-pas!elnk-pas-nf1!newsfeed.earthlink.net!cyclone.socal.rr.com!cyclone2.kc.rr.com!news2.kc.rr.com!twister.socal.rr.com.POSTED!53ab2750!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34457 > Well, not really an adder. It is an XOR or XNOR combination of the terms in the Yeah adder isn't the best word, because the adders we normally think of have a carry chain. Modulo-2 addition has no carry, so it simplifies to an XOR. ###### Reply-To: "Nial Stewart" From: "Nial Stewart" Newsgroups: comp.arch.fpga References: <56f7756d.0310140824.7d8fe744@posting.google.com> <3F8C3A8E.46F71A51@xilinx.com> <3f8c4d91$0$10956$fa0fcedb@lovejoy.zen.co.uk> <3F8C5BC4.641FA8DA@xilinx.com> Subject: Re: Electronic Dice ( 3 die ) In VHDL Date: Thu, 16 Oct 2003 09:25:24 +0100 X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 5.00.2615.200 X-MimeOLE: Produced By Microsoft MimeOLE V5.00.2615.200 Lines: 17 Message-ID: <3f8e5528$0$11002$fa0fcedb@lovejoy.zen.co.uk> Organization: Zen Internet NNTP-Posting-Host: 217.155.72.198 X-Trace: 1066292520 lovejoy.zen.co.uk 11002 217.155.72.198 X-Complaints-To: abuse@zen.co.uk Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.mailgate.org!newsfeed.stueberl.de!peer1.news.newnet.co.uk!peer1.news.newnet.co.uk!zen.net.uk!lovejoy.zen.co.uk.POSTED!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34474 Peter Alfke wrote in message news:3F8C5BC4.641FA8DA@xilinx.com... > I admit, my "irony detector" was temporarily asleep, and the German > seriousness took over... Coming from Northern Ireland my 'irony detector' is stuck at 10. Nial ------------------------------------------------ Nial Stewart Developments Ltd FPGA and High Speed Digital Design www.nialstewartdevelopments.co.uk ###### From: symon_brewer@hotmail.com (Symon) Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL Date: 16 Oct 2003 09:25:05 -0700 Organization: http://groups.google.com Lines: 9 Message-ID: References: <56f7756d.0310140824.7d8fe744@posting.google.com> <3F8C3A8E.46F71A51@xilinx.com> <3f8c4d91$0$10956$fa0fcedb@lovejoy.zen.co.uk> <3F8C5BC4.641FA8DA@xilinx.com> <3f8e5528$0$11002$fa0fcedb@lovejoy.zen.co.uk> NNTP-Posting-Host: 67.121.164.17 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8bit X-Trace: posting.google.com 1066321505 19397 127.0.0.1 (16 Oct 2003 16:25:05 GMT) X-Complaints-To: groups-abuse@google.com NNTP-Posting-Date: Thu, 16 Oct 2003 16:25:05 +0000 (UTC) Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!postnews1.google.com!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34482 Then you've seen www.portadownnews.com ? The 'Drumcree VII' edition, featuring "Vatican sends Holy Water Cannon", is a favourite! cheers, Syms. > > Coming from Northern Ireland my 'irony detector' is stuck at > 10. > > > Nial ###### Message-ID: <3F8F0AA6.20AE@designtools.co.nz> From: Jim Granville Reply-To: jim.granville@designtools.co.nz Organization: Mandeno Granville elect X-Mailer: Mozilla 3.0C-XTRA (Win95; I) MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL References: <56f7756d.0310140824.7d8fe744@posting.google.com> <49cdb4ba.0310141601.6e630958@posting.google.com> <3F8CD115.73329133@andraka.com> <3F8DBCD2.6FC5@designtools.co.nz> <3F8DF5B8.ADA2B7D8@andraka.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 14 Date: Fri, 17 Oct 2003 10:16:22 +1300 NNTP-Posting-Host: 210.246.6.125 X-Complaints-To: abuse@tsnz.net X-Trace: news02.tsnz.net 1066338997 210.246.6.125 (Fri, 17 Oct 2003 10:16:37 NZDT) NNTP-Posting-Date: Fri, 17 Oct 2003 10:16:37 NZDT Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.mailgate.org!news-out1.nntp.be!propagator2-sterling!In.nntp.be!newsfeed01.tsnz.net!news02.tsnz.net!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34494 Ray Andraka wrote: > > I did a similar 3 die design way back when (ca 1976) using TTL parts. > It could easily be done in a small CPLD and a short time with > current tools. With some care (challenge for todays students ?) I believe one can pack 2 dice into a 16V8 - smallest/cheapest programmable logic device made. Ideal for backgammon etc.... What games need 3 dice ? -jg ###### Message-ID: <3F8F2837.3DB49830@andraka.com> From: Ray Andraka Organization: Andraka Consulting Group, Inc X-Mailer: Mozilla 4.77 [en] (WinNT; U) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: Electronic Dice ( 3 die ) In VHDL References: <56f7756d.0310140824.7d8fe744@posting.google.com> <49cdb4ba.0310141601.6e630958@posting.google.com> <3F8CD115.73329133@andraka.com> <3F8DBCD2.6FC5@designtools.co.nz> <3F8DF5B8.ADA2B7D8@andraka.com> <3F8F0AA6.20AE@designtools.co.nz> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 31 Date: Thu, 16 Oct 2003 19:22:31 -0400 NNTP-Posting-Host: 68.15.41.165 X-Complaints-To: abuse@cox.net X-Trace: lakeread05 1066345932 68.15.41.165 (Thu, 16 Oct 2003 19:12:12 EDT) NNTP-Posting-Date: Thu, 16 Oct 2003 19:12:12 EDT Path: redlance.franklin.ch!pfaff2.ethz.ch!news-zh.switch.ch!switch.ch!news.mailgate.org!news-out1.nntp.be!propagator2-sterling!news-in-sterling.nuthinbutnews.com!cyclone1.gnilink.net!peer01.cox.net!cox.net!p01!lakeread05.POSTED!not-for-mail Xref: redlance.franklin.ch comp.arch.fpga:34499 It was for a bar game, although there are several board games that use more than 2 dice. Yahtzee, for example uses 5 as I recall. Jim Granville wrote: > Ray Andraka wrote: > > > > I did a similar 3 die design way back when (ca 1976) using TTL parts. > It could easily be done in a small CPLD and a short time with > > current tools. > > With some care (challenge for todays students ?) I believe one > can pack 2 dice into a 16V8 - smallest/cheapest programmable logic > device made. > > Ideal for backgammon etc.... > > What games need 3 dice ? > > -jg -- --Ray Andraka, P.E. President, the Andraka Consulting Group, Inc. 401/884-7930 Fax 401/884-7950 email ray@andraka.com http://www.andraka.com "They that give up essential liberty to obtain a little temporary safety deserve neither liberty nor safety." -Benjamin Franklin, 1759