From: "Jean Nicolle" Newsgroups: comp.arch.fpga Subject: Sending and receiving Ethernet traffic Lines: 15 X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 6.00.2800.1158 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2800.1165 Message-ID: NNTP-Posting-Host: 63.201.59.222 X-Complaints-To: abuse@prodigy.net X-Trace: newssvr13.news.prodigy.com 1062749239 ST000 63.201.59.222 (Fri, 05 Sep 2003 04:07:19 EDT) NNTP-Posting-Date: Fri, 05 Sep 2003 04:07:19 EDT Organization: SBC http://yahoo.sbc.com X-UserInfo1: SCSYQN_@FS@GBQQXGZKZOPDAPJT@QDDMEPWXODMMHXMTWA]EPEWUQBKZQLYJX\_ITFD_KFVLUN[DOM_A_NSYNWPFWNS[XV\I]PZ@BQ[@CDQDPCL^FKCBIPC@KLGEZEFNMDYMKHRL_YYYGDSSODXYN@[\BK[LVTWI@AXGQCOA_SAH@TPD^\AL\RLGRFWEARBM Date: Fri, 05 Sep 2003 08:07:19 GMT Path: chonsp.franklin.ch!pfaff2.ethz.ch!pfaff.ethz.ch!news-zh.switch.ch!irazu.switch.ch!switch.ch!in.100proofnews.com!in.100proofnews.com!prodigy.com!prodigy.com!newsmst01.news.prodigy.com!prodigy.com!postmaster.news.prodigy.com!newssvr13.news.prodigy.com.POSTED!a0e6b194!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:32631 I managed to transmit and receive traffic on a 10BASE-T network using some simple Verilog code and 4 pins of an FPGA connected almost directly to the wires. Most microcontrollers require an external Ethernet MAC, but it seems that we can do without if we limit ourselves to IP/UDP. I think that there are potentially plenty of interesting applications. The project is working well already, so I documented a good chunk of it. http://www.fpga4fun.com/10BASE-T.html Comments are welcome! Jean ###### From: "Jean Nicolle" Newsgroups: comp.arch.fpga References: Subject: Re: Sending and receiving Ethernet traffic Lines: 25 X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 6.00.2800.1158 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2800.1165 Message-ID: NNTP-Posting-Host: 63.201.59.222 X-Complaints-To: abuse@prodigy.net X-Trace: newssvr29.news.prodigy.com 1062774259 ST000 63.201.59.222 (Fri, 05 Sep 2003 11:04:19 EDT) NNTP-Posting-Date: Fri, 05 Sep 2003 11:04:19 EDT Organization: SBC http://yahoo.sbc.com X-UserInfo1: OX[OFYCDVZUKBP\YN[O@_WH@YR_B@EXLLBWLOOAFBATBTSUBYFWEAE[YJLYPIWKHTFCMZKVMB^[Z^DOBRVVMOSPFHNSYXVDIE@X\BUC@GTSX@DL^GKFFHQCCE\G[JJBMYDYIJCZM@AY]GNGPJD]YNNW\GSX^GSCKHA[]@CCB\[@LATPD\L@J\\PF]VR[QPJN Date: Fri, 05 Sep 2003 15:04:19 GMT Path: chonsp.franklin.ch!pfaff2.ethz.ch!pfaff.ethz.ch!news-zh.switch.ch!switch.ch!news.mailgate.org!nntp.infostrada.it!in.100proofnews.com!in.100proofnews.com!prodigy.com!newsmst01.news.prodigy.com!prodigy.com!postmaster.news.prodigy.com!newssvr29.news.prodigy.com.POSTED!a0e6b194!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:32629 BTW, the statement about 4 pins is not correct. I use 2 pins for transmission, but only 1 pin for reception (I have 2 transistors to create a differential input from the 10BASE-T RD+/RD- wires to the FPGA). "Jean Nicolle" wrote in message news:XuX5b.5$Y15.5657658@newssvr13.news.prodigy.com... > I managed to transmit and receive traffic on a 10BASE-T network using some > simple Verilog code and 4 pins of an FPGA connected almost directly to the > wires. > > Most microcontrollers require an external Ethernet MAC, but it seems that we > can do without if we limit ourselves to IP/UDP. > I think that there are potentially plenty of interesting applications. > > The project is working well already, so I documented a good chunk of it. > http://www.fpga4fun.com/10BASE-T.html > > Comments are welcome! > Jean > > ###### From: "Martin Schoeberl" Newsgroups: comp.arch.fpga References: Subject: Re: Sending and receiving Ethernet traffic Lines: 32 X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 6.00.2720.3000 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2727.1300 Message-ID: Date: Mon, 08 Sep 2003 19:26:24 GMT NNTP-Posting-Host: 80.110.200.231 X-Complaints-To: abuse@news.chello.at X-Trace: news.chello.at 1063049184 80.110.200.231 (Mon, 08 Sep 2003 21:26:24 MEST) NNTP-Posting-Date: Mon, 08 Sep 2003 21:26:24 MEST Organization: Customers chello Austria Path: chonsp.franklin.ch!pfaff2.ethz.ch!pfaff.ethz.ch!news-zh.switch.ch!switch.ch!news.mailgate.org!newsfeed.icl.net!newsfeed.fjserv.net!newsfeed00.sul.t-online.de!newsfeed01.sul.t-online.de!t-online.de!195.34.132.50.MISMATCH!newsfeed01.chello.at!news.chello.at.POSTED!53ab2750!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:32689 > I managed to transmit and receive traffic on a 10BASE-T network using some > simple Verilog code and 4 pins of an FPGA connected almost directly to the > wires. > > Most microcontrollers require an external Ethernet MAC, but it seems that we > can do without if we limit ourselves to IP/UDP. > I think that there are potentially plenty of interesting applications. > > The project is working well already, so I documented a good chunk of it. > http://www.fpga4fun.com/10BASE-T.html > > Comments are welcome! > Jean > Cool project. Have you coded the ethernet stuff by yourself or used an ip block? You have one small misstake: The splitting in RX and TX lines on RJ45 does not prevent contention! It is still possible. Some time ago I was also thinking about an ethernet inteface in an FPGA. I thought, like you, now with RJ45 it's easier since contention detection is one of the hard parts. However, if you read carefully the doc's it's still there ;-( Martin -- ---------------------------------------------- JOP - a Java Processor core for FPGAs: http://www.jopdesign.com/ ###### From: "Jean Nicolle" Newsgroups: comp.arch.fpga References: Subject: Re: Sending and receiving Ethernet traffic Lines: 56 X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 6.00.2800.1158 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2800.1165 Message-ID: NNTP-Posting-Host: 63.201.59.222 X-Complaints-To: abuse@prodigy.net X-Trace: newssvr25.news.prodigy.com 1063066742 ST000 63.201.59.222 (Mon, 08 Sep 2003 20:19:02 EDT) NNTP-Posting-Date: Mon, 08 Sep 2003 20:19:02 EDT Organization: SBC http://yahoo.sbc.com X-UserInfo1: FKPO@SND[PUARWTXBBHNOFXBWR\HPCTL@XT^OBPLAH[\RZ]CDVW[AKK[J\]^HVKHG^EWZHBLO^[\NH_AZFWGN^\DHNVMX_DHHX[FSQKBOTS@@BP^]C@RHS_AGDDC[AJM_T[GZNRNZAY]GNCPBDYKOLK^_CZFWPGHZIXW@C[AFKBBQS@E@DAZ]VDFUNTQQ]FN Date: Tue, 09 Sep 2003 00:19:02 GMT Path: chonsp.franklin.ch!pfaff2.ethz.ch!pfaff.ethz.ch!news-zh.switch.ch!switch.ch!news.ifi.unizh.ch!news.imp.ch!news.imp.ch!newsfeed.stueberl.de!peer01.cox.net!peer02.cox.net!cox.net!prodigy.com!newsmst01.news.prodigy.com!prodigy.com!postmaster.news.prodigy.com!newssvr25.news.prodigy.com.POSTED!a0e6b194!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:32699 Martin, about the contention, in the current IEEE spec (IEEE 802.3-2002), section "4.2.3.2.6 Full duplex transmission" states: "In full duplex mode, there is never contention for a shared physical medium." That's the beauty of it. Twice the bandwidth, and much easier to implement. So my code is only intended to be connected to a full-duplex capable device only (i.e. a switch or directly to another computer). Your remark is true for half-duplex (which is much harder to implement!). Hope that convinces you. Jean "Martin Schoeberl" wrote in message news:AJ47b.216558$2k4.2477739@news.chello.at... > > I managed to transmit and receive traffic on a 10BASE-T network using some > > simple Verilog code and 4 pins of an FPGA connected almost directly to the > > wires. > > > > Most microcontrollers require an external Ethernet MAC, but it seems that > we > > can do without if we limit ourselves to IP/UDP. > > I think that there are potentially plenty of interesting applications. > > > > The project is working well already, so I documented a good chunk of it. > > http://www.fpga4fun.com/10BASE-T.html > > > > Comments are welcome! > > Jean > > > > Cool project. Have you coded the ethernet stuff by yourself or used an ip > block? You have one small misstake: The splitting in RX and TX lines on RJ45 > does not prevent contention! It is still possible. Some time ago I was also > thinking about an ethernet inteface in an FPGA. I thought, like you, now > with RJ45 it's easier since contention detection is one of the hard parts. > However, if you read carefully the doc's it's still there ;-( > > Martin > -- > ---------------------------------------------- > JOP - a Java Processor core for FPGAs: > http://www.jopdesign.com/ > > > > ###### From: "Martin Schoeberl" Newsgroups: comp.arch.fpga References: Subject: Re: Sending and receiving Ethernet traffic Lines: 79 X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 6.00.2720.3000 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2727.1300 Message-ID: Date: Tue, 09 Sep 2003 06:39:16 GMT NNTP-Posting-Host: 80.110.200.231 X-Complaints-To: abuse@news.chello.at X-Trace: news.chello.at 1063089556 80.110.200.231 (Tue, 09 Sep 2003 08:39:16 MEST) NNTP-Posting-Date: Tue, 09 Sep 2003 08:39:16 MEST Organization: Customers chello Austria Path: chonsp.franklin.ch!pfaff2.ethz.ch!pfaff.ethz.ch!news-zh.switch.ch!switch.ch!news.imp.ch!news.imp.ch!newsfeed.stueberl.de!newshunter!cosy.sbg.ac.at!newsfeed01.chello.at!news.chello.at.POSTED!53ab2750!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:32688 Jean, there is still a problem. If you use a point to point connection (with a cross over cabel) it can be possible that both stations transmit without a contention. However, Ethernet is still a bus. Imagine following situation: Three stations (A,B,C) connected via a hub. Station A and B are sending at the same time. Which message will arrive at C? This IS a contention. On A and B perhaps you will not see a contention on the TX lines, however you have to listen to the RX line while sending and abort your transmit, enter the random timeout and retransmit. And I'm not shure if a simple hub will support full duplex mode. Sorry, I'm not convinced Martin > Martin, > > about the contention, in the current IEEE spec (IEEE 802.3-2002), section > "4.2.3.2.6 Full duplex transmission" states: > "In full duplex mode, there is never contention for a shared physical > medium." > > That's the beauty of it. Twice the bandwidth, and much easier to implement. > So my code is only intended to be connected to a full-duplex capable device > only (i.e. a switch or directly to another computer). > > Your remark is true for half-duplex (which is much harder to implement!). > Hope that convinces you. > Jean > > "Martin Schoeberl" wrote in message > news:AJ47b.216558$2k4.2477739@news.chello.at... > > > I managed to transmit and receive traffic on a 10BASE-T network using > some > > > simple Verilog code and 4 pins of an FPGA connected almost directly to > the > > > wires. > > > > > > Most microcontrollers require an external Ethernet MAC, but it seems > that > > we > > > can do without if we limit ourselves to IP/UDP. > > > I think that there are potentially plenty of interesting applications. > > > > > > The project is working well already, so I documented a good chunk of it. > > > http://www.fpga4fun.com/10BASE-T.html > > > > > > Comments are welcome! > > > Jean > > > > > > > Cool project. Have you coded the ethernet stuff by yourself or used an ip > > block? You have one small misstake: The splitting in RX and TX lines on > RJ45 > > does not prevent contention! It is still possible. Some time ago I was > also > > thinking about an ethernet inteface in an FPGA. I thought, like you, now > > with RJ45 it's easier since contention detection is one of the hard parts. > > However, if you read carefully the doc's it's still there ;-( > > > > Martin > > -- > > ---------------------------------------------- > > JOP - a Java Processor core for FPGAs: > > http://www.jopdesign.com/ > > > > > > > > > > ###### From: Allan Herriman Newsgroups: comp.arch.fpga Subject: Re: Sending and receiving Ethernet traffic Date: Tue, 09 Sep 2003 17:30:56 +1000 Organization: Global Crossing Internet Lines: 15 Message-ID: <880rlvc3m7ee6dmbp7f2e985dqhsrdthhr@4ax.com> References: NNTP-Posting-Host: nnrp1.phx1.gblx.net Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: node21.cwnet.roc.gblx.net 1063092743 41654 64.214.31.40 (9 Sep 2003 07:32:23 GMT) X-Complaints-To: abuse@gblx.net NNTP-Posting-Date: Tue, 9 Sep 2003 07:32:23 +0000 (UTC) X-Newsreader: Forte Free Agent 1.93/32.576 English (American) X-Original-NNTP-Posting-Host: 203.219.10.94 X-Original-Trace: 9 Sep 2003 17:32:03 +1000, 203.219.10.94 Cache-Post-Path: nnrp1.phx1.gblx.net!203.12.160.33 X-Cache: nntpcache 2.4.0b5 (see http://www.nntpcache.org/) Path: chonsp.franklin.ch!pfaff2.ethz.ch!pfaff.ethz.ch!news-zh.switch.ch!switch.ch!news.ifi.unizh.ch!news.imp.ch!news.imp.ch!newsfeed.vmunix.org!news-FFM2.ecrc.net!nntp1.roc.gblx.net!nntp.gblx.net!nntp.gblx.net!news.globalcrossing.net!dnews.tpgi.com.au!tpg.com.au!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:32706 On Tue, 09 Sep 2003 06:39:16 GMT, "Martin Schoeberl" wrote: >Jean, > >there is still a problem. If you use a point to point connection (with a >cross over cabel) it can be possible that both stations transmit without a >contention. However, Ethernet is still a bus. Imagine following situation: >Three stations (A,B,C) connected via a hub. Jean is only supporting full duplex mode on point to point links, which disallows the use of a hub. Regards, Allan. ###### From: H. Peter Anvin Newsgroups: comp.arch.fpga Subject: Re: Sending and receiving Ethernet traffic Organization: Transmeta Corporation, Santa Clara CA Lines: 22 Sender: hpa@cesium.transmeta.com Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8bit X-Comment-To: "Martin Schoeberl" Disclaimer: Not speaking for Transmeta in any way, shape, or form. Copyright: Copyright 2003 H. Peter Anvin - All Rights Reserved Cache-Post-Path: palladium.transmeta.com!unknown@cesium.transmeta.com X-Cache: nntpcache 2.4.0b5 (see http://www.nntpcache.org/) Date: 9 Sep 2003 17:09:00 -0700 NNTP-Posting-Host: 63.209.4.196 X-Complaints-To: news@globix.net X-Trace: news.sjc.globix.net 1063152519 63.209.4.196 (Tue, 09 Sep 2003 17:08:39 PDT) NNTP-Posting-Date: Tue, 09 Sep 2003 17:08:39 PDT Path: chonsp.franklin.ch!pfaff2.ethz.ch!pfaff.ethz.ch!news-zh.switch.ch!irazu.switch.ch!switch.ch!newsfeed.mathworks.com!nycmny1-snh1.gtei.net!cambridge1-snf1.gtei.net!news.gtei.net!bos-service1.ext.raytheon.com!cyclone.swbell.net!cyclone-sf.pbi.net!209.10.34.151!newsfeed.sjc.globix.net!news.sjc.globix.net!cesium.transmeta.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:32750 Followup to: By author: "Martin Schoeberl" In newsgroup: comp.arch.fpga > > Jean, > > there is still a problem. If you use a point to point connection (with a > cross over cabel) it can be possible that both stations transmit without a > contention. However, Ethernet is still a bus. > Full-duplex Ethernet is *not* a bus and does *not* use CSMA/CD. It's a point-to-point self-clocking serial connection. All interconnections have to be done at layer 2 (i.e. by bridges/switches) or higher. -hpa -- at work, in private! If you send me mail in HTML format I will assume it's spam. "Unix gives you enough rope to shoot yourself in the foot." Architectures needed: ia64 m68k mips64 ppc ppc64 s390 s390x sh v850 x86-64