From: James Horn Newsgroups: comp.arch.fpga Subject: GAL16V8 reverse compilation Date: Wed, 25 Jun 2003 19:22:23 -0000 Organization: SVN.NET (www.svn.net) Message-ID: Summary: User-Agent: tin/1.4.5-20010409 ("One More Nightmare") (UNIX) (Linux/2.4.21 (i686)) X-Complaints-To: abuse@supernews.com Lines: 11 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!sn-xit-03!sn-xit-01!sn-post-01!supernews.com!corp.supernews.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:29969 Sorry to refer to such an ancient device - but can anyone point me to either a reverse compiler for the GAL16V8 or the definition of its fuse map bits to be able to derive the logic function from same? Our company bought another years ago and the products from them that we're making often have no documentation or source code. In getting ISO certified we have to reengineer what's going on. We have all the rights to the designs - we just don't know what they are(!!). Any pointers will be most appreciated. Jim Horn, Penngrove, California ###### Path: chonsp.franklin.ch!not-for-mail From: Neil Franklin Newsgroups: comp.arch.fpga Subject: Re: GAL16V8 reverse compilation Date: 25 Jun 2003 23:11:22 +0200 Organization: My own Private Self Lines: 34 Message-ID: <6ud6h1j211.fsf@chonsp.franklin.ch> References: NNTP-Posting-Host: chonsp.franklin.ch X-Trace: chonsp.franklin.ch 1056575486 1091 10.0.3.2 (25 Jun 2003 21:11:26 GMT) X-Complaints-To: news@chonsp.franklin.ch NNTP-Posting-Date: 25 Jun 2003 21:11:26 GMT X-Newsreader: Gnus v5.7/Emacs 20.4 Xref: chonsp.franklin.ch comp.arch.fpga:29976 James Horn writes: > either a reverse compiler for the GAL16V8 or the definition of its fuse > map bits to be able to derive the logic function from same? GALs are made by Lattice. They still make them. The data sheets are on their website as PDFs. They have (at least in the old copies I have) in them descriptions of signalling, frame format, bit arrangement, and fuse map. Should be enough to reverse engineer one. Hmmm, just looked on the website, only fuse numbers are given: http://www.latticesemi.com/lit/docs/datasheets/pal_gal/16v8.pdf?CFID=2538619&CFT OKEN=27693493 Pages 5 and 7. I am sure I once saw an description of this stuff, somewhere in the 50M of Lattice docs I got on CD-ROM. IIRC it is frames of 5 bits command, 6 bits address and then 32 or 40 bits data, per row of fuse bits. Or something like that. Look out for repeatin identical 5 bits "load" command, woth incrementing 6bits of address, 0, 32, 64, ... (if 20pin) or 0, 40, 80, ... (if 24pin). -- Neil Franklin, neil@franklin.ch.remove http://neil.franklin.ch/ Hacker, Unix Guru, El Eng HTL/BSc, Programmer, Archer, Blacksmith - hardware runs the world, software controls the hardware code generates the software, have you coded today? ###### From: James Horn Newsgroups: comp.arch.fpga Subject: Re: GAL16V8 reverse compilation Date: Wed, 25 Jun 2003 22:10:43 -0000 Organization: SVN.NET (www.svn.net) Message-ID: References: <6ud6h1j211.fsf@chonsp.franklin.ch> User-Agent: tin/1.4.5-20010409 ("One More Nightmare") (UNIX) (Linux/2.4.21 (i686)) X-Complaints-To: abuse@supernews.com Lines: 6 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!sn-xit-03!sn-xit-01!sn-post-02!sn-post-01!supernews.com!corp.supernews.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:30017 Thanks, Neil! I saw the spec page but missed the fuse information. It's all there indeed. Now to plot dots and manually simplify. Many thanks again! Jim Horn ###### Message-ID: <3EFA3FA8.1E65@designtools.co.nz> From: Jim Granville Reply-To: jim.granville@designtools.co.nz Organization: Mandeno Granville elect X-Mailer: Mozilla 3.0C-XTRA (Win95; I) MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: GAL16V8 reverse compilation References: Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 29 Date: Thu, 26 Jun 2003 12:34:48 +1200 NNTP-Posting-Host: 203.79.98.192 X-Complaints-To: abuse@tsnz.net X-Trace: news02.tsnz.net 1056587668 203.79.98.192 (Thu, 26 Jun 2003 12:34:28 NZST) NNTP-Posting-Date: Thu, 26 Jun 2003 12:34:28 NZST Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!switch.ch!news.mailgate.org!out.nntp.be!propagator2-sterling!In.nntp.be!newsfeed01.tsnz.net!news02.tsnz.net!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:30005 James Horn wrote: > > Sorry to refer to such an ancient device - but can anyone point me to > either a reverse compiler for the GAL16V8 or the definition of its fuse > map bits to be able to derive the logic function from same? There's nothing wrong with a 16V8 - we still use them in new designs :) > > Our company bought another years ago and the products from them that we're > making often have no documentation or source code. In getting ISO > certified we have to reengineer what's going on. We have all the rights > to the designs - we just don't know what they are(!!). Any pointers will > be most appreciated. Look for a pgm called JED2EQN, which can take a JED file, for simple devices, and create a boolean eqn for the same. If you want to fully re-create the device, it will be a good idea to also create Test vectors - these allow functional test in device programmers. One detial to watch for, in doing EQN -> JED again, is the allocate of the OR terms ( 8 wide in a 16V8) can legally occur in any order, so the fuse maps will differ. - ie you can have identical logic but different (shuffled) JED content. -jg