From: "Eric Pearson" Newsgroups: comp.arch.fpga Subject: Re: JBits Date: Mon, 10 Feb 2003 09:08:30 -0500 Organization: LSI Logic Corporation Lines: 13 Message-ID: References: <5c4d983.0302081113.48392c92@posting.google.com> NNTP-Posting-Host: 172.25.8.172 X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 6.00.2800.1106 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2800.1106 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!skynet.be!skynet.be!news-out.visi.com!hermes.visi.com!uunet!ash.uu.net!news.lsil.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:25721 Hi Pete... How does Jbits help one get better Altera designs? Eric Pearson "Peter Sommerfeld" wrote in message news:5c4d983.0302081113.48392c92@posting.google.com... > Is there anything equivalent to JBits for Altera devices? I'm dearly hoping so ... ###### From: "Steve Casselman" Newsgroups: comp.arch.fpga References: <5c4d983.0302081113.48392c92@posting.google.com> Subject: Re: JBits Lines: 47 X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 6.00.2800.1106 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2800.1106 Message-ID: NNTP-Posting-Host: 64.164.172.64 X-Complaints-To: abuse@prodigy.net X-Trace: newssvr14.news.prodigy.com 1044984553 ST000 64.164.172.64 (Tue, 11 Feb 2003 12:29:13 EST) NNTP-Posting-Date: Tue, 11 Feb 2003 12:29:13 EST Organization: Prodigy Internet http://www.prodigy.com X-UserInfo1: SCSYQNONWJWYB_XYGRNFOFTBTR\B@GXLN@GZ_GYO^ZWZUYICD^RAQBKZQTZTX\_I[^G_KGFNON[ZOE_AZNVO^\XGGNTCIRPIJH[@RQKBXLRZ@CD^HKANYVW@RLGEZEJN@\_WZJBNZYYKVIOR]T]MNMG_Z[YVWSCH_Q[GPC_A@CARQVXDSDA^M]@DRVUM@RBM Date: Tue, 11 Feb 2003 17:29:13 GMT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!fr.usenet-edu.net!usenet-edu.net!news.tele.dk!news.tele.dk!small.news.tele.dk!prodigy.com!newsmst01.news.prodigy.com!prodigy.com!postmaster.news.prodigy.com!newssvr14.news.prodigy.com.POSTED!2ac7f5fa!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:25767 There are all sorts of reasons to do this. Just go and look up all the paper written about JBits. Most of it has to do with using the configuration infrastructure to change and update a small part of a devices configuration often at runtime. If you think about it there are a lot of resources that go into configuring these devices and it is a waste to only use that once. At one time Altera and Xilinx had the same market cap (number of shares times share price) and that changed the day EETimes ran the headline "Xilinx believes in reconfigurable computing and Altera thinks it is a red herring." It told investors and engineers that Xilinx believed in a future and Altera did not. JBits gives users a direct programming model, something that Altera does not have. In my opinion if Altera wants to capture the imagination of the top engineers in the world they should design a part starting with a bit level programming model that makes sense and then make that public. It would be great if there were a part that I could give a partial bitstream that would just program the lookup tables and not have to include any routing bits. We are coming into the age where 10's of thousands of programmers are going to start using FPGA's. Access to, and knowledge of, the bitstream will allow companies to be successful quicker and add value beyond what HDLs and standard programming models of today can offer. I think the biggest challenge that faces FPGA companies is not more gates or bigger ram or faster embedded processors those things all come with more transistors. But rather how to design a part that starts with a straight forward, well documented, bit level programming model that will allow programmer to write software that can manipulate the hardware during runtime. Steve "Eric Pearson" wrote in message news:b28bov$6od$1@news.lsil.com... > Hi Pete... > > How does Jbits help one get better Altera designs? > > Eric Pearson > > > "Peter Sommerfeld" wrote in message > news:5c4d983.0302081113.48392c92@posting.google.com... > > Is there anything equivalent to JBits for Altera devices? I'm dearly > hoping so ... > > ###### Message-ID: <3E495E23.2BE57ED0@andraka.com> From: Ray Andraka Organization: Andraka Consulting Group, Inc X-Mailer: Mozilla 4.77 [en] (WinNT; U) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: JBits References: <5c4d983.0302081113.48392c92@posting.google.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 34 Date: Tue, 11 Feb 2003 20:29:49 GMT NNTP-Posting-Host: 68.15.41.165 X-Complaints-To: abuse@cox.net X-Trace: news1.east.cox.net 1044995389 68.15.41.165 (Tue, 11 Feb 2003 15:29:49 EST) NNTP-Posting-Date: Tue, 11 Feb 2003 15:29:49 EST Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!newsfeed.icl.net!newsfeed.fjserv.net!feed.news.nacamar.de!easynet-quince!easynet.net!cox.net!p01!news1.east.cox.net.POSTED!53ab2750!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:25745 Steve, You are scaring me! I've had to clean up after too many of these software-cum-hardware types to be complacent about it. The fact of the matter is that there are issues that hardware designers deal with as a matter of course (timing analysis, power considerations, asynchronous interfaces and the like) that are foreign to software. Some of these, such as behavior of a circuit with asynchronous inputs are insidious and may allow systems to be shipped with inherent design flaws. I've yet to see any tool that will keep an unwary user from unknowingly tripping over them. Frankly, I don't want to be on an airplane with control hardware designed by a software engineer. Are you planning to attend FPGA2003 at the end of this month? I'd love to debate this over a beer with you. Steve Casselman wrote: > > > We are coming into the age where 10's of thousands of programmers are going > to start using FPGA's. -- --Ray Andraka, P.E. President, the Andraka Consulting Group, Inc. 401/884-7930 Fax 401/884-7950 email ray@andraka.com http://www.andraka.com "They that give up essential liberty to obtain a little temporary safety deserve neither liberty nor safety." -Benjamin Franklin, 1759 ###### From: "Steve Casselman" Newsgroups: comp.arch.fpga References: <5c4d983.0302081113.48392c92@posting.google.com> <7f6d459a.0302111712.25f6f9f8@posting.google.com> Subject: Re: JBits Lines: 73 X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 6.00.2800.1106 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2800.1106 Message-ID: NNTP-Posting-Host: 64.164.172.64 X-Complaints-To: abuse@prodigy.net X-Trace: newssvr19.news.prodigy.com 1045167353 ST000 64.164.172.64 (Thu, 13 Feb 2003 15:15:53 EST) NNTP-Posting-Date: Thu, 13 Feb 2003 15:15:53 EST Organization: Prodigy Internet http://www.prodigy.com X-UserInfo1: SCSYQN_@OPVYRT@[JJIH^VTDEB\@PD\MNPWZKB]MPXHTEPIB_NVUAH_[BL[\IRKIANGGJBFNJF_DOLSCENSY^U@FRFUEXR@KFXYDBPWBCDQJA@X_DCBHXR[C@\EOKCJLED_SZ@RMWYXYWE_P@\\GOIW^@SYFFSWHFIXMADO@^[ADPRPETLBJ]RDGENSKQQZN Date: Thu, 13 Feb 2003 20:15:53 GMT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!feed3.newsreader.com!newsreader.com!news-xfer.cox.net!prodigy.com!newsmst01.news.prodigy.com!prodigy.com!postmaster.news.prodigy.com!newssvr19.news.prodigy.com.POSTED!2ac7f5fa!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:25847 > more useful were focused on > shortening reconfiguration times. As devices sizes go into the 10 - 100 million gate range you will want to think more along the line of a complete system with OS and other resources. Even in full applications most of the code stays around and just subroutines and processes are swapped in and out. It would be nice to have a 32 bit configuration interface. Todays systems are 8-bit external and 32-bit internal (or 100s of bits if you count a frame as the internal bit length). > Algorithmic programming of fpga's for wild-a$$ genetic search > machines is a great application, but it seems a ways off before > its ready for the masses of programmers writing software that manipulates > hardware in realtime. No I don't believe so. The way it is starting to look is: take an algorithm and a data set and generate a custom piece of hardware for that combination. So take a picture or image and generate a correlator based on that image http://www.doc.ic.ac.uk/~wl/papers/fccm02jg.pdf . This really shows you where reconfigurable computing systems and methodes are headed. > I can see your vision, but with the Xilinx 6000 demise, (too early to market?) > as an example, potential backers of open bitstream fpga architectures > should think long and hard. There is perceived value in having your hardware > designs distributed in a traditional confusticated form, produced and verified > by commodity toolchains (sim,syn,par, and timing). > The real problem with the 6200 was logic size and performance. Someday I believe that we will look at hardware designs as programming and accept that fact that you can disassemble a program if you really want to. While I'm not saying FPGA companies should abandon their current business models they should think about designing a device that is supposed to be programmed and understood by programmers. Some device that understands that it will have to fetch pieces of hardware over and over an OS that understands that computing is both changing hardware and changing software. It seems like every 20 years we start to have break throughs of this kind. In the 60's real computers were programmed by real programmers that programmed in assembly. In the 80's power DSP programmers programmed power applications using only assembly. In the '00's we have creative engineers creating magic using hardware programming tools. In the end clever people found how to capture that expertise and interpret computer languages so average people could do what use to take the top 5% burning the candle at both ends to accomplish. To really do this you need to publish the data so you can have 1000's of people working on it instead of just the people you pay. Imagine if there were no published data on a processor and the tool that company C made only had encrypted files so there was no way someone out side the company could make a compiler. Even if company C produced a great processor, competitor company D that published all the data would win in the market place. This is because other companies and individuals would work to provide tools and might do things company D or C did not think of (like timing driven place and route) and that would make a difference. But of course I'm just one dude with a dream. This kind of stuff will only come around when companies C and D have customers that want this and customers won't want it till it is proven and .... Opps I 'm back where I started.. Cheers Steve Steve ###### Path: chonsp.franklin.ch!not-for-mail From: Neil Franklin Newsgroups: comp.arch.fpga Subject: Re: JBits Date: 14 Feb 2003 23:16:24 +0100 Organization: My own Private Self Lines: 169 Message-ID: <6uvfzmwls7.fsf@chonsp.franklin.ch> References: <5c4d983.0302081113.48392c92@posting.google.com> <7f6d459a.0302111712.25f6f9f8@posting.google.com> NNTP-Posting-Host: chonsp.franklin.ch X-Trace: chonsp.franklin.ch 1045260984 647 10.0.3.2 (14 Feb 2003 22:16:24 GMT) X-Complaints-To: news@chonsp.franklin.ch NNTP-Posting-Date: 14 Feb 2003 22:16:24 GMT X-Newsreader: Gnus v5.7/Emacs 20.4 Xref: chonsp.franklin.ch comp.arch.fpga:25856 "Steve Casselman" writes: > > more useful were focused on > > shortening reconfiguration times. > > and processes are swapped in and out. It would be nice to have a 32 bit > configuration interface. Todays systems are 8-bit external and 32-bit > internal (or 100s of bits if you count a frame as the internal bit length). Or be able to swap frames of config bits config<->BRAMs. That is then 1000s of bits parallel. With them many BRAMs in VII that should go possible without adding more resources (just a bit of config control circuits), so long one only exchanges smallish sections. > > machines is a great application, but it seems a ways off before > > its ready for the masses of programmers writing software that manipulates > > hardware in realtime. > > No I don't believe so. Really just a case of the appropriate compiler. Anything that can be automated that way gets quickly used if it is usefull. But it first has to go through the possibilities discovery phase. Computers started around 1950. And took until 1970 to settle. Microprocessors stated then, and were stable about 1990. FPGAs OTOH have largly avoided even getting into that phase. > > I can see your vision, but with the Xilinx 6000 demise, (too early to > market?) > > as an example, potential backers of open bitstream fpga architectures > > should think long and hard. > The real problem with the 6200 was logic size and performance. Yup. Them small 3-input fixed function multiplexers requirded lots to get anywhere. And with small chips (64x64 array in 6216) one has roughly 32x32 LUTs, so about 2/3 XC2S50. Small. And with 2 rows of multiplexers per bit for an sensible data path and without carry logic, all arithmetic was very slow. Same problems killed Atmels AT6000. > There is perceived value in having your > hardware > > designs distributed in a traditional confusticated form Look into the VII DES encryption, for those that are paranoid[1]. [1] That is in its "mentally defect" meaning. Intels customers have not died from i188 and i386 machine code being public. Dito Motorolas from 680x0 and PPC being known. > Someday I > believe that we will look at hardware designs as programming Every FPGA interested person I know personally already does believe that. Of course programmers as beginner FPGA designers produce awfull messes, but so they did on their first processor program. And some will learn in time. And then someone writes a FPGA HOWTO with an "pitfalls" section, and the rest also get it. > and accept that > fact that you can disassemble a program if you really want to. And most likely will never do it, no more than it is done with most computer programs[2]. Better uses for time[3]. [2] And when, it is usually customers trying to patch an bug. [3] That is why open source designs are the way to go. Users incresingly demand this. > While I'm not > saying FPGA companies should abandon their current business models they > should think about designing a device that is supposed to be programmed and > understood by programmers. Some device that understands that it will have to > fetch pieces of hardware over and over an OS that understands that computing > is both changing hardware and changing software. A separate device just for the open crowd will not sell. Else Xilinx would have kept 6200 alive and grown it to larger sizes. > It seems like every 20 years we start to have break throughs of this kind. > In the 60's real computers were programmed by real programmers that > programmed in assembly. In the 80's power DSP programmers programmed power > applications using only assembly. And in between in the 1970s hobbyists took microprocessors that were intended for industrial control and started the PC revolution from them. Much to Intels and Motorolas surprise. > In the '00's we have creative engineers > creating magic using hardware programming tools. Yup, annother revolution just waiting to be happen. > In the end clever people > found how to capture that expertise and interpret computer languages so > average people could do what use to take the top 5% burning the candle at > both ends to accomplish. Yes. And the more of the creative people get a chance, the faster one of them is going to hit the right combination. Who of the Fortran and Algol (about VHDL and Verilog level development) toting people in the 1960s would have made or predicted C? It took an bunch of outsiders at AT&T to do it, the last ones anyone would have asked. > To really do this you need to publish the data so you can have 1000's of > people working on it instead of just the people you pay. Exactly. > company D that published all the data would win in the market place. This is > because other companies and individuals would work to provide tools and > might do things company D or C did not think of (like timing driven place > and route) and that would make a difference. And expecting then to go the "NDA -> closed source -> firm" route immediately gets rid of all individuals without interest in becoming vendors. And so a large amount of talent. > But of course I'm just one dude with a dream. One of thousands of dudes. Don't undersell yourself. Just look at the often reoccurence of this theme every few months. And that is just those that a) come her and b) complain, for triggering. > This kind of stuff will only > come around when companies C and D have customers that want this And managers who regard those customers as important. With other words: see the potential they are offering. Society noticed long ago that science brings more than dogma. Politics noticed long ago that democracy brings more than monarchy. Software is learning that open source brings more than closed source. FPGA manufacturers still seem to be in the stone age in this respect. I repeat my prediction: the first FPGA company to see the light will become the Intel of FPGAs, dominating the rest with an large distance. -- Neil Franklin, neil@franklin.ch.remove http://neil.franklin.ch/ Hacker, Unix Guru, El Eng HTL/BSc, Programmer, Archer, Blacksmith - hardware runs the world, software controls the hardware code generates the software, have you coded today?