From: rk Newsgroups: comp.arch.fpga Subject: Re: Silicon lifetime Date: 20 Sep 2002 23:46:48 GMT Organization: Just an OldEngineer Lines: 58 Message-ID: References: <6f080894.0208291343.4746da5a@posting.google.com> <3D6FBCE4.428E302B@xilinx.com> X-Trace: UmFuZG9tSVbgZHH5MPs7h0WZhr4j2lB8/b/NsNvKNu9+M4ATnkScOd08VQ4adxMR X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 20 Sep 2002 23:46:48 GMT X-No-Archive: yes User-Agent: Xnews/4.06.22 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!feed2.news.rcn.net!feed1.news.rcn.net!rcn!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:21139 Hal Murray wrote: >>The reliability-based lifetime of working silicon is much longer >>than 20 years. Silicon does not really age, if overstresses are >>avoided. > > Are the failure rates of silicon significantly dependent on > temperature? (like tantalum caps, for example) > > I'm interested in the case where there are no metal migration > type bugs in the design. (I realize that may not be a valid > assumption.) Are there always things like thin spots in wires > that make the tail of the curve temperature dependent? Hi Hal, I've studied the reliability numbers for a lot of the FPGA devices from multiple manufacturers and compared them with commercial, military, and hi-rel devices over the past 40 years. For modern devices, the reliability per commercial-grade device is quite good by any standard, using the published data. From empirical data in the lab, they do appear to be superior to even the Class S SSI/MSI devices of 15 years ago. When looking at reliability levels and comparing them historically as a function of gate count, current reliability levels are simply superb, in my opinion. As a general rule, failure rates are a function of temperature and there are charts and tables that give various accelleration factors for temperature and voltage stress. While normally higher temperatures lead to increased failure rates, with a 2 times increase for a 10 degree C rise as a general rule of thumb, that's not always the case and depends on the structures involved. Electromigration always is an issue and many of the commercially produced devices would not meet standard military specifications for step coverage, years ago, although that is less of an issue now because of planarized processes. Then again, with increased density, smaller feature sizes, high clock frequencies, and very high current levels, it's again a concern in general. The device designers are supposed to take this into account to guarantee long-term reliability. Again, from the published data and empirical data, it's just hard to kill these devices when put into normal use. DOA devices are not common; they were not uncommon with hi-rel devices 15 years ago. One thing to keep in mind is long-term storage for non-volatile memory structures, where you might see a guaranteed spec level at worst-case conditions of 10 years. For some applications, such as geosynchronous communications satellites, they are designed for a minimum operational life of from aruond 12-15 years, with the limited resource typically being station-keeping fuel. In cases such as this, qualification over a limited temperature range, for example, may be needed. Anyways, just a quick babble ... -- rk, Just an OldEngineer The ability to improve a design occurs primarily at the interfaces. This is also the prime location for screwing it up. -- from Akin's Laws of Spacecraft Design ###### From: Uwe Bonnes Newsgroups: comp.arch.fpga Subject: Re: Silicon lifetime Date: Sat, 21 Sep 2002 12:30:25 +0000 (UTC) Organization: TU Darmstadt Lines: 12 Sender: Uwe Bonnes Message-ID: References: <6f080894.0208291343.4746da5a@posting.google.com> <3D6FBCE4.428E302B@xilinx.com> NNTP-Posting-Host: hertz.ikp.physik.tu-darmstadt.de X-Trace: news.tu-darmstadt.de 1032611425 8135 130.83.24.91 (21 Sep 2002 12:30:25 GMT) X-Complaints-To: news@news.tu-darmstadt.de NNTP-Posting-Date: Sat, 21 Sep 2002 12:30:25 +0000 (UTC) x-no-archive: yes User-Agent: tin/1.4.4-20000803 ("Vet for the Insane") (UNIX) (Linux/2.4.18-4GB-SMP (i686)) Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!newsfeed.stueberl.de!newsfeed01.sul.t-online.de!t-online.de!news.belwue.de!news.tu-darmstadt.de!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:21148 rk wrote: ... : Anyways, just a quick babble ... Instructibve babble :-) -- Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt --------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------