From: Pierre-Olivier Laprise Subject: Virtex-II bit-file and strange configuration command Newsgroups: comp.arch.fpga User-Agent: tin/1.4.2-20000205 ("Possession") (UNIX) (Linux/2.4.18 (i686)) Lines: 39 Message-ID: Date: Fri, 06 Sep 2002 17:14:19 GMT NNTP-Posting-Host: 132.206.73.164 X-Complaints-To: abuse@mcgill.ca X-Trace: charlie.risq.qc.ca 1031332459 132.206.73.164 (Fri, 06 Sep 2002 13:14:19 EDT) NNTP-Posting-Date: Fri, 06 Sep 2002 13:14:19 EDT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsswitch.lcs.mit.edu!snoopy.risq.qc.ca!charlie.risq.qc.ca!53ab2750!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:20682 I'm interested in partial reconfiguration of Xilinx FPGAs, and have read all the relevant Xapps (151, 290, along with all the relevant data sheets...), but they all refer to Spartan-II and Virtex architectures (which are essentially identical). Does anyone know whether these documents can be applied to the Virtex-II architectures (at least as far as the configuration commands are concerned, if not the actual frame data)? Also, I followed the "Small-Bit Manipulations" flow described in Xapp290 and generated a bitstream (using bitgen -g ActiveReconfig:Yes -r) targeting the Spartan-II chip. However, when I look at the generated bitstream, there are a series of undocumented configuration commands. Specifically: - Write to Frame Address Register (FAR) - the address written is usually a frame between the first one previously written and the next one to be written - Write to Command Register - the command written is always 2, which is a reserved command, and undocumented - Write to register 14 - this register doesn't exist according to Xapp151, the value written is always 0x00000000 00000000 - Write to FAR - the address written is always 0x003a0e00 - Write 0x00000000 00000000 to register 14 - the above 2 steps are sometimes repeated - after this sequence, the configuration of the next frame starts. I don't think that this is a problem with my translation of the bit-stream, as there are too many regularities and too many elements that translate correctly. Does anyone have any ideas as to what this all amounts to? Thanks in advance, Pierre-Olivier ###### From: Phil James-Roxby Newsgroups: comp.arch.fpga Subject: Re: Virtex-II bit-file and strange configuration command Date: Fri, 06 Sep 2002 13:21:51 -0600 Organization: Xilinx, Inc. Lines: 57 Message-ID: <3D79004F.4DA0FAEC@xilinx.com> References: NNTP-Posting-Host: 149.199.177.163 Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Mailer: Mozilla 4.77 [en] (Windows NT 5.0; U) X-Accept-Language: en Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!out.nntp.be!propagator-SanJose!news-in-sanjose!cyclone-sf.pbi.net!216.218.192.242!news.he.net!news-out.spamkiller.net!propagator-maxim!news-in.spamkiller.net!usc.edu!attla2!attla1!ip.att.net!newsgate.xilinx.com!xbc-news.xilinx.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:20703 Check the Virtex II Platform FPGA handbook page 388 for information about the configuration registers in VII. For example, register 14 is the Product ID Code register. Phil Pierre-Olivier Laprise wrote: > > I'm interested in partial reconfiguration of Xilinx FPGAs, > and have read all the relevant Xapps (151, 290, along with > all the relevant data sheets...), but they all refer to > Spartan-II and Virtex architectures > (which are essentially identical). Does anyone know > whether these documents can be applied to the Virtex-II > architectures (at least as far as the configuration > commands are concerned, if not the actual frame data)? > > Also, I followed the "Small-Bit Manipulations" flow > described in Xapp290 and generated a bitstream (using bitgen > -g ActiveReconfig:Yes -r) targeting the Spartan-II chip. > However, when I look at the > generated bitstream, there are a series of undocumented > configuration commands. Specifically: > - Write to Frame Address Register (FAR) > - the address written is usually a frame between the > first one previously written and the next one to be > written > - Write to Command Register > - the command written is always 2, which is a reserved > command, and undocumented > - Write to register 14 > - this register doesn't exist according to Xapp151, the > value written is always 0x00000000 00000000 > - Write to FAR > - the address written is always 0x003a0e00 > - Write 0x00000000 00000000 to register 14 > - the above 2 steps are sometimes repeated > - after this sequence, the configuration of the next frame > starts. > > I don't think that this is a problem with my translation > of the bit-stream, as there are too many regularities and > too many elements that translate correctly. Does anyone > have any ideas as to what this all amounts to? > Thanks in advance, > > Pierre-Olivier -- -------------------------------------------------------------- __ / /\/ Dr Phil James-Roxby Direct Dial: 720.652.3767 \ \ Researcher Fax : 720.652.3599 / / Design Technology Group \_\/\ Xilinx Labs @ Longmont,CO Phil.James-Roxby@xilinx.com -------------------------------------------------------------- ###### Reply-To: "Steve Casselman" From: "Steve Casselman" Newsgroups: comp.arch.fpga References: Subject: Re: Virtex-II bit-file and strange configuration command Lines: 53 Organization: Virtual Computer Corporation X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 6.00.2600.0000 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2600.0000 Message-ID: <3L9e9.1010$Ag1.81394750@newssvr21.news.prodigy.com> NNTP-Posting-Host: 64.168.188.114 X-Complaints-To: abuse@prodigy.net X-Trace: newssvr21.news.prodigy.com 1031350335 ST000 64.168.188.114 (Fri, 06 Sep 2002 18:12:15 EDT) NNTP-Posting-Date: Fri, 06 Sep 2002 18:12:15 EDT X-UserInfo1: T[OWR\SEGBWAB]LYNCOF_W\@PJ_^PBQLGPQRZQMIWIWTEPIB_NVUAH_[BL[\IRKIANGGJBFNJF_DOLSCENSY^U@FRFUEXR@KFXYDBPWBCDQJA@X_DCBHXR[C@\EOKCJLED_SZ@RMWYXYWE_P@\\GOIW^@SYFFSWHFIXMADO@^[ADPRPETLBJ]RDGENSKQQZN Date: Fri, 06 Sep 2002 22:12:15 GMT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news.imp.ch!smallfeed.triton.net!triton.net!newsfeeder.triton.net!prodigy.com!newsmst01.news.prodigy.com!prodigy.com!postmaster.news.prodigy.com!newssvr21.news.prodigy.com.POSTED!2ac7f5fa!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:20769 The FrameAdderssRegister (FAR) hold the address the want your write to start at. Same for V1 and V2. Write to CMD register. A 2 is reserved in V1 and is a Multi-Frame write in a V2. The write to register 14 is to match the Product in the part. I'm guessing it flag an error is it is the wrong part number. I'm not clear about the FAR write to 0x003a0e00 this looks like some address inside the device. Steve "Pierre-Olivier Laprise" wrote in message news:Ln5e9.2205$016.292871@charlie.risq.qc.ca... > I'm interested in partial reconfiguration of Xilinx FPGAs, > and have read all the relevant Xapps (151, 290, along with > all the relevant data sheets...), but they all refer to > Spartan-II and Virtex architectures > (which are essentially identical). Does anyone know > whether these documents can be applied to the Virtex-II > architectures (at least as far as the configuration > commands are concerned, if not the actual frame data)? > > Also, I followed the "Small-Bit Manipulations" flow > described in Xapp290 and generated a bitstream (using bitgen > -g ActiveReconfig:Yes -r) targeting the Spartan-II chip. > However, when I look at the > generated bitstream, there are a series of undocumented > configuration commands. Specifically: > - Write to Frame Address Register (FAR) > - the address written is usually a frame between the > first one previously written and the next one to be > written > - Write to Command Register > - the command written is always 2, which is a reserved > command, and undocumented > - Write to register 14 > - this register doesn't exist according to Xapp151, the > value written is always 0x00000000 00000000 > - Write to FAR > - the address written is always 0x003a0e00 > - Write 0x00000000 00000000 to register 14 > - the above 2 steps are sometimes repeated > - after this sequence, the configuration of the next frame > starts. > > I don't think that this is a problem with my translation > of the bit-stream, as there are too many regularities and > too many elements that translate correctly. Does anyone > have any ideas as to what this all amounts to? > Thanks in advance, > > Pierre-Olivier