From: =?iso-8859-1?Q?St=E9phane?= Guyetant Newsgroups: comp.arch.fpga Subject: 5V tolerance Date: Tue, 18 Jun 2002 15:34:09 +0200 Organization: IRISA, Campus de Beaulieu, 35042 Rennes Cedex, FRANCE Lines: 14 Message-ID: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> NNTP-Posting-Host: curry.irisa.fr Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: news.irisa.fr 1024407250 14592 131.254.61.68 (18 Jun 2002 13:34:10 GMT) X-Complaints-To: usenet@irisa.fr NNTP-Posting-Date: 18 Jun 2002 13:34:10 GMT X-Mailer: Mozilla 4.79 [en] (X11; U; SunOS 5.8 sun4u) X-Accept-Language: en Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!fr.usenet-edu.net!usenet-edu.net!enst!univ-angers.fr!univ-rennes1.fr!irisa.fr!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18545 Hi all, after reading virtex "5V tolerant I/Os" (see http://www.xilinx.com/products/virtex/techtopic/vtt002.pdf ) and Spartan II functional description, I would say that I can use a Spartan-II (PQ208 package) with all VccO=3.3V in LVTTL mode directly on a 5V ATA bus with no need of resistor or buffering. Right? Any comment/suggestion appreciated! Thx, Stephane ###### From: Austin Lesea Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance Date: Tue, 18 Jun 2002 08:05:05 -0700 Organization: Xilinx Lines: 29 Message-ID: <3D0F4C21.DC19B563@xilinx.com> References: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> NNTP-Posting-Host: 149.199.9.10 Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: 8bit X-Mailer: Mozilla 4.79 [en]C-CCK-MCD (WinNT; U) X-Accept-Language: en,pdf Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed.mathworks.com!wn3feed!worldnet.att.net!204.127.198.203!attbi_feed3!attbi.com!12.120.28.17!attla2!ip.att.net!newsgate.xilinx.com!cliff.xsj.xilinx.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18518 Stéphane, I do not know what an ATA bus is, so I can not answer. As long as the IO drivers do not pull up to greater than Vcco + 0.5V with current more than 10 mA, no resistor is required. A quick IBIS simulation of the ATA output into a capacitive load would show if this is true. Do you have the IBIS models for the ATA bus driver? Is there a website for them? The resistor is required if one is able to source current at greater than Vcco + 0.5V to the Virtex input diode clamp. Austin Stéphane Guyetant wrote: > Hi all, > > after reading virtex "5V tolerant I/Os" > (see http://www.xilinx.com/products/virtex/techtopic/vtt002.pdf ) > and Spartan II functional description, I would say that I can use a > Spartan-II > (PQ208 package) with all VccO=3.3V in LVTTL mode directly on a 5V ATA > bus > with no need of resistor or buffering. Right? > > Any comment/suggestion appreciated! > Thx, > Stephane ###### From: =?iso-8859-1?Q?St=E9phane?= Guyetant Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance Date: Tue, 18 Jun 2002 18:51:40 +0200 Organization: IRISA, Campus de Beaulieu, 35042 Rennes Cedex, FRANCE Lines: 35 Message-ID: <3D0F651C.EC951DE1@no.spam.irisa.fr> References: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> <3D0F4C21.DC19B563@xilinx.com> NNTP-Posting-Host: curry.irisa.fr Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: 8bit X-Trace: news.irisa.fr 1024419101 25074 131.254.61.68 (18 Jun 2002 16:51:41 GMT) X-Complaints-To: usenet@irisa.fr NNTP-Posting-Date: 18 Jun 2002 16:51:41 GMT X-Mailer: Mozilla 4.79 [en] (X11; U; SunOS 5.8 sun4u) X-Accept-Language: en Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!fr.usenet-edu.net!usenet-edu.net!ciril.fr!univ-angers.fr!univ-rennes1.fr!irisa.fr!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18544 I meant ADA/IDE spec: the spartan will interface with a hard drive. I'm not familiar with IBIS models, but I bet I can find it easily for HDDs... Austin Lesea wrote: > Stéphane, > > I do not know what an ATA bus is, so I can not answer. As long as the IO > drivers do not pull up to greater than Vcco + 0.5V with current more than > 10 mA, no resistor is required. A quick IBIS simulation of the ATA > output into a capacitive load would show if this is true. Do you have > the IBIS models for the ATA bus driver? Is there a website for them? > > The resistor is required if one is able to source current at greater than > Vcco + 0.5V to the Virtex input diode clamp. > > Austin > > Stéphane Guyetant wrote: > > > Hi all, > > > > after reading virtex "5V tolerant I/Os" > > (see http://www.xilinx.com/products/virtex/techtopic/vtt002.pdf ) > > and Spartan II functional description, I would say that I can use a > > Spartan-II > > (PQ208 package) with all VccO=3.3V in LVTTL mode directly on a 5V ATA > > bus > > with no need of resistor or buffering. Right? > > > > Any comment/suggestion appreciated! > > Thx, > > Stephane ###### From: rickman Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance Date: Tue, 18 Jun 2002 15:55:27 -0400 Organization: Arius, Inc Lines: 64 Message-ID: <3D0F902F.89DA7E21@yahoo.com> References: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> <3D0F4C21.DC19B563@xilinx.com> <3D0F651C.EC951DE1@no.spam.irisa.fr> Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: 8bit X-Trace: UmFuZG9tSVaVSWO5ZgFylUWGAw2rBmCYXotkRlguzoE4u4IEFUZZWWlFMxszIWGT X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 18 Jun 2002 19:55:27 GMT X-Mailer: Mozilla 4.7 [en] (Win95; U) X-Accept-Language: en Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!newsfeed.icl.net!newsfeed.icl.net!news.maxwell.syr.edu!feed2.news.rcn.net!feed1.news.rcn.net!rcn!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18509 ATA is correct. In fact I have been told that IDE is not really the correct name anymore and it sould ONLY be called ATA. I can't say I have seen a source for IBIS description files for the ATA bus. It uses 5 volt TTL logic levels so I would not feel safe without the series resistors. But the series resistors are only usable on inputs or slow IOs. If you are running at the full 66 MHz of the most recent ATA bus spec, you may run into trouble with rise/fall time when driving from the FPGA. I recommend that you use a 5 volt tolerant interface device or FPGA. The resistor trick is very limited in range of applications. Stéphane Guyetant wrote: > > I meant ADA/IDE spec: the spartan will interface with a hard drive. > I'm not familiar with IBIS models, but I bet I can find it easily for > HDDs... > > Austin Lesea wrote: > > > Stéphane, > > > > I do not know what an ATA bus is, so I can not answer. As long as the IO > > drivers do not pull up to greater than Vcco + 0.5V with current more than > > 10 mA, no resistor is required. A quick IBIS simulation of the ATA > > output into a capacitive load would show if this is true. Do you have > > the IBIS models for the ATA bus driver? Is there a website for them? > > > > The resistor is required if one is able to source current at greater than > > Vcco + 0.5V to the Virtex input diode clamp. > > > > Austin > > > > Stéphane Guyetant wrote: > > > > > Hi all, > > > > > > after reading virtex "5V tolerant I/Os" > > > (see http://www.xilinx.com/products/virtex/techtopic/vtt002.pdf ) > > > and Spartan II functional description, I would say that I can use a > > > Spartan-II > > > (PQ208 package) with all VccO=3.3V in LVTTL mode directly on a 5V ATA > > > bus > > > with no need of resistor or buffering. Right? > > > > > > Any comment/suggestion appreciated! > > > Thx, > > > Stephane -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAX ###### From: Austin Lesea Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance Date: Tue, 18 Jun 2002 14:02:07 -0700 Organization: Xilinx Lines: 75 Message-ID: <3D0F9FCF.2AE2A8B3@xilinx.com> References: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> <3D0F4C21.DC19B563@xilinx.com> <3D0F651C.EC951DE1@no.spam.irisa.fr> <3D0F902F.89DA7E21@yahoo.com> NNTP-Posting-Host: 149.199.9.10 Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: 8bit X-Mailer: Mozilla 4.79 [en]C-CCK-MCD (WinNT; U) X-Accept-Language: en,pdf Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed.mathworks.com!wn3feed!worldnet.att.net!204.127.198.203!attbi_feed3!attbi.com!12.120.28.17!attla2!attla1!ip.att.net!newsgate.xilinx.com!cliff.xsj.xilinx.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18523 Rick, I would still do the IBIS simualtion to see if the 5V is really there. Also, Virtex is 5V tolerant without any resistor at all (ie 5V PCI interface IO standard). It is only in Virtex E and later parts where the resistor is going to be (possibly) required. Austin rickman wrote: > ATA is correct. In fact I have been told that IDE is not really the > correct name anymore and it sould ONLY be called ATA. > > I can't say I have seen a source for IBIS description files for the ATA > bus. It uses 5 volt TTL logic levels so I would not feel safe without > the series resistors. But the series resistors are only usable on > inputs or slow IOs. If you are running at the full 66 MHz of the most > recent ATA bus spec, you may run into trouble with rise/fall time when > driving from the FPGA. > > I recommend that you use a 5 volt tolerant interface device or FPGA. > The resistor trick is very limited in range of applications. > > Stéphane Guyetant wrote: > > > > I meant ADA/IDE spec: the spartan will interface with a hard drive. > > I'm not familiar with IBIS models, but I bet I can find it easily for > > HDDs... > > > > Austin Lesea wrote: > > > > > Stéphane, > > > > > > I do not know what an ATA bus is, so I can not answer. As long as the IO > > > drivers do not pull up to greater than Vcco + 0.5V with current more than > > > 10 mA, no resistor is required. A quick IBIS simulation of the ATA > > > output into a capacitive load would show if this is true. Do you have > > > the IBIS models for the ATA bus driver? Is there a website for them? > > > > > > The resistor is required if one is able to source current at greater than > > > Vcco + 0.5V to the Virtex input diode clamp. > > > > > > Austin > > > > > > Stéphane Guyetant wrote: > > > > > > > Hi all, > > > > > > > > after reading virtex "5V tolerant I/Os" > > > > (see http://www.xilinx.com/products/virtex/techtopic/vtt002.pdf ) > > > > and Spartan II functional description, I would say that I can use a > > > > Spartan-II > > > > (PQ208 package) with all VccO=3.3V in LVTTL mode directly on a 5V ATA > > > > bus > > > > with no need of resistor or buffering. Right? > > > > > > > > Any comment/suggestion appreciated! > > > > Thx, > > > > Stephane > > -- > > Rick "rickman" Collins > > rick.collins@XYarius.com > Ignore the reply address. To email me use the above address with the XY > removed. > > Arius - A Signal Processing Solutions Company > Specializing in DSP and FPGA design URL http://www.arius.com > 4 King Ave 301-682-7772 Voice > Frederick, MD 21701-3110 301-682-7666 FAX ###### Message-ID: <3D0FD6EA.8306067C@andraka.com> From: Ray Andraka Organization: Andraka Consulting Group, Inc X-Mailer: Mozilla 4.77 [en] (WinNT; U) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance References: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> <3D0F4C21.DC19B563@xilinx.com> <3D0F651C.EC951DE1@no.spam.irisa.fr> <3D0F902F.89DA7E21@yahoo.com> Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: 8bit Lines: 90 Date: Wed, 19 Jun 2002 00:55:26 GMT NNTP-Posting-Host: 68.15.41.165 X-Complaints-To: abuse@cox.net X-Trace: news1.east.cox.net 1024448126 68.15.41.165 (Tue, 18 Jun 2002 20:55:26 EDT) NNTP-Posting-Date: Tue, 18 Jun 2002 20:55:26 EDT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!newsfeed.icl.net!opentransit.net!fr.clara.net!heighliner.fr.clara.net!newsfeed.stueberl.de!cox.net!p02!news1.east.cox.net.POSTED!53ab2750!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18527 The ATA standard only specifies (5v) TTL level signals. AFAIK, it is up to the manufacturer to choose whatever logic family he wants for the disk side of theinterface provided he fits within the specification. SInce you normally will not know what device the manufacturer is using (and if you allow use with any drive), you must accept any signal level that conforms to the spec. Likewise, I sincerely doubt you will be able to get IBIS models for the drive, and even if you could they would only be for a specific drive. The data bits on the bus are bidirectional, so you will have considerable trouble trying to get the resistor trick to work reliably. I highly recommend using one of the 5v tolerant devices to interface to the disk, otherwise, you are going to need to use a level translator to interface it. For Xilinx families that means either the original Virtex or SpartanII (not E) for new designs. rickman wrote: > ATA is correct. In fact I have been told that IDE is not really the > correct name anymore and it sould ONLY be called ATA. > > I can't say I have seen a source for IBIS description files for the ATA > bus. It uses 5 volt TTL logic levels so I would not feel safe without > the series resistors. But the series resistors are only usable on > inputs or slow IOs. If you are running at the full 66 MHz of the most > recent ATA bus spec, you may run into trouble with rise/fall time when > driving from the FPGA. > > I recommend that you use a 5 volt tolerant interface device or FPGA. > The resistor trick is very limited in range of applications. > > Stéphane Guyetant wrote: > > > > I meant ADA/IDE spec: the spartan will interface with a hard drive. > > I'm not familiar with IBIS models, but I bet I can find it easily for > > HDDs... > > > > Austin Lesea wrote: > > > > > Stéphane, > > > > > > I do not know what an ATA bus is, so I can not answer. As long as the IO > > > drivers do not pull up to greater than Vcco + 0.5V with current more than > > > 10 mA, no resistor is required. A quick IBIS simulation of the ATA > > > output into a capacitive load would show if this is true. Do you have > > > the IBIS models for the ATA bus driver? Is there a website for them? > > > > > > The resistor is required if one is able to source current at greater than > > > Vcco + 0.5V to the Virtex input diode clamp. > > > > > > Austin > > > > > > Stéphane Guyetant wrote: > > > > > > > Hi all, > > > > > > > > after reading virtex "5V tolerant I/Os" > > > > (see http://www.xilinx.com/products/virtex/techtopic/vtt002.pdf ) > > > > and Spartan II functional description, I would say that I can use a > > > > Spartan-II > > > > (PQ208 package) with all VccO=3.3V in LVTTL mode directly on a 5V ATA > > > > bus > > > > with no need of resistor or buffering. Right? > > > > > > > > Any comment/suggestion appreciated! > > > > Thx, > > > > Stephane > > -- > > Rick "rickman" Collins > > rick.collins@XYarius.com > Ignore the reply address. To email me use the above address with the XY > removed. > > Arius - A Signal Processing Solutions Company > Specializing in DSP and FPGA design URL http://www.arius.com > 4 King Ave 301-682-7772 Voice > Frederick, MD 21701-3110 301-682-7666 FAX -- --Ray Andraka, P.E. President, the Andraka Consulting Group, Inc. 401/884-7930 Fax 401/884-7950 email ray@andraka.com http://www.andraka.com "They that give up essential liberty to obtain a little temporary safety deserve neither liberty nor safety." -Benjamin Franklin, 1759 ###### Message-ID: <3D1036B8.A9DA8FC@algor.co.uk> From: Rick Filipkiewicz X-Mailer: Mozilla 4.75 [en] (WinNT; U) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance References: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> <3D0F4C21.DC19B563@xilinx.com> <3D0F651C.EC951DE1@no.spam.irisa.fr> <3D0F902F.89DA7E21@yahoo.com> <3D0FD6EA.8306067C@andraka.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Organization: Algorithmics Ltd. Cache-Post-Path: mudchute.algor.co.uk!unknown@rfhome.algor.co.uk X-Cache: nntpcache 2.4.0b2 (see http://www.nntpcache.org/) Lines: 24 Date: Wed, 19 Jun 2002 08:46:00 +0100 NNTP-Posting-Host: 62.254.210.251 X-Complaints-To: abuse@ntlworld.com X-Trace: news6-win.server.ntlworld.com 1024472763 62.254.210.251 (Wed, 19 Jun 2002 08:46:03 BST) NNTP-Posting-Date: Wed, 19 Jun 2002 08:46:03 BST Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!newsfeed.stueberl.de!newspeer1-gui.server.ntli.net!ntli.net!news6-win.server.ntlworld.com.POSTED!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18517 Ray Andraka wrote: > The ATA standard only specifies (5v) TTL level signals. AFAIK, it is up to the > manufacturer to choose whatever logic family he wants for the disk side of > theinterface provided he fits within the specification. SInce you normally will > not know what device the manufacturer is using (and if you allow use with any > drive), you must accept any signal level that conforms to the spec. Likewise, I > sincerely doubt you will be able to get IBIS models for the drive, and even if > you could they would only be for a specific drive. The data bits on the bus are > bidirectional, so you will have considerable trouble trying to get the resistor > trick to work reliably. I highly recommend using one of the 5v tolerant devices > to interface to the disk, otherwise, you are going to need to use a level > translator to interface it. For Xilinx families that means either the original > Virtex or SpartanII (not E) for new designs. > I think that for IDE drives supporting UDMA100 (ATA mode 5) the IO supply and signalling are supposed to be 3.3V and there are some heavy requirements on the cable & connector for modes > 2. Any IBIS modelling might have to take the ribbon cable into account if the disk is not being directly mounted on the PCB with a right-angled socket. ###### Message-ID: <3D1074DE.32670CFE@andraka.com> From: Ray Andraka Organization: Andraka Consulting Group, Inc X-Mailer: Mozilla 4.77 [en] (WinNT; U) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance References: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> <3D0F4C21.DC19B563@xilinx.com> <3D0F651C.EC951DE1@no.spam.irisa.fr> <3D0F902F.89DA7E21@yahoo.com> <3D0FD6EA.8306067C@andraka.com> <3D1036B8.A9DA8FC@algor.co.uk> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 34 Date: Wed, 19 Jun 2002 12:09:23 GMT NNTP-Posting-Host: 68.15.41.165 X-Complaints-To: abuse@cox.net X-Trace: news1.east.cox.net 1024488563 68.15.41.165 (Wed, 19 Jun 2002 08:09:23 EDT) NNTP-Posting-Date: Wed, 19 Jun 2002 08:09:23 EDT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!fr.usenet-edu.net!usenet-edu.net!proxad.net!proxad.net!newspeer1-gui.server.ntli.net!ntli.net!cox.net!p02!news1.east.cox.net.POSTED!53ab2750!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18526 I am pretty sure the ATA-5 still uses 5v, although it may limit the signal excursions to 3.3v. The cable requirements are for the higher modes (don't remember which one it starts on). Basically, there is a length restriction and it requires every other conductor to be a ground. If you are using strictly a UDMA100 drive, you can design to that interface, but if you need backwards compatibility you need to be able to accept 5v signalling. I think getting an IBIS model for the interface is the stuff of fairy tales. There are too many variations between manufacturers and installations, although if it is a strictly UDMA100 installation it will be a lot more consistent. Rick Filipkiewicz wrote: > Ray Andraka wrote: > > > I think that for IDE drives supporting UDMA100 (ATA mode 5) the IO supply and > signalling are supposed to be 3.3V and there are some heavy requirements on the > cable & connector for modes > 2. Any IBIS modelling might have to take the ribbon > cable into account if the disk is not being directly mounted on the PCB with a > right-angled socket. -- --Ray Andraka, P.E. President, the Andraka Consulting Group, Inc. 401/884-7930 Fax 401/884-7950 email ray@andraka.com http://www.andraka.com "They that give up essential liberty to obtain a little temporary safety deserve neither liberty nor safety." -Benjamin Franklin, 1759 ###### From: rickman Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance Date: Wed, 19 Jun 2002 10:21:53 -0400 Organization: Arius, Inc Lines: 42 Message-ID: <3D109381.386DEAEE@yahoo.com> References: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> <3D0F4C21.DC19B563@xilinx.com> <3D0F651C.EC951DE1@no.spam.irisa.fr> <3D0F902F.89DA7E21@yahoo.com> <3D0FBC06.4BD9C4EC@NO-SPAMxilinx.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: UmFuZG9tSVYaHroEPGCEm3RN8KAMx3XGB3j+MWpaIzF+2sNemLcdOgc314PupJSk X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 19 Jun 2002 14:21:39 GMT X-Mailer: Mozilla 4.7 [en] (Win95; U) X-Accept-Language: en Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!newsfeed.icl.net!news.algonet.se!algonet!nntp.abs.net!feed2.news.rcn.net!feed1.news.rcn.net!rcn!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18508 Not trying to start an argument. But I have read that IDE is not used in the specs anywhere and ATA has been the sole name for quite a while. To quote your reference. "Most companies now call the interface by its proper name: ATA or ATAPI" IDE is still used a lot, but mostly by consumers and marketing. All the specs use ATA. Davis Moore wrote: > > rickman wrote: > > > ATA is correct. In fact I have been told that IDE is not really the > > correct name anymore and it sould ONLY be called ATA. > > > > Historically IDE and ATA meant the same thing. > Perhaps the industry is moving towards a preference. > > A brief history on ATA/IDE interface: > http://www.ata-atapi.com/hist.htm > > -- > Davis Moore > Software Engineer -- PLP Implementation Tools > Xilinx, Inc. davism@NO_SPAMxilinx.com -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAX ###### From: "Bevan Weiss" Newsgroups: comp.arch.fpga References: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> <3D0F4C21.DC19B563@xilinx.com> <3D0F651C.EC951DE1@no.spam.irisa.fr> <3D0F902F.89DA7E21@yahoo.com> <3D0FD6EA.8306067C@andraka.com> <3D1036B8.A9DA8FC@algor.co.uk> <3D1074DE.32670CFE@andraka.com> Subject: Re: 5V tolerance Lines: 53 X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 6.00.2600.0000 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2600.0000 Organization: Orcon Internet Message-ID: <1024560390.776655@aknx2.orcon.net.nz> Cache-Post-Path: aknx2.orcon.net.nz!unknown@port54-31-57.adsl.net4u.co.nz X-Cache: nntpcache 2.4.0b5 (see http://www.nntpcache.org/) X-Original-NNTP-Posting-Host: e0.aknx2.orcon.net.nz X-Original-Trace: 20 Jun 2002 20:54:32 +1200, e0.aknx2.orcon.net.nz Date: Thu, 20 Jun 2002 20:59:15 +1200 NNTP-Posting-Host: 210.48.22.5 X-Complaints-To: abuse@tsnz.net X-Trace: news02.tsnz.net 1024563277 210.48.22.5 (Thu, 20 Jun 2002 20:54:37 NZST) NNTP-Posting-Date: Thu, 20 Jun 2002 20:54:37 NZST Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.imp.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed-west.nntpserver.com!hub1.meganetnews.com!nntpserver.com!DirecTVinternet!DirecTV-DSL!news-out.newsfeeds.com!propagator2-maxim!propagator-maxim!news-in.spamkiller.net!news02.tsnz.net!news.nz.asiaonline.net Xref: chonsp.franklin.ch comp.arch.fpga:18605 None of the ATA specs that I can find (ATA6 or ATA4) even specify the maximum input or output voltage except to say that the minimum is still TTL levels (2.4V out high and 0.5V out low, 2.0V in high and 0.8V in low. "Ray Andraka" wrote in message news:3D1074DE.32670CFE@andraka.com... > I am pretty sure the ATA-5 still uses 5v, although it may limit the signal excursions > to 3.3v. The cable requirements are for the higher modes (don't remember which one it > starts on). Basically, there is a length restriction and it requires every other > conductor to be a ground. If you are using strictly a UDMA100 drive, you can design > to that interface, but if you need backwards compatibility you need to be able to > accept 5v signalling. > > I think getting an IBIS model for the interface is the stuff of fairy tales. There > are too many variations between manufacturers and installations, although if it is a > strictly UDMA100 installation it will be a lot more consistent. > > Rick Filipkiewicz wrote: > > > Ray Andraka wrote: > > > > > > I think that for IDE drives supporting UDMA100 (ATA mode 5) the IO supply and > > signalling are supposed to be 3.3V and there are some heavy requirements on the > > cable & connector for modes > 2. Any IBIS modelling might have to take the ribbon > > cable into account if the disk is not being directly mounted on the PCB with a > > right-angled socket. > > -- > --Ray Andraka, P.E. > President, the Andraka Consulting Group, Inc. > 401/884-7930 Fax 401/884-7950 > email ray@andraka.com > http://www.andraka.com > > "They that give up essential liberty to obtain a little > temporary safety deserve neither liberty nor safety." > -Benjamin Franklin, 1759 > > ###### From: "Austin Franklin" Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance Date: Thu, 20 Jun 2002 11:29:07 -0400 Organization: Posted via Supernews, http://www.supernews.com Message-ID: References: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> <3D0F4C21.DC19B563@xilinx.com> <3D0F651C.EC951DE1@no.spam.irisa.fr> <3D0F902F.89DA7E21@yahoo.com> <3D0F9FCF.2AE2A8B3@xilinx.com> X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 6.00.2600.0000 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2600.0000 X-Complaints-To: newsabuse@supernews.com Lines: 25 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!sn-xit-03!sn-post-01!supernews.com!corp.supernews.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18611 "Austin Lesea" wrote in message news:3D0F9FCF.2AE2A8B3@xilinx.com... > Also, Virtex is 5V tolerant without any resistor at all (ie 5V PCI interface IO > standard). It is only in Virtex E and later parts where the resistor is going to > be (possibly) required. Hi Austin, I believe he said he wanted to use a Spartan II. Does the same still apply? Regards, Austin P.S. The 3.3V EDO DRAMs seem to work fine with the 5V Spartan part...I have 18 boards that has been used quite heavily, two for a few weeks now, 24 hours a day, and we've seen not a wit of a problem. Thanks again for your support there! ###### Message-ID: <3D120F32.7321A03@andraka.com> From: Ray Andraka Organization: Andraka Consulting Group, Inc X-Mailer: Mozilla 4.77 [en] (WinNT; U) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance References: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> <3D0F4C21.DC19B563@xilinx.com> <3D0F651C.EC951DE1@no.spam.irisa.fr> <3D0F902F.89DA7E21@yahoo.com> <3D0F9FCF.2AE2A8B3@xilinx.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 38 Date: Thu, 20 Jun 2002 17:20:03 GMT NNTP-Posting-Host: 68.15.41.165 X-Complaints-To: abuse@cox.net X-Trace: news1.east.cox.net 1024593603 68.15.41.165 (Thu, 20 Jun 2002 13:20:03 EDT) NNTP-Posting-Date: Thu, 20 Jun 2002 13:20:03 EDT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!fr.usenet-edu.net!usenet-edu.net!fr.clara.net!heighliner.fr.clara.net!newsfeed.stueberl.de!cox.net!p02!news1.east.cox.net.POSTED!53ab2750!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18590 SpartanII and Virtex have 5v tolerant 3.3v I/O. Austin Franklin wrote: > "Austin Lesea" wrote in message > news:3D0F9FCF.2AE2A8B3@xilinx.com... > > > Also, Virtex is 5V tolerant without any resistor at all (ie 5V PCI > interface IO > > standard). It is only in Virtex E and later parts where the resistor is > going to > > be (possibly) required. > > Hi Austin, > > I believe he said he wanted to use a Spartan II. Does the same still apply? > > Regards, > > Austin > > P.S. The 3.3V EDO DRAMs seem to work fine with the 5V Spartan part...I have > 18 boards that has been used quite heavily, two for a few weeks now, 24 > hours a day, and we've seen not a wit of a problem. Thanks again for your > support there! -- --Ray Andraka, P.E. President, the Andraka Consulting Group, Inc. 401/884-7930 Fax 401/884-7950 email ray@andraka.com http://www.andraka.com "They that give up essential liberty to obtain a little temporary safety deserve neither liberty nor safety." -Benjamin Franklin, 1759 ###### From: "Dan Kuechle" Newsgroups: comp.arch.fpga References: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> <3D0F4C21.DC19B563@xilinx.com> <3D0F651C.EC951DE1@no.spam.irisa.fr> <3D0F902F.89DA7E21@yahoo.com> <3D0FD6EA.8306067C@andraka.com> <3D1036B8.A9DA8FC@algor.co.uk> <3D1074DE.32670CFE@andraka.com> <1024560390.776655@aknx2.orcon.net.nz> Subject: Re: 5V tolerance Lines: 46 X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 5.50.4133.2400 X-MimeOLE: Produced By Microsoft MimeOLE V5.50.4133.2400 Message-ID: Date: Thu, 20 Jun 2002 13:37:21 -0500 NNTP-Posting-Host: 209.98.212.61 X-Complaints-To: abuse@visi.com X-Trace: ruti.visi.com 1024598296 209.98.212.61 (Thu, 20 Jun 2002 13:38:16 CDT) NNTP-Posting-Date: Thu, 20 Jun 2002 13:38:16 CDT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!newsfeed.icl.net!news.maxwell.syr.edu!news-out.visi.com!hermes.visi.com!ruti.visi.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18631 All ATA signals have at least 44 ohms of series termination between driver and load, with the majority of the signals having 66 ohms or more. Furthermore, the ATA spec says the output drivers should be 4 ma. Since the 5v tolerant issue is really a current issue, 5v --> 3.3v thru 100 ohm ==> Xilinx has a problem when the current exceeds 17 ma, which a 4 ma driver should not be able to do. Dan "Bevan Weiss" wrote in message news:1024560390.776655@aknx2.orcon.net.nz... > None of the ATA specs that I can find (ATA6 or ATA4) even specify the > maximum input or output voltage except to say that the minimum is still TTL > levels (2.4V out high and 0.5V out low, 2.0V in high and 0.8V in low. > > "Ray Andraka" wrote in message > news:3D1074DE.32670CFE@andraka.com... > > I am pretty sure the ATA-5 still uses 5v, although it may limit the signal > excursions > > to 3.3v. The cable requirements are for the higher modes (don't remember > which one it > > starts on). Basically, there is a length restriction and it requires > every other > > conductor to be a ground. If you are using strictly a UDMA100 drive, you > can design > > to that interface, but if you need backwards compatibility you need to be > able to > > accept 5v signalling. > > > > I think getting an IBIS model for the interface is the stuff of fairy > tales. There > > are too many variations between manufacturers and installations, although > if it is a > > strictly UDMA100 installation it will be a lot more consistent. > > ###### Message-ID: <3D125DEE.2B05B0CB@algor.co.uk> From: Rick Filipkiewicz X-Mailer: Mozilla 4.75 [en] (WinNT; U) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance References: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> <3D0F4C21.DC19B563@xilinx.com> <3D0F651C.EC951DE1@no.spam.irisa.fr> <3D0F902F.89DA7E21@yahoo.com> <3D0FD6EA.8306067C@andraka.com> <3D1036B8.A9DA8FC@algor.co.uk> <3D1074DE.32670CFE@andraka.com> <1024560390.776655@aknx2.orcon.net.nz> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Organization: Algorithmics Ltd. Cache-Post-Path: mudchute.algor.co.uk!unknown@rfhome.algor.co.uk X-Cache: nntpcache 2.4.0b2 (see http://www.nntpcache.org/) Lines: 31 Date: Thu, 20 Jun 2002 23:57:50 +0100 NNTP-Posting-Host: 62.254.210.251 X-Complaints-To: abuse@ntlworld.com X-Trace: news6-win.server.ntlworld.com 1024613873 62.254.210.251 (Thu, 20 Jun 2002 23:57:53 BST) NNTP-Posting-Date: Thu, 20 Jun 2002 23:57:53 BST Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!newsfeed.icl.net!newsfeed.freenet.de!newsfeed.stueberl.de!newspeer1-gui.server.ntli.net!ntli.net!news6-win.server.ntlworld.com.POSTED!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18648 Dan Kuechle wrote: > All ATA signals have at least 44 ohms of series termination between driver > and load, with the majority of the signals having 66 ohms or more. > Furthermore, > the ATA spec says the output drivers should be 4 ma. Since the 5v tolerant > issue > is really a current issue, 5v --> 3.3v thru 100 ohm ==> Xilinx has a problem > when > the current exceeds 17 ma, which a 4 ma driver should not be able to do. > > Dan > > Dan, You forgot that the "tolerance" issue with Virtex-E is current through the clamp diode so for an 0.7V diode drop 100R => problem when current exceeds 10mA (Austing Lesea will correct me if I'm wrong here, say if the diode is a Schottky with drop less than 0.7). Also: Is the 4mA ATA spec. a minimum ? The problem being that some el-cheapo IDE drive might play all sorts of fast and loose games with the ATA spec so at least a QuickSwitch type part might be a safety investment. I've always had a basic rule that no external connector is wired direct into an expensive and hard to replace FPGA ... had too many boards returned where someone thought a 9-pin D-Type was where the mains plugged in :-). ###### From: Austin Lesea Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance Date: Thu, 20 Jun 2002 16:26:42 -0700 Organization: Xilinx Lines: 40 Message-ID: <3D1264B2.23820C0F@xilinx.com> References: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> <3D0F4C21.DC19B563@xilinx.com> <3D0F651C.EC951DE1@no.spam.irisa.fr> <3D0F902F.89DA7E21@yahoo.com> <3D0FD6EA.8306067C@andraka.com> <3D1036B8.A9DA8FC@algor.co.uk> <3D1074DE.32670CFE@andraka.com> <1024560390.776655@aknx2.orcon.net.nz> <3D125DEE.2B05B0CB@algor.co.uk> NNTP-Posting-Host: 149.199.9.10 Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Mailer: Mozilla 4.79 [en]C-CCK-MCD (WinNT; U) X-Accept-Language: en,pdf Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!newsfeed.icl.net!news.maxwell.syr.edu!nntp1.phx1.gblx.net!nntp.gblx.net!nntp.gblx.net!newsfeed.news2me.com!newsfeed2.earthlink.net!newsfeed.earthlink.net!wn4feed!worldnet.att.net!204.127.198.204!attbi_feed4!attbi.com!12.120.28.17!attla2!ip.att.net!newsgate.xilinx.com!cliff.xsj.xilinx.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18636 Rick, Absolutely correct. If this is a long cable to/from hell, then a "sacrificial part" is a good investment. Austin Rick Filipkiewicz wrote: > Dan Kuechle wrote: > > > All ATA signals have at least 44 ohms of series termination between driver > > and load, with the majority of the signals having 66 ohms or more. > > Furthermore, > > the ATA spec says the output drivers should be 4 ma. Since the 5v tolerant > > issue > > is really a current issue, 5v --> 3.3v thru 100 ohm ==> Xilinx has a problem > > when > > the current exceeds 17 ma, which a 4 ma driver should not be able to do. > > > > Dan > > > > > > Dan, > > You forgot that the "tolerance" issue with Virtex-E is current through the clamp > diode so for an 0.7V diode drop 100R => problem when current exceeds 10mA > (Austing Lesea will correct me if I'm wrong here, say if the diode is a Schottky > with drop less than 0.7). > > Also: Is the 4mA ATA spec. a minimum ? The problem being that some el-cheapo IDE > drive might play all sorts of fast and loose games with the ATA spec so at least > a QuickSwitch type part might be a safety investment. I've always had a basic > rule that no external connector is wired direct into an expensive and hard to > replace FPGA ... had too many boards returned where someone thought a 9-pin > D-Type was where the mains plugged in :-). ###### Message-ID: <3D127452.A0FA1689@ecubics.com> Date: Thu, 20 Jun 2002 18:33:22 -0600 From: emanuel stiebler X-Mailer: Mozilla 4.79 [en] (Windows NT 5.0; U) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance References: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> <3D0F4C21.DC19B563@xilinx.com> <3D0F651C.EC951DE1@no.spam.irisa.fr> <3D0F902F.89DA7E21@yahoo.com> <3D0FD6EA.8306067C@andraka.com> <3D1036B8.A9DA8FC@algor.co.uk> <3D1074DE.32670CFE@andraka.com> <1024560390.776655@aknx2.orcon.net.nz> <3D125DEE.2B05B0CB@algor.co.uk> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 12 NNTP-Posting-Host: 63.90.186.226 X-Trace: 1024619098 reader2.ash.ops.us.uu.net 13788 63.90.186.226 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!nntp.abs.net!uunet!dca.uu.net!ash.uu.net!spool0900.news.uu.net!reader0902.news.uu.net!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18642 Rick Filipkiewicz wrote: > > Also: Is the 4mA ATA spec. a minimum ? The problem being that some el-cheapo IDE > drive might play all sorts of fast and loose games with the ATA spec so at least > a QuickSwitch type part might be a safety investment. I've always had a basic > rule that no external connector is wired direct into an expensive and hard to > replace FPGA ... had too many boards returned where someone thought a 9-pin > D-Type was where the mains plugged in :-). Which Quickswitches do you you for that ? cheers ###### Message-ID: <3D127D92.A2F7293B@andraka.com> From: Ray Andraka Organization: Andraka Consulting Group, Inc X-Mailer: Mozilla 4.77 [en] (WinNT; U) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance References: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> <3D0F4C21.DC19B563@xilinx.com> <3D0F651C.EC951DE1@no.spam.irisa.fr> <3D0F902F.89DA7E21@yahoo.com> <3D0F9FCF.2AE2A8B3@xilinx.com> <3D120F32.7321A03@andraka.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 21 Date: Fri, 21 Jun 2002 01:10:58 GMT NNTP-Posting-Host: 68.15.41.165 X-Complaints-To: abuse@cox.net X-Trace: news1.east.cox.net 1024621858 68.15.41.165 (Thu, 20 Jun 2002 21:10:58 EDT) NNTP-Posting-Date: Thu, 20 Jun 2002 21:10:58 EDT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!newsfeed.stueberl.de!cox.net!p02!news1.east.cox.net.POSTED!53ab2750!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18647 Right, but that is not recommended for new designs at this point. Theron Hicks wrote: > "Ray Andraka" wrote in message > news:3D120F32.7321A03@andraka.com... > > SpartanII and Virtex have 5v tolerant 3.3v I/O. > So does SpartanXL -- --Ray Andraka, P.E. President, the Andraka Consulting Group, Inc. 401/884-7930 Fax 401/884-7950 email ray@andraka.com http://www.andraka.com "They that give up essential liberty to obtain a little temporary safety deserve neither liberty nor safety." -Benjamin Franklin, 1759 ###### Message-ID: <3D134C52.DCF1403E@algor.co.uk> From: Rick Filipkiewicz X-Mailer: Mozilla 4.75 [en] (WinNT; U) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance References: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> <3D0F4C21.DC19B563@xilinx.com> <3D0F651C.EC951DE1@no.spam.irisa.fr> <3D0F902F.89DA7E21@yahoo.com> <3D0FD6EA.8306067C@andraka.com> <3D1036B8.A9DA8FC@algor.co.uk> <3D1074DE.32670CFE@andraka.com> <1024560390.776655@aknx2.orcon.net.nz> <3D125DEE.2B05B0CB@algor.co.uk> <3D127452.A0FA1689@ecubics.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Organization: Algorithmics Ltd. Cache-Post-Path: mudchute.algor.co.uk!unknown@rfhome.algor.co.uk X-Cache: nntpcache 2.4.0b2 (see http://www.nntpcache.org/) Lines: 25 Date: Fri, 21 Jun 2002 16:54:58 +0100 NNTP-Posting-Host: 62.254.210.251 X-Complaints-To: abuse@ntlworld.com X-Trace: news6-win.server.ntlworld.com 1024674899 62.254.210.251 (Fri, 21 Jun 2002 16:54:59 BST) NNTP-Posting-Date: Fri, 21 Jun 2002 16:54:59 BST Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!newsfeed00.sul.t-online.de!newsfeed01.sul.t-online.de!t-online.de!newspeer1-gui.server.ntli.net!ntli.net!news6-win.server.ntlworld.com.POSTED!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18641 emanuel stiebler wrote: > Rick Filipkiewicz wrote: > > > > Also: Is the 4mA ATA spec. a minimum ? The problem being that some el-cheapo IDE > > drive might play all sorts of fast and loose games with the ATA spec so at least > > a QuickSwitch type part might be a safety investment. I've always had a basic > > rule that no external connector is wired direct into an expensive and hard to > > replace FPGA ... had too many boards returned where someone thought a 9-pin > > D-Type was where the mains plugged in :-). > > Which Quickswitches do you you for that ? > > cheers Our standard is the 8-bit wide QS3245 or equivalent from Pericom/Texas/IDT. Whether or not the FET switches would vapourise fast enough to protect against 110/240V is debatable but they would protect against accidental connection to 5V. That said on the current design the ATA bus runs through a 95144XL CPLD, since it was sort of in the right place, so the sacrificial cost is a little higher. At least, at a pinch, I can hand solder a TQ144. ###### From: Theron Hicks Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance Date: Fri, 21 Jun 2002 15:18:50 -0400 Organization: Michigan State University Lines: 35 Message-ID: <3D137C1A.DB09E566@egr.msu.edu> References: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> <3D0F4C21.DC19B563@xilinx.com> <3D0F651C.EC951DE1@no.spam.irisa.fr> <3D0F902F.89DA7E21@yahoo.com> <3D0F9FCF.2AE2A8B3@xilinx.com> <3D120F32.7321A03@andraka.com> <3D127D92.A2F7293B@andraka.com> NNTP-Posting-Host: dfti.egr.msu.edu Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Mailer: Mozilla 4.77 [en] (Windows NT 5.0; U) X-Accept-Language: en Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!newsfeed.icl.net!netnews.com!xfer02.netnews.com!iad-peer.news.verio.net!news.verio.net!solaris.cc.vt.edu!news.vt.edu!msunews!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18644 Picky, Picky... Actually I suspected that was coming. Just as I get a handle on a part, they stop recomending it. Actually, two years ago, that part was recommended by an apps engineer at a particulr distributor. He said that it was more available than the Virtex series. I designed it in and now who knows whether I will be able to get it in the future. My newest design uses the Spartan2E. I hope that will be around for a while. Working within a university setting is a little different and our FPGA boards in the the EDA labs were 4013's until this fall. Now they finally "upgraded" to SpartanXL's in Sept of 2001. Oh well... Ray Andraka wrote: > Right, but that is not recommended for new designs at this point. > > Theron Hicks wrote: > > > "Ray Andraka" wrote in message > > news:3D120F32.7321A03@andraka.com... > > > SpartanII and Virtex have 5v tolerant 3.3v I/O. > > So does SpartanXL > > -- > --Ray Andraka, P.E. > President, the Andraka Consulting Group, Inc. > 401/884-7930 Fax 401/884-7950 > email ray@andraka.com > http://www.andraka.com > > "They that give up essential liberty to obtain a little > temporary safety deserve neither liberty nor safety." > -Benjamin Franklin, 1759 ###### From: Peter Alfke Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance Date: Fri, 21 Jun 2002 13:26:31 -0700 Organization: Xilinx, Inc. Lines: 51 Message-ID: <3D138BF7.77C92A37@xilinx.com> References: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> <3D0F4C21.DC19B563@xilinx.com> <3D0F651C.EC951DE1@no.spam.irisa.fr> <3D0F902F.89DA7E21@yahoo.com> <3D0F9FCF.2AE2A8B3@xilinx.com> <3D120F32.7321A03@andraka.com> <3D127D92.A2F7293B@andraka.com> <3D137C1A.DB09E566@egr.msu.edu> NNTP-Posting-Host: 149.199.34.5 Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Mailer: Mozilla 4.77 [en]C-CCK-MCD (Windows NT 5.0; U) X-Accept-Language: en To: Theron Hicks Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed1.cidera.com!Cidera!cyclone1.gnilink.net!wn1feed!wn2feed!worldnet.att.net!204.127.198.204!attbi_feed4!attbi.com!12.120.28.17!attla2!ip.att.net!newsgate.xilinx.com!cliff.xsj.xilinx.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18639 Theron, before you get all upset: There is a difference between "available" and "recommended for new designs". Xilinx parts have a very long availability lifetime, (check with your distributor, and watch out for software support which may disappear first, unless you have the old software installed). But there is a much shorter time where we recommend any family for new designs. The newer families are usually more capable and less expensive, so why would anybody use the older family for a brand-new design? Well, Vcc tolerance is one parameter where the old family may be more desirable... Peter Alfke, Xilinx Applications Theron Hicks wrote: > Picky, Picky... Actually I suspected that was coming. Just as I get a > handle on a part, they stop recomending it. Actually, two years ago, > that part was recommended by an apps engineer at a particulr > distributor. He said that it was more available than the Virtex > series. I designed it in and now who knows whether I will be able to > get it in the future. > > My newest design uses the Spartan2E. I hope that will be around for a > while. Working within a university setting is a little different and > our FPGA boards in the the EDA labs were 4013's until this fall. Now > they finally "upgraded" to SpartanXL's in Sept of 2001. Oh well... > > Ray Andraka wrote: > > > Right, but that is not recommended for new designs at this point. > > > > Theron Hicks wrote: > > > > > "Ray Andraka" wrote in message > > > news:3D120F32.7321A03@andraka.com... > > > > SpartanII and Virtex have 5v tolerant 3.3v I/O. > > > So does SpartanXL > > > > -- > > --Ray Andraka, P.E. > > President, the Andraka Consulting Group, Inc. > > 401/884-7930 Fax 401/884-7950 > > email ray@andraka.com > > http://www.andraka.com > > > > "They that give up essential liberty to obtain a little > > temporary safety deserve neither liberty nor safety." > > -Benjamin Franklin, 1759 ###### From: rickman Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance Date: Wed, 26 Jun 2002 12:50:01 -0400 Organization: Arius, Inc Lines: 81 Message-ID: <3D19F0B9.7D621AC3@yahoo.com> References: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> <3D0F4C21.DC19B563@xilinx.com> <3D0F651C.EC951DE1@no.spam.irisa.fr> <3D0F902F.89DA7E21@yahoo.com> <3D0F9FCF.2AE2A8B3@xilinx.com> <3D120F32.7321A03@andraka.com> <3D127D92.A2F7293B@andraka.com> <3D137C1A.DB09E566@egr.msu.edu> <3D138BF7.77C92A37@xilinx.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: UmFuZG9tSVbN5o/SMHxPGcXtAkzOwC0ZuoBA3kelL+qNiUuOX0J5qjuwAJd5xmaT X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 26 Jun 2002 16:49:53 GMT X-Mailer: Mozilla 4.7 [en] (Win95; U) X-Accept-Language: en Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!feed2.news.rcn.net!feed1.news.rcn.net!rcn!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18804 The software is something that you need to take special care about. Be sure to save the version that you did your original design with. It is not uncommon that when they "improve" the software to work with the newest family it does not work as well with older families. It is just a matter of economics to the FPGA vendors. They have to focus on selling the newest, biggest, highest profit margin chips. This gets design wins and brings in the most money. Once a chip has a few years on it and it is on the downhill side of the production ramp, the software guys have no reason to optimize the tools for it. Just a fact of life. So cover your rear by keeping back versions of the software. Peter Alfke wrote: > > Theron, before you get all upset: > There is a difference between "available" and "recommended for new > designs". > Xilinx parts have a very long availability lifetime, (check with your > distributor, and watch out for software support which may disappear first, > unless you have the old software installed). > But there is a much shorter time where we recommend any family for new > designs. > The newer families are usually more capable and less expensive, so why > would anybody use the older family for a brand-new design? > Well, Vcc tolerance is one parameter where the old family may be more > desirable... > > Peter Alfke, Xilinx Applications > > Theron Hicks wrote: > > > Picky, Picky... Actually I suspected that was coming. Just as I get a > > handle on a part, they stop recomending it. Actually, two years ago, > > that part was recommended by an apps engineer at a particulr > > distributor. He said that it was more available than the Virtex > > series. I designed it in and now who knows whether I will be able to > > get it in the future. > > > > My newest design uses the Spartan2E. I hope that will be around for a > > while. Working within a university setting is a little different and > > our FPGA boards in the the EDA labs were 4013's until this fall. Now > > they finally "upgraded" to SpartanXL's in Sept of 2001. Oh well... > > > > Ray Andraka wrote: > > > > > Right, but that is not recommended for new designs at this point. > > > > > > Theron Hicks wrote: > > > > > > > "Ray Andraka" wrote in message > > > > news:3D120F32.7321A03@andraka.com... > > > > > SpartanII and Virtex have 5v tolerant 3.3v I/O. > > > > So does SpartanXL > > > > > > -- > > > --Ray Andraka, P.E. > > > President, the Andraka Consulting Group, Inc. > > > 401/884-7930 Fax 401/884-7950 > > > email ray@andraka.com > > > http://www.andraka.com > > > > > > "They that give up essential liberty to obtain a little > > > temporary safety deserve neither liberty nor safety." > > > -Benjamin Franklin, 1759 -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAX ###### Message-ID: <3D1A2021.32C13F33@andraka.com> From: Ray Andraka Organization: Andraka Consulting Group, Inc X-Mailer: Mozilla 4.77 [en] (WinNT; U) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance References: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> <3D0F4C21.DC19B563@xilinx.com> <3D0F651C.EC951DE1@no.spam.irisa.fr> <3D0F902F.89DA7E21@yahoo.com> <3D0F9FCF.2AE2A8B3@xilinx.com> <3D120F32.7321A03@andraka.com> <3D127D92.A2F7293B@andraka.com> <3D137C1A.DB09E566@egr.msu.edu> <3D138BF7.77C92A37@xilinx.com> <3D19F0B9.7D621AC3@yahoo.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 99 Date: Wed, 26 Jun 2002 20:10:14 GMT NNTP-Posting-Host: 68.15.41.165 X-Complaints-To: abuse@cox.net X-Trace: news1.east.cox.net 1025122214 68.15.41.165 (Wed, 26 Jun 2002 16:10:14 EDT) NNTP-Posting-Date: Wed, 26 Jun 2002 16:10:14 EDT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.imp.ch!news.imp.ch!fr.clara.net!heighliner.fr.clara.net!newsfeed.stueberl.de!cox.net!p02!news1.east.cox.net.POSTED!53ab2750!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18814 It would be nice if they at least didn't break existing software when bringing out the new. For example, if you are doing any floorplanning with RPMs in Virtex or its derivatives, 4.2 is unusable because of floorplanner problems that didn't exist in earlier software. rickman wrote: > The software is something that you need to take special care about. Be > sure to save the version that you did your original design with. It is > not uncommon that when they "improve" the software to work with the > newest family it does not work as well with older families. > > It is just a matter of economics to the FPGA vendors. They have to > focus on selling the newest, biggest, highest profit margin chips. This > gets design wins and brings in the most money. Once a chip has a few > years on it and it is on the downhill side of the production ramp, the > software guys have no reason to optimize the tools for it. > > Just a fact of life. So cover your rear by keeping back versions of the > software. > > Peter Alfke wrote: > > > > Theron, before you get all upset: > > There is a difference between "available" and "recommended for new > > designs". > > Xilinx parts have a very long availability lifetime, (check with your > > distributor, and watch out for software support which may disappear first, > > unless you have the old software installed). > > But there is a much shorter time where we recommend any family for new > > designs. > > The newer families are usually more capable and less expensive, so why > > would anybody use the older family for a brand-new design? > > Well, Vcc tolerance is one parameter where the old family may be more > > desirable... > > > > Peter Alfke, Xilinx Applications > > > > Theron Hicks wrote: > > > > > Picky, Picky... Actually I suspected that was coming. Just as I get a > > > handle on a part, they stop recomending it. Actually, two years ago, > > > that part was recommended by an apps engineer at a particulr > > > distributor. He said that it was more available than the Virtex > > > series. I designed it in and now who knows whether I will be able to > > > get it in the future. > > > > > > My newest design uses the Spartan2E. I hope that will be around for a > > > while. Working within a university setting is a little different and > > > our FPGA boards in the the EDA labs were 4013's until this fall. Now > > > they finally "upgraded" to SpartanXL's in Sept of 2001. Oh well... > > > > > > Ray Andraka wrote: > > > > > > > Right, but that is not recommended for new designs at this point. > > > > > > > > Theron Hicks wrote: > > > > > > > > > "Ray Andraka" wrote in message > > > > > news:3D120F32.7321A03@andraka.com... > > > > > > SpartanII and Virtex have 5v tolerant 3.3v I/O. > > > > > So does SpartanXL > > > > > > > > -- > > > > --Ray Andraka, P.E. > > > > President, the Andraka Consulting Group, Inc. > > > > 401/884-7930 Fax 401/884-7950 > > > > email ray@andraka.com > > > > http://www.andraka.com > > > > > > > > "They that give up essential liberty to obtain a little > > > > temporary safety deserve neither liberty nor safety." > > > > -Benjamin Franklin, 1759 > > -- > > Rick "rickman" Collins > > rick.collins@XYarius.com > Ignore the reply address. To email me use the above address with the XY > removed. > > Arius - A Signal Processing Solutions Company > Specializing in DSP and FPGA design URL http://www.arius.com > 4 King Ave 301-682-7772 Voice > Frederick, MD 21701-3110 301-682-7666 FAX -- --Ray Andraka, P.E. President, the Andraka Consulting Group, Inc. 401/884-7930 Fax 401/884-7950 email ray@andraka.com http://www.andraka.com "They that give up essential liberty to obtain a little temporary safety deserve neither liberty nor safety." -Benjamin Franklin, 1759 ###### Message-ID: <3D1A2986.77EC@designtools.co.nz> From: Jim Granville Reply-To: jim.granville@designtools.co.nz Organization: Mandeno Granville elect X-Mailer: Mozilla 3.0C-XTRA (Win95; I) MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance References: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> <3D0F4C21.DC19B563@xilinx.com> <3D0F651C.EC951DE1@no.spam.irisa.fr> <3D0F902F.89DA7E21@yahoo.com> <3D0F9FCF.2AE2A8B3@xilinx.com> <3D120F32.7321A03@andraka.com> <3D127D92.A2F7293B@andraka.com> <3D137C1A.DB09E566@egr.msu.edu> <3D138BF7.77C92A37@xilinx.com> <3D19F0B9.7D621AC3@yahoo.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 20 Date: Thu, 27 Jun 2002 08:52:22 +1200 NNTP-Posting-Host: 203.79.98.88 X-Complaints-To: abuse@tsnz.net X-Trace: news02.tsnz.net 1025124846 203.79.98.88 (Thu, 27 Jun 2002 08:54:06 NZST) NNTP-Posting-Date: Thu, 27 Jun 2002 08:54:06 NZST Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.imp.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed.media.kyoto-u.ac.jp!newsfeed01.tsnz.net!news02.tsnz.net!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18844 rickman wrote: > > The software is something that you need to take special care about. Be > sure to save the version that you did your original design with. It is > not uncommon that when they "improve" the software to work with the > newest family it does not work as well with older families. > > It is just a matter of economics to the FPGA vendors. They have to > focus on selling the newest, biggest, highest profit margin chips. This > gets design wins and brings in the most money. Once a chip has a few > years on it and it is on the downhill side of the production ramp, the > software guys have no reason to optimize the tools for it. > > Just a fact of life. So cover your rear by keeping back versions of the > software. This is good version control practice, and the moves to time-lock software are not likely to help users in this situation. -jg ###### From: rickman Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance Date: Thu, 27 Jun 2002 00:19:01 -0400 Organization: Arius, Inc Lines: 46 Message-ID: <3D1A9235.5A003782@yahoo.com> References: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> <3D0F4C21.DC19B563@xilinx.com> <3D0F651C.EC951DE1@no.spam.irisa.fr> <3D0F902F.89DA7E21@yahoo.com> <3D0F9FCF.2AE2A8B3@xilinx.com> <3D120F32.7321A03@andraka.com> <3D127D92.A2F7293B@andraka.com> <3D137C1A.DB09E566@egr.msu.edu> <3D138BF7.77C92A37@xilinx.com> <3D19F0B9.7D621AC3@yahoo.com> <3D1A2986.77EC@designtools.co.nz> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: UmFuZG9tSVYyIDWcc3r7oYyi4xQD46YDnxID3ggDe96FcQsLeQ0JbGwvuu1QfcQP X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 27 Jun 2002 04:18:44 GMT X-Mailer: Mozilla 4.7 [en] (Win95; U) X-Accept-Language: en Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!feed2.news.rcn.net!feed1.news.rcn.net!rcn!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18895 Jim Granville wrote: > > rickman wrote: > > > > The software is something that you need to take special care about. Be > > sure to save the version that you did your original design with. It is > > not uncommon that when they "improve" the software to work with the > > newest family it does not work as well with older families. > > > > It is just a matter of economics to the FPGA vendors. They have to > > focus on selling the newest, biggest, highest profit margin chips. This > > gets design wins and brings in the most money. Once a chip has a few > > years on it and it is on the downhill side of the production ramp, the > > software guys have no reason to optimize the tools for it. > > > > Just a fact of life. So cover your rear by keeping back versions of the > > software. > > This is good version control practice, and the moves to time-lock > software are not likely to help users in this situation. > > -jg I think people have misunderstandings of how the Xilinx software is licensed. I am pretty sure I have read in this newsgroup postings from Xilinx representatives that the Xilinx software will continue to operate after the license has run out. Only the support is ended. Someone please correct me if I am wrong. If Xilinx requires you to migrate to the newer versions of the software, we would have to consider that their products are unsupportable in the long run, and would seriously consider halting all development and move to Altera devices. So please tell me that this is not so. -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAX ###### From: Peter Alfke Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance Date: Thu, 27 Jun 2002 10:25:32 -0700 Organization: Xilinx,Inc Lines: 20 Message-ID: <3D1B4A8C.11CD87A3@xilinx.com> References: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> <3D0F4C21.DC19B563@xilinx.com> <3D0F651C.EC951DE1@no.spam.irisa.fr> <3D0F902F.89DA7E21@yahoo.com> <3D0F9FCF.2AE2A8B3@xilinx.com> <3D120F32.7321A03@andraka.com> <3D127D92.A2F7293B@andraka.com> <3D137C1A.DB09E566@egr.msu.edu> <3D138BF7.77C92A37@xilinx.com> <3D19F0B9.7D621AC3@yahoo.com> <3D1A2986.77EC@designtools.co.nz> <3D1A9235.5A003782@yahoo.com> NNTP-Posting-Host: peter.xsj.xilinx.com Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii; x-mac-type="54455854"; x-mac-creator="4D4F5353" Content-Transfer-Encoding: 7bit X-Mailer: Mozilla 4.77C-CCK-MCD {C-UDP; EBM-APPLE} (Macintosh; U; PPC) X-Accept-Language: en Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed.mathworks.com!wn3feed!worldnet.att.net!204.127.198.203!attbi_feed3!attbi_feed4!attbi.com!12.120.28.17!attla2!attla1!ip.att.net!newsgate.xilinx.com!cliff.xsj.xilinx.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18816 rickman wrote: > I think people have misunderstandings of how the Xilinx software is > licensed. I am pretty sure I have read in this newsgroup postings from > Xilinx representatives that the Xilinx software will continue to operate > after the license has run out. Only the support is ended. That is correct. The expiration of the software is only in the wording of the license agreement. There is *no* physical licensing mechanism that might prevent a user from continuing to maintain existing designs in the indefinite future, as long as you need it, as long as you want. No problem! Peter Alfke, Xilinx Applications > > ###### From: rickman Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance Date: Thu, 27 Jun 2002 15:36:11 -0400 Organization: Arius, Inc Lines: 40 Message-ID: <3D1B692B.C87FA423@yahoo.com> References: <3D0F36D1.9CE7E4D8@no.spam.irisa.fr> <3D0F4C21.DC19B563@xilinx.com> <3D0F651C.EC951DE1@no.spam.irisa.fr> <3D0F902F.89DA7E21@yahoo.com> <3D0F9FCF.2AE2A8B3@xilinx.com> <3D120F32.7321A03@andraka.com> <3D127D92.A2F7293B@andraka.com> <3D137C1A.DB09E566@egr.msu.edu> <3D138BF7.77C92A37@xilinx.com> <3D19F0B9.7D621AC3@yahoo.com> <3D1A2986.77EC@designtools.co.nz> <3D1A9235.5A003782@yahoo.com> <3D1B4A8C.11CD87A3@xilinx.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: UmFuZG9tSVbqPX5YZ7WgPnGTquChp8N1TqSZcekm7rqwGVHZGifP8UMvWhaIwBPR X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 27 Jun 2002 19:36:11 GMT X-Mailer: Mozilla 4.7 [en] (Win95; U) X-Accept-Language: en Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!feed2.news.rcn.net!feed1.news.rcn.net!rcn!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18805 Peter Alfke wrote: > > rickman wrote: > > > I think people have misunderstandings of how the Xilinx software is > > licensed. I am pretty sure I have read in this newsgroup postings from > > Xilinx representatives that the Xilinx software will continue to operate > > after the license has run out. Only the support is ended. > > That is correct. > The expiration of the software is only in the wording of the license agreement. > > There is *no* physical licensing mechanism that might prevent a user from > continuing to maintain existing designs in the indefinite future, as long as > you need it, as long as you want. No problem! > > Peter Alfke, Xilinx Applications I don't mean to offend you or anyone else at Xilinx, but this is a pretty silly licensing scheme. Does anyone at Xilinx have an explanation for why they word the license this way? How does this benefit Xilinx? Support has always been optional at extra charge after the first year. Heck, with some EDA vendors, support is optional the FIRST year! So what motivated Xilinx to "word" the license for time limited rights? -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAX ###### From: Muzaffer Kal Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance Organization: DSPIA Inc. Message-ID: References: <3D0F4C21.DC19B563@xilinx.com> <3D0F651C.EC951DE1@no.spam.irisa.fr> <3D0F902F.89DA7E21@yahoo.com> <3D0F9FCF.2AE2A8B3@xilinx.com> <3D120F32.7321A03@andraka.com> <3D127D92.A2F7293B@andraka.com> <3D137C1A.DB09E566@egr.msu.edu> <3D138BF7.77C92A37@xilinx.com> <3D19F0B9.7D621AC3@yahoo.com> <3D1A2986.77EC@designtools.co.nz> <3D1A9235.5A003782@yahoo.com> <3D1B4A8C.11CD87A3@xilinx.com> <3D1B692B.C87FA423@yahoo.com> X-Newsreader: Forte Agent 1.8/32.548 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 44 NNTP-Posting-Host: 64.169.95.78 X-Complaints-To: abuse@prodigy.net X-Trace: newssvr14.news.prodigy.com 1025244339 ST000 64.169.95.78 (Fri, 28 Jun 2002 02:05:39 EDT) NNTP-Posting-Date: Fri, 28 Jun 2002 02:05:39 EDT X-UserInfo1: TSUGWXWGPRRORV@[N[O@_WH@YR_B@EXLLBWLOOAFQATJUZ]CDVW[AKK[J\]^HVKHG^EWZHBLO^[\NH_AZFWGN^\DHNVMX_DHHX[FSQKBOTS@@BP^]C@RHS_AGDDC[AJM_T[GZNRNZAY]GNCPBDYKOLK^_CZFWPGHZIXW@C[AFKBBQS@E@DAZ]VDFUNTQQ]FN Date: Fri, 28 Jun 2002 06:05:39 GMT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!skynet.be!skynet.be!prodigy.com!newsmst01.news.prodigy.com!prodigy.com!postmaster.news.prodigy.com!newssvr14.news.prodigy.com.POSTED!857c7983!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18896 On Thu, 27 Jun 2002 15:36:11 -0400, rickman wrote: >Peter Alfke wrote: >> >> rickman wrote: >> >> > I think people have misunderstandings of how the Xilinx software is >> > licensed. I am pretty sure I have read in this newsgroup postings from >> > Xilinx representatives that the Xilinx software will continue to operate >> > after the license has run out. Only the support is ended. >> >> That is correct. >> The expiration of the software is only in the wording of the license agreement. >> >> There is *no* physical licensing mechanism that might prevent a user from >> continuing to maintain existing designs in the indefinite future, as long as >> you need it, as long as you want. No problem! >> >> Peter Alfke, Xilinx Applications > > >I don't mean to offend you or anyone else at Xilinx, but this is a >pretty silly licensing scheme. Does anyone at Xilinx have an >explanation for why they word the license this way? How does this >benefit Xilinx? Support has always been optional at extra charge after >the first year. Heck, with some EDA vendors, support is optional the >FIRST year! So what motivated Xilinx to "word" the license for time >limited rights? I think it is a legal liability issue. If they license it for one year only, you can't come back sue them 5 years later. The same logic applies to versions. I don't think you can even pay to get a license for an earlier version so they can't be legally liable for not supporting old versions indefinitely. IOW, if you don't upgrade to the latest version and if it stops working for any reason, you're on your own. It is a sensible position for Xilinx IMO, but doesn't help us poor schmucks who have to support an existing design for more than a year. Muzaffer Kal http://www.dspia.com ASIC/FPGA design/verification consulting specializing in DSP algorithm implementations ###### From: kolja@bnl.gov (Kolja Sulimma) Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance Date: 29 Jun 2002 07:46:21 -0700 Organization: http://groups.google.com/ Lines: 28 Message-ID: <25c81abf.0206290646.32fa5746@posting.google.com> References: <3D0F4C21.DC19B563@xilinx.com> <3D0F902F.89DA7E21@yahoo.com> <3D0F9FCF.2AE2A8B3@xilinx.com> <3D120F32.7321A03@andraka.com> <3D127D92.A2F7293B@andraka.com> <3D137C1A.DB09E566@egr.msu.edu> <3D138BF7.77C92A37@xilinx.com> <3D19F0B9.7D621AC3@yahoo.com> <3D1A2986.77EC@designtools.co.nz> <3D1A9235.5A003782@yahoo.com> <3D1B4A8C.11CD87A3@xilinx.com> <3D1B692B.C87FA423@yahoo.com> NNTP-Posting-Host: 213.23.52.136 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8bit X-Trace: posting.google.com 1025361981 16075 127.0.0.1 (29 Jun 2002 14:46:21 GMT) X-Complaints-To: groups-abuse@google.com NNTP-Posting-Date: 29 Jun 2002 14:46:21 GMT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!cyclone.bc.net!newsfeed.stanford.edu!postnews1.google.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18925 > >> There is *no* physical licensing mechanism that might prevent a user from > >> continuing to maintain existing designs in the indefinite future, as long as > >> you need it, as long as you want. No problem! > >I don't mean to offend you or anyone else at Xilinx, but this is a > >pretty silly licensing scheme. > > I think it is a legal liability issue. If they license it for one year > only, you can't come back sue them 5 years later. Yes, and if a customer decides, that he will not pay 2500 Bucks for only one year of usage - thats what the EULA says - and therefore switches to another FPGA Vendor, he will not come back five years later either. And: Maybe customers do not want to a license where Xilinx might come back five years later and sue the customer. (Yes, I know Peter, no intent to do this yada yada... Unisys had no intent in the 70s to sue anybody over the LZW patents. But the times they are a changing...) Also: Xilinx uses the same license in germany where this type of license is clearly against the law. One would believe that a multi billion dollar company would by able to hire lawyers to check there licenses... Kolja Sulimma ###### From: rickman Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance Date: Sat, 29 Jun 2002 12:49:31 -0400 Organization: Arius, Inc Lines: 53 Message-ID: <3D1DE51B.2A844C17@yahoo.com> References: <3D0F4C21.DC19B563@xilinx.com> <3D0F902F.89DA7E21@yahoo.com> <3D0F9FCF.2AE2A8B3@xilinx.com> <3D120F32.7321A03@andraka.com> <3D127D92.A2F7293B@andraka.com> <3D137C1A.DB09E566@egr.msu.edu> <3D138BF7.77C92A37@xilinx.com> <3D19F0B9.7D621AC3@yahoo.com> <3D1A2986.77EC@designtools.co.nz> <3D1A9235.5A003782@yahoo.com> <3D1B4A8C.11CD87A3@xilinx.com> <3D1B692B.C87FA423@yahoo.com> <25c81abf.0206290646.32fa5746@posting.google.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: UmFuZG9tSVbWimmgxdL8ehiQ/ep4aTCw/Ri5CGyI60yMwPzSrxVEkUKJzc9unvfK X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 29 Jun 2002 16:49:31 GMT X-Mailer: Mozilla 4.7 [en] (Win95; U) X-Accept-Language: en Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!feed2.news.rcn.net!feed1.news.rcn.net!rcn!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18902 Kolja Sulimma wrote: > > > >> There is *no* physical licensing mechanism that might prevent a user from > > >> continuing to maintain existing designs in the indefinite future, as long as > > >> you need it, as long as you want. No problem! > > > >I don't mean to offend you or anyone else at Xilinx, but this is a > > >pretty silly licensing scheme. > > > > I think it is a legal liability issue. If they license it for one year > > only, you can't come back sue them 5 years later. > > Yes, and if a customer decides, that he will not pay 2500 Bucks for > only one year of usage - thats what the EULA says - and therefore > switches to another FPGA Vendor, he will not come back five years > later either. > > And: Maybe customers do not want to a license where Xilinx might come > back five years later and sue the customer. > > (Yes, I know Peter, no intent to do this yada yada... Unisys had no > intent in the 70s to sue anybody over the LZW patents. But the times > they are a changing...) > > Also: Xilinx uses the same license in germany where this type of > license is > clearly against the law. One would believe that a multi billion dollar > company would by able to hire lawyers to check there licenses... > > Kolja Sulimma I agree completely with your points. Whenever I am asked to sign a contract that contains language that I find objectionable, I balk no matter how much I am told that "that is never enforced" or "that is only for trouble makers" or what ever the excuse is. The bottom line is - make the contract say what you intend. So Xilinx, why DO you have a one year license if the software does not stop working and you don't plan to stop anyone from using it? -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAX ###### Message-ID: <3D1E8F4F.29659073@earthlink.net> From: Peter Alfke Reply-To: palfke@earthlink.net X-Mailer: Mozilla 4.61 (Macintosh; I; PPC) X-Accept-Language: en,pdf MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance References: <3D0F4C21.DC19B563@xilinx.com> <3D0F902F.89DA7E21@yahoo.com> <3D0F9FCF.2AE2A8B3@xilinx.com> <3D120F32.7321A03@andraka.com> <3D127D92.A2F7293B@andraka.com> <3D137C1A.DB09E566@egr.msu.edu> <3D138BF7.77C92A37@xilinx.com> <3D19F0B9.7D621AC3@yahoo.com> <3D1A2986.77EC@designtools.co.nz> <3D1A9235.5A003782@yahoo.com> <3D1B4A8C.11CD87A3@xilinx.com> <3D1B692B.C87FA423@yahoo.com> <25c81abf.0206290646.32fa5746@posting.google.com> <3D1DE51B.2A844C17@yahoo.com> Content-Type: text/plain; charset=us-ascii; x-mac-type="54455854"; x-mac-creator="4D4F5353" Content-Transfer-Encoding: 7bit Lines: 21 Date: Sun, 30 Jun 2002 04:55:55 GMT NNTP-Posting-Host: 209.179.198.54 X-Complaints-To: abuse@earthlink.net X-Trace: newsread2.prod.itd.earthlink.net 1025412955 209.179.198.54 (Sat, 29 Jun 2002 21:55:55 PDT) NNTP-Posting-Date: Sat, 29 Jun 2002 21:55:55 PDT Organization: EarthLink Inc. -- http://www.EarthLink.net Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!newsfeed.stueberl.de!cox.net!newsfeed1.earthlink.net!newsfeed.earthlink.net!stamper.news.pas.earthlink.net!newsread2.prod.itd.earthlink.net.POSTED!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18908 rickman wrote: > > Whenever I am asked to sign a > contract that contains language that I find objectionable, I balk no > matter how much I am told that "that is never enforced" or "that is only > for trouble makers" or what ever the excuse is. The bottom line is - > make the contract say what you intend. > > So Xilinx, why DO you have a one year license if the software does not > stop working and you don't plan to stop anyone from using it? > > -- Well, this is a country that graduates far more lawyers than engineers. And they are always looking for something to do... Peter Alfke, speaking fo himself, so Xilinx does not get sued. ###### From: rickman Newsgroups: comp.arch.fpga Subject: Re: 5V tolerance Date: Sun, 30 Jun 2002 11:19:21 -0400 Organization: Arius, Inc Lines: 47 Message-ID: <3D1F2179.F165CCC3@yahoo.com> References: <3D0F4C21.DC19B563@xilinx.com> <3D0F902F.89DA7E21@yahoo.com> <3D0F9FCF.2AE2A8B3@xilinx.com> <3D120F32.7321A03@andraka.com> <3D127D92.A2F7293B@andraka.com> <3D137C1A.DB09E566@egr.msu.edu> <3D138BF7.77C92A37@xilinx.com> <3D19F0B9.7D621AC3@yahoo.com> <3D1A2986.77EC@designtools.co.nz> <3D1A9235.5A003782@yahoo.com> <3D1B4A8C.11CD87A3@xilinx.com> <3D1B692B.C87FA423@yahoo.com> <25c81abf.0206290646.32fa5746@posting.google.com> <3D1DE51B.2A844C17@yahoo.com> <3D1E8F4F.29659073@earthlink.net> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: UmFuZG9tSVZ2XYWf6Ymk458lOr+sMoUv7luPcwgTtCdnWsHGT0iN5GltPOzg3qfA X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 30 Jun 2002 15:19:11 GMT X-Mailer: Mozilla 4.7 [en] (Win95; U) X-Accept-Language: en Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!feed2.news.rcn.net!feed1.news.rcn.net!rcn!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:18903 Peter Alfke wrote: > > rickman wrote: > > > > > Whenever I am asked to sign a > > contract that contains language that I find objectionable, I balk no > > matter how much I am told that "that is never enforced" or "that is only > > for trouble makers" or what ever the excuse is. The bottom line is - > > make the contract say what you intend. > > > > So Xilinx, why DO you have a one year license if the software does not > > stop working and you don't plan to stop anyone from using it? > > > > -- > > Well, this is a country that graduates far more lawyers than engineers. > And they are always looking for something to do... > > Peter Alfke, speaking fo himself, so Xilinx does not get sued. Is there a statement somewhere in that cryptic comment? Is there some reason that Xilinx would be liable if the software license did not time out? If Xilinx thinks this opens them for liability, I think they have too many lawyers smoking crack. If you read the responses here, you will see that there are clear cases where the expiring license causes concern with potential customer's engineers in addition to their lawyers. How many lost sales does it take to make up for an imaginary potential law suit? -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAX