Message-ID: <3CE05E45.72E906B8@ecubics.com> Date: Mon, 13 May 2002 18:45:57 -0600 From: emanuel stiebler X-Mailer: Mozilla 4.79 [en] (Windows NT 5.0; U) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: 50 mA sink Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 5 NNTP-Posting-Host: 63.90.186.226 X-Trace: 1021336828 reader2.ash.ops.us.uu.net 20743 63.90.186.226 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!out.nntp.be!propagator2-SanJose!propagator-SanJose!in.nntp.be!priapus.visi.com!news-out.visi.com!hermes.visi.com!nntp5.savvis.net!uunet!dfw.uu.net!ash.uu.net!spool0900.news.uu.net!reader0902.news.uu.net!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:17417 Hi all, anybody out here knows a CPLD/FPGA which can sink at least 50 mA on a 5V TTL compatible output ? cheers & thanks ###### Message-ID: <3CE133AC.C5A1313A@mail.com> From: John_H X-Mailer: Mozilla 4.75 [en]C-CCK-MCD (Win95; U) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: 50 mA sink References: <3CE05E45.72E906B8@ecubics.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 12 Date: Tue, 14 May 2002 15:56:29 GMT NNTP-Posting-Host: 192.65.17.17 X-Complaints-To: postmaster@opbu.xerox.com X-Trace: news-west.eli.net 1021391789 192.65.17.17 (Tue, 14 May 2002 09:56:29 MDT) NNTP-Posting-Date: Tue, 14 May 2002 09:56:29 MDT Organization: Xerox Officeprinting NewsReader Service Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.imp.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!logbridge.uoregon.edu!news-west.eli.net!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:17444 Use multiple outputs with the same driver. Keep output skew to a minimum with adjecent IOBs or Macrocells. emanuel stiebler wrote: > Hi all, > anybody out here knows a CPLD/FPGA which can sink at least 50 mA > on a 5V TTL compatible output ? > > cheers & thanks ###### From: Peter Alfke Newsgroups: comp.arch.fpga Subject: Re: 50 mA sink Date: Tue, 14 May 2002 09:33:39 -0700 Organization: Xilinx, Inc. Lines: 19 Message-ID: <3CE13C63.5A4767AE@xilinx.com> References: <3CE05E45.72E906B8@ecubics.com> <3CE133AC.C5A1313A@mail.com> NNTP-Posting-Host: 149.199.34.160 Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Mailer: Mozilla 4.77 [en]C-CCK-MCD (Windows NT 5.0; U) X-Accept-Language: en To: John_H Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!newsfeed.icl.net!news.maxwell.syr.edu!cpk-news-hub1.bbnplanet.com!cambridge1-snf1.gtei.net!news.gtei.net!bos-service1.ext.raytheon.com!attla1!ip.att.net!newsgate.xilinx.com!cliff.xsj.xilinx.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:17413 If you parallel outputs for high current sink (!), then it is best to configure all outputs as "open collector". This avoids contention during the very short time that the outputs might disagree. Peter Alfke ============================ John_H wrote: > Use multiple outputs with the same driver. > Keep output skew to a minimum with adjecent IOBs or Macrocells. > > emanuel stiebler wrote: > > > Hi all, > > anybody out here knows a CPLD/FPGA which can sink at least 50 mA > > on a 5V TTL compatible output ? > > > > cheers & thanks ###### From: kayrock66@yahoo.com (Jay) Newsgroups: comp.arch.fpga Subject: Re: 50 mA sink Date: 16 May 2002 17:46:31 -0700 Organization: http://groups.google.com/ Lines: 10 Message-ID: References: <3CE05E45.72E906B8@ecubics.com> NNTP-Posting-Host: 208.178.183.62 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8bit X-Trace: posting.google.com 1021596391 5117 127.0.0.1 (17 May 2002 00:46:31 GMT) X-Complaints-To: groups-abuse@google.com NNTP-Posting-Date: 17 May 2002 00:46:31 GMT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!cyclone.bc.net!newsfeed.stanford.edu!postnews1.google.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:17626 The other option to paralleling outputs is to just use an external transistor and save your FPGA the strain. If you're a digital guy don't be afraid, its really a simple configuration. emanuel stiebler wrote in message news:<3CE05E45.72E906B8@ecubics.com>... > Hi all, > anybody out here knows a CPLD/FPGA which can sink at least 50 mA > on a 5V TTL compatible output ? > > cheers & thanks