From: "Kiyoung SON" Newsgroups: comp.arch.fpga Subject: where is designed FPGA for apple II computer...? Lines: 4 X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 6.00.2600.0000 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2600.0000 Message-ID: Date: Thu, 06 Dec 2001 02:51:34 GMT NNTP-Posting-Host: 211.171.152.154 X-Trace: news.bora.net 1007607094 211.171.152.154 (Thu, 06 Dec 2001 11:51:34 KST) NNTP-Posting-Date: Thu, 06 Dec 2001 11:51:34 KST Organization: Dacom Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news.imp.ch!uni-erlangen.de!news-nue1.dfn.de!news-lei1.dfn.de!newsfeed00.sul.t-online.de!t-online.de!newsfeed.gamma.ru!Gamma.RU!nntp.kreonet.re.kr!newsfeed.dacom.co.kr!news.bora.net.POSTED!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:12174 designed FPGA for Apple II computer... I want it... ###### Sender: eric@ruckus.brouhaha.com From: Eric Smith Newsgroups: comp.arch.fpga Subject: Re: where is designed FPGA for apple II computer...? References: Organization: Eric Conspiracy Secret Labs X-Eric-Conspiracy: There is no conspiracy. Date: 05 Dec 2001 21:57:04 -0800 Message-ID: Lines: 8 User-Agent: Gnus/5.0807 (Gnus v5.8.7) Emacs/20.7 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii NNTP-Posting-Host: ruckus.brouhaha.com X-Trace: 5 Dec 2001 22:01:39 -0800, ruckus.brouhaha.com Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed.stanford.edu!news.kjsl.com!news.spies.com!ruckus.brouhaha.com Xref: chonsp.franklin.ch comp.arch.fpga:12186 "Kiyoung SON" writes: > designed FPGA for Apple II computer... > I want it... There's an FPGA on the Apple II Video Overlay card. That's been out of production for at least eight years, though. Nice card. ###### Message-ID: <3C0F12E5.5A420120@kjflsdkjlfsdklfdslfsdklsdf.com> From: sdfjsd X-Mailer: Mozilla 4.78 [en] (Win98; U) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: where is designed FPGA for apple II computer...? References: Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 10 NNTP-Posting-Host: 67.112.54.191 X-Complaints-To: abuse@prodigy.net X-Trace: newssvr13.news.prodigy.com 1007620549 ST000 67.112.54.191 (Thu, 06 Dec 2001 01:35:49 EST) NNTP-Posting-Date: Thu, 06 Dec 2001 01:35:49 EST Organization: Prodigy Internet http://www.prodigy.com X-UserInfo1: OXXIFXCDTZUS@^LYMRKNOPDA[X_LPO@FKYYDMREK@YWZUYUBK^RAAEW[QDZ\YQ_IT^C_[EVLDV^NOMOBFFTINWDGGFTKX_DHE@[DRVKC^DQPPOD^HKAHIP[CODFMKGJNYDYIZCZLPI_UWEGS@D^W^B_^J[Y^G\KHBYZC@ESAY[FDPVPEGDA^M]@D]VT_QQVL Date: Thu, 06 Dec 2001 06:35:49 GMT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed.cwix.com!newscon02.news.prodigy.com!newsmst01.news.prodigy.com!prodigy.com!postmaster.news.prodigy.com!newssvr13.news.prodigy.com.POSTED!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:12163 > "Kiyoung SON" writes: > > designed FPGA for Apple II computer... > > I want it... > > There's an FPGA on the Apple II Video Overlay card. That's > been out of production for at least eight years, though. > Nice card. Hmm, I think the original poster wanted to know if there was an AppleII implementation/emulation available on FPGA... ###### From: gah@ugcs.caltech.edu (glen herrmannsfeldt) Newsgroups: comp.arch.fpga Subject: Re: where is designed FPGA for apple II computer...? Date: 6 Dec 2001 18:26:21 GMT Organization: California Institute of Technology, Pasadena Lines: 19 Message-ID: <9uod8d$puk@gap.cco.caltech.edu> References: NNTP-Posting-Host: yak.ugcs.caltech.edu X-Newsreader: NN version 6.5.0 #1 (NOV) Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed.stanford.edu!info1.fnal.gov!nntp-server.caltech.edu!gah Xref: chonsp.franklin.ch comp.arch.fpga:12178 "Kiyoung SON" writes: >designed FPGA for Apple II computer... >I want it... I know that people are working on FPGA implementations of the PDP-8, PDP-11, and PDP-10. Even the PDP-8 may be more complicated than the 6502. Now, how much of an Apple II can one put on an FPGA? I would expect external RAM, but the video, serial and disk controller maybe could be included. I think, though, it could be done in C and run on any current processor instead. Unless you need a 200MHz Apple II, I can't see why you would want an FPGA version. -- glen ###### Sender: eric@ruckus.brouhaha.com From: Eric Smith Newsgroups: comp.arch.fpga Subject: Re: where is designed FPGA for apple II computer...? References: <9uod8d$puk@gap.cco.caltech.edu> Organization: Eric Conspiracy Secret Labs X-Eric-Conspiracy: There is no conspiracy. Date: 06 Dec 2001 11:09:30 -0800 Message-ID: Lines: 24 User-Agent: Gnus/5.0807 (Gnus v5.8.7) Emacs/20.7 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii NNTP-Posting-Host: ruckus.brouhaha.com X-Trace: 6 Dec 2001 11:14:11 -0800, ruckus.brouhaha.com Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed.stanford.edu!news.kjsl.com!news.spies.com!ruckus.brouhaha.com Xref: chonsp.franklin.ch comp.arch.fpga:12182 gah@ugcs.caltech.edu (glen herrmannsfeldt) writes: > Even the PDP-8 may be more > complicated than the 6502. No. Speaking from experience, the 6502 takes MUCH more logic to implement than a PDP-8. > Now, how much of an Apple II can one put on an FPGA? > > I would expect external RAM, but the video, serial and disk > controller maybe could be included. And perhaps external EPROM or Flash to substitute for the masked ROM of the real Apple II. There was masked ROM for the firmware, character generator, and keyboard encoder. Some of the largest FPGAs actually have enough block RAM to implement all of the ROM, though that wouldn't be cost-effective. > Unless you need a 200MHz Apple II, I can't > see why you would want an FPGA version. It's difficult to get an FPGA implementation of a 6502 to run faster than 50 MHz. Even that fast is a challenge. ###### Path: chonsp.franklin.ch!not-for-mail From: Neil Franklin Newsgroups: comp.arch.fpga Subject: Re: where is designed FPGA for apple II computer...? Date: 06 Dec 2001 21:52:40 +0100 Organization: My own Private Self Lines: 23 Message-ID: <6u4rn4jckn.fsf@chonsp.franklin.ch> References: <9uod8d$puk@gap.cco.caltech.edu> NNTP-Posting-Host: chonsp.franklin.ch X-Trace: chonsp.franklin.ch 1007671960 478 10.0.3.2 (6 Dec 2001 20:52:40 GMT) X-Complaints-To: news@chonsp.franklin.ch NNTP-Posting-Date: 6 Dec 2001 20:52:40 GMT X-Newsreader: Gnus v5.7/Emacs 20.4 Xref: chonsp.franklin.ch comp.arch.fpga:12199 gah@ugcs.caltech.edu (glen herrmannsfeldt) writes: > "Kiyoung SON" writes: > > >designed FPGA for Apple II computer... > > I know that people are working on FPGA implementations of > the PDP-8, PDP-11, and PDP-10. Even the PDP-8 may be more > complicated than the 6502. PDP-8/I already exists, in form of DGCs PDP-8/X (using XCS10+XCS05): http://www.spies.com/~dgc/pdp8x/ Dito also PDP-4, in form of DGCs PDP-4/X (using XC4010E+XCS05): http://www.spies.com/~dgc/pdp4x/ -- Neil Franklin, neil@franklin.ch.remove http://neil.franklin.ch/ Hacker, Unix Guru, El Eng HTL/BSc, Sysadmin, Archer, Roleplayer - Intellectual Property is Intellectual Robbery ###### From: "Leon Heller" Newsgroups: comp.arch.fpga Subject: Re: where is designed FPGA for apple II computer...? Date: Thu, 6 Dec 2001 19:25:34 -0000 Organization: BT Internet Lines: 20 Message-ID: <9uogl8$t66$1@uranium.btinternet.com> References: NNTP-Posting-Host: host62-7-113-105.btinternet.com X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 6.00.2600.0000 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2600.0000 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!newsfeed.gamma.ru!Gamma.RU!newsfeed.mathworks.com!btnet-peer0!btnet-feed5!btnet!news.btopenworld.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:12230 "Kiyoung SON" wrote in message news:W2BP7.58$H3.252301@news.bora.net... > designed FPGA for Apple II computer... > I want it... > > A 6502 core has been implemented in VHDL. That could be used to start the project off. Leon -- Leon Heller, G1HSM leon_heller@hotmail.con http://www.geocities.com/leon_heller Low-cost Altera Flex design kit: http://www.leonheller.com ###### Message-ID: <3C0FC727.A0B66C37@exponentmedia.deletethis.com> From: Andy Peters X-Mailer: Mozilla 4.7C-CCK-MCD {C-UDP; EBM-APPLE} (Macintosh; I; PPC) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: where is designed FPGA for apple II computer...? References: Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 9 Date: Thu, 06 Dec 2001 19:29:44 GMT NNTP-Posting-Host: 24.221.131.16 X-Complaints-To: abuse@earthlink.net X-Trace: newsread1.prod.itd.earthlink.net 1007666984 24.221.131.16 (Thu, 06 Dec 2001 11:29:44 PST) NNTP-Posting-Date: Thu, 06 Dec 2001 11:29:44 PST Organization: EarthLink Inc. -- http://www.EarthLink.net X-Received-Date: Thu, 06 Dec 2001 11:29:46 PST (newsmaster1.prod.itd.earthlink.net) Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed.direct.ca!look.ca!newsfeed1.earthlink.net!newsfeed.earthlink.net!newsmaster1.prod.itd.earthlink.net!newsread1.prod.itd.earthlink.net.POSTED!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:12251 Kiyoung SON wrote: > > designed FPGA for Apple II computer... > I want it... Shit, go to any University's cast-off auction and you can find pallets of 'em for sale or for free. -a ###### Message-ID: <3C0FE3E6.5E790EE0@andraka.com> From: Ray Andraka Organization: Andraka Consulting Group, Inc X-Mailer: Mozilla 4.77 [en] (WinNT; U) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: where is designed FPGA for apple II computer...? References: <9uod8d$puk@gap.cco.caltech.edu> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 41 Date: Thu, 06 Dec 2001 21:31:27 GMT NNTP-Posting-Host: 24.13.238.93 X-Complaints-To: abuse@home.net X-Trace: news1.wwck1.ri.home.com 1007674287 24.13.238.93 (Thu, 06 Dec 2001 13:31:27 PST) NNTP-Posting-Date: Thu, 06 Dec 2001 13:31:27 PST Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!news-hog.berkeley.edu!ucberkeley!enews.sgi.com!newshub2.rdc1.sfba.home.com!news.home.com!news1.wwck1.ri.home.com.POSTED!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:12212 The hardware to do a PDP-8 is really quite minimal. As I recall, the 6502 had quite a few bells and whistles in the instruction set. I'd also be vey impressed if you got a 6502 clone running at even 100 MHz in an FPGA. The structure is not well matched to the FPGA, and designs that are specifically tailored to the FPGA architecture have difficulty running above about 100 MHz. glen herrmannsfeldt wrote: > "Kiyoung SON" writes: > > >designed FPGA for Apple II computer... > >I want it... > > I know that people are working on FPGA implementations of > the PDP-8, PDP-11, and PDP-10. Even the PDP-8 may be more > complicated than the 6502. > > Now, how much of an Apple II can one put on an FPGA? > > I would expect external RAM, but the video, serial and disk > controller maybe could be included. > > I think, though, it could be done in C and run on any current > processor instead. Unless you need a 200MHz Apple II, I can't > see why you would want an FPGA version. > > -- glen -- --Ray Andraka, P.E. President, the Andraka Consulting Group, Inc. 401/884-7930 Fax 401/884-7950 email ray@andraka.com http://www.andraka.com "They that give up essential liberty to obtain a little temporary safety deserve neither liberty nor safety." -Benjamin Franklin, 1759 ###### From: Austin Lesea Newsgroups: comp.arch.fpga Subject: Re: where is designed FPGA for apple II computer...? Date: Thu, 06 Dec 2001 13:42:44 -0800 Organization: Xilinx Lines: 17 Message-ID: <3C0FE654.3DDD7829@xilinx.com> References: NNTP-Posting-Host: 149.199.9.10 Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Mailer: Mozilla 4.77 [en]C-CCK-MCD (WinNT; U) X-Accept-Language: en,pdf Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!nntp1.phx1.gblx.net!nntp.gblx.net!nntp.gblx.net!enews.sgi.com!nntp.wetware.com!attdv1!ip.att.net!newsgate.xilinx.com!cliff.xsj.xilinx.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:12204 Caution, We once programmed an Apple II on an FPGA perhaps seven years ago. It ran far, far, too fast. The disk interface is done in software, so all of the timing was off. Everything worked fine, but it couldn't talk to the disk drives. Austin Kiyoung SON wrote: > designed FPGA for Apple II computer... > I want it... ###### Reply-To: "Rob Finch" From: "Rob Finch" Newsgroups: comp.arch.fpga References: <9uod8d$puk@gap.cco.caltech.edu> Subject: Re: where is designed FPGA for apple II computer...? Lines: 39 X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 5.50.4133.2400 X-MimeOLE: Produced By Microsoft MimeOLE V5.50.4133.2400 Message-ID: Date: Thu, 6 Dec 2001 19:21:02 -0500 NNTP-Posting-Host: 65.92.36.35 X-Complaints-To: abuse@sympatico.ca X-Trace: news20.bellglobal.com 1007684621 65.92.36.35 (Thu, 06 Dec 2001 19:23:41 EST) NNTP-Posting-Date: Thu, 06 Dec 2001 19:23:41 EST Organization: Bell Sympatico Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!out.nntp.be!propagator-SanJose!in.nntp.be!news-in-sanjose!newshub2.rdc1.sfba.home.com!news.home.com!newsfeed.direct.ca!look.ca!news1.tor.metronet.ca!webster!nf1.bellglobal.com!nf2.bellglobal.com!news20.bellglobal.com.POSTED!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:12236 The 6502 is surpisingly complicated. I made an initial stab at implementing a 6502 in an FPGA. I decided not to pursue it because it doesn't map that well to an FPGA architecture. Synthesis estimated 35MHz and 30% of a spartanII XC2S200 I think. It's on my website http://www.birdcomputer.ca/ untested and undebugged, but it might make a starting point. I think a better approach might be to develop a simple RISC processor customized for efficiently implementing a 6502 emulator in software. You could probably get almost the same performance, and it would be a whole lot easier. Rob "Eric Smith" wrote in message news:qhk7w017yt.fsf@ruckus.brouhaha.com... > gah@ugcs.caltech.edu (glen herrmannsfeldt) writes: > > Even the PDP-8 may be more > > complicated than the 6502. > > No. Speaking from experience, the 6502 takes MUCH more logic to > implement than a PDP-8. > > > Now, how much of an Apple II can one put on an FPGA? > > > > I would expect external RAM, but the video, serial and disk > > controller maybe could be included. > > And perhaps external EPROM or Flash to substitute for the masked ROM > of the real Apple II. There was masked ROM for the firmware, character > generator, and keyboard encoder. > > Some of the largest FPGAs actually have enough block RAM to implement > all of the ROM, though that wouldn't be cost-effective. > > > Unless you need a 200MHz Apple II, I can't > > see why you would want an FPGA version. > > It's difficult to get an FPGA implementation of a 6502 to run faster > than 50 MHz. Even that fast is a challenge. ###### Message-ID: <3C105206.7DC3C9A5@andraka.com> From: Ray Andraka Organization: Andraka Consulting Group, Inc X-Mailer: Mozilla 4.77 [en] (WinNT; U) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: where is designed FPGA for apple II computer...? References: <9uod8d$puk@gap.cco.caltech.edu> <3C0FE3E6.5E790EE0@andraka.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 23 Date: Fri, 07 Dec 2001 05:21:19 GMT NNTP-Posting-Host: 24.13.238.93 X-Complaints-To: abuse@home.net X-Trace: news1.wwck1.ri.home.com 1007702479 24.13.238.93 (Thu, 06 Dec 2001 21:21:19 PST) NNTP-Posting-Date: Thu, 06 Dec 2001 21:21:19 PST Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newshub2.home.com!news.home.com!news1.wwck1.ri.home.com.POSTED!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:12207 Oops, that should have read "...and _microprocessor_ designs that are specifically...". We routinely do other designs well beyond 100 MHz. Microprocessors can be a challenge at the high rates because there is limited opportunity for deep pipelining. Ray Andraka wrote: > an FPGA. The structure is not well matched to the FPGA, and designs > that are specifically tailored to the FPGA architecture have difficulty > running above about 100 MHz. -- --Ray Andraka, P.E. President, the Andraka Consulting Group, Inc. 401/884-7930 Fax 401/884-7950 email ray@andraka.com http://www.andraka.com "They that give up essential liberty to obtain a little temporary safety deserve neither liberty nor safety." -Benjamin Franklin, 1759 ###### From: nweaver@CSUA.Berkeley.EDU (Nicholas Weaver) Newsgroups: comp.arch.fpga Subject: Re: where is designed FPGA for apple II computer...? Date: Fri, 7 Dec 2001 07:03:13 +0000 (UTC) Organization: Unknown Lines: 11 Message-ID: <9uppjh$n61$1@agate.berkeley.edu> References: <9uod8d$puk@gap.cco.caltech.edu> <3C0FE3E6.5E790EE0@andraka.com> <3C105206.7DC3C9A5@andraka.com> NNTP-Posting-Host: soda.csua.berkeley.edu X-Trace: agate.berkeley.edu 1007708593 23745 128.32.247.226 (7 Dec 2001 07:03:13 GMT) X-Complaints-To: usenet@agate.berkeley.edu NNTP-Posting-Date: Fri, 7 Dec 2001 07:03:13 +0000 (UTC) Originator: nweaver@CSUA.Berkeley.EDU (Nicholas Weaver) Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!out.nntp.be!propagator-SanJose!in.nntp.be!news-in-sanjose!news-hog.berkeley.edu!ucberkeley!agate.berkeley.edu!agate!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:12221 In article <3C105206.7DC3C9A5@andraka.com>, Ray Andraka wrote: >Oops, that should have read "...and _microprocessor_ designs that are >specifically...". We routinely do other designs well beyond 100 MHz. >Microprocessors can be a challenge at the high rates because there is >limited opportunity for deep pipelining. Until you decide "screw it" and go multithreaded. 2 or 4 threads is a nice number. -- Nicholas C. Weaver nweaver@cs.berkeley.edu ###### From: seilebost@aol.com (olivier JEAN) Newsgroups: comp.arch.fpga Subject: Re: where is designed FPGA for apple II computer...? Date: 7 Dec 2001 00:49:57 -0800 Organization: http://groups.google.com/ Lines: 38 Message-ID: References: <3C0FE654.3DDD7829@xilinx.com> NNTP-Posting-Host: 159.50.96.226 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8bit X-Trace: posting.google.com 1007714998 32553 127.0.0.1 (7 Dec 2001 08:49:58 GMT) X-Complaints-To: groups-abuse@google.com NNTP-Posting-Date: 7 Dec 2001 08:49:58 GMT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed.stanford.edu!postnews1.google.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:12238 Hi everybody. It exists two FPGA design about 6502. + FREE-IP : http://www.free-ip.com/6502/index.html + BIRD COMPUTER : http://www.birdcomputer.ca/bc6502_page.html ( to see previous message). But the BCD operation is not implemented. I'm interesting by an 6502 build-in FPGA. Because I design a 80's retro-computer, ORIC ATMOS. It has used an 6502. My site about the retro computer is : passionoric.ifrance.com Best Regard. OlivieR. Austin Lesea wrote in message news:<3C0FE654.3DDD7829@xilinx.com>... > Caution, > > We once programmed an Apple II on an FPGA perhaps seven years ago. > > It ran far, far, too fast. > > The disk interface is done in software, so all of the timing was off. > Everything worked fine, but it couldn't talk to the disk drives. > > Austin > > > Kiyoung SON wrote: > > > designed FPGA for Apple II computer... > > I want it... ###### From: reconfigurable_logic@yahoo.com (Mike Butts) Newsgroups: comp.arch.fpga Subject: Re: where is designed FPGA for apple II computer...? Date: 7 Dec 2001 16:55:25 -0800 Organization: http://groups.google.com/ Lines: 32 Message-ID: <9d031b1e.0112071655.36c3bdc3@posting.google.com> References: <3C0FE654.3DDD7829@xilinx.com> NNTP-Posting-Host: 4.18.241.2 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8bit X-Trace: posting.google.com 1007772925 21028 127.0.0.1 (8 Dec 2001 00:55:25 GMT) X-Complaints-To: groups-abuse@google.com NNTP-Posting-Date: 8 Dec 2001 00:55:25 GMT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!37162!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed.stanford.edu!postnews1.google.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:12242 Apple II's 6502 runs at 1.022 MHz = 14.31818/14. 14.31818 MHz is 4X the NTSC color burst frequency, which is how Woz did a color graphic display with nothing more than DRAMs and a little 74LS TTL. If you take the motherboard design out of the old Apple II manual, insert a 6502 design where the 6502 goes, and run it at 14.31818 MHz, you'll be working fine. I know all this because 1) I wirewrapped an Apple II off the schematics back in about 1980, and 2) I used the Apple II motherboard design as the first design I emulated in the first logic emulator prototype (Realizer) I built back in 1988-9. That used XC3020s interconnected by XC2064s. I wired in a real 6502, Apple floppy controller, kbd, joystick, etc. The host would download the FPGAs, pulse reset, and "beep rattle rattle rattle", it booted off the floppy and ran Choplifter. To prove it was an emulation I developed a second version with a few gates flipped in the graphics logic. So after running the true Apple II I'd download one with the display upside down. Playing Choplifter (a 2-D helicopter game) that way was a hoot. Made a great logic emulation demo. Even the marketing guys understood it ;-) Woz (Steve Wozniak) is a genius. His Apple II is the best digital design I have ever seen in my life. --Mike Butts PS: To emulate the floppy controller you'll have to get the contents of the little PROM Woz used in its state machine. ###### From: James Horn Newsgroups: comp.arch.fpga Subject: Re: where is designed FPGA for APPLE....? Date: 6 Dec 2001 11:46:33 -0800 Organization: SVN.NET (www.svn.net) Lines: 15 Message-ID: <3c0fcb19@news.svn.net> References: NNTP-Posting-Host: news.svn.net X-Trace: nnrp.atgi.net 1007667987 1853 64.40.160.12 (6 Dec 2001 19:46:27 GMT) X-Complaints-To: abuse@atgi.net NNTP-Posting-Date: 6 Dec 2001 19:46:27 GMT User-Agent: tin/1.4.5-20010409 ("One More Nightmare") (UNIX) (Linux/2.4.16 (i686)) X-Original-NNTP-Posting-Host: 64.40.160.10 X-Original-Trace: 6 Dec 2001 11:46:33 -0800, 64.40.160.10 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!out.nntp.be!propagator-SanJose!in.nntp.be!telocity-west!TELOCITY!HSNX.atgi.net!nnrp.atgi.net!news.svn.net!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:12252 Well, if you're willing to use an external CPU and ROM, you can make it yourself for free. Just get the Apple ][ Owner's manual - it has complete schematics. Then enter 'em into your favorite FPGA toolset and have fun. Even the monitor source code listing is in that manual. The disk interface and optional printer card / 16k additional RAM / 80 column video / etc. cards are extra, of course. I've got a schematic for the 16k "Language card" (we made a bunch for ourselves at HP back in '81 or so). But even using an external RAM, Flash (for ROM), and CPU you'd only have a few chips on the board - and small, surface mount ones at that. Complete with backplane. Jim Horn, WB9SYN/6 ###### From: gah@ugcs.caltech.edu (glen herrmannsfeldt) Newsgroups: comp.arch.fpga Subject: Re: where is designed FPGA for apple II computer...? Date: 10 Dec 2001 22:46:09 GMT Organization: California Institute of Technology, Pasadena Lines: 19 Message-ID: <9v3dvh$m50@gap.cco.caltech.edu> References: <9uod8d$puk@gap.cco.caltech.edu> <3C0FE3E6.5E790EE0@andraka.com> NNTP-Posting-Host: yak.ugcs.caltech.edu X-Newsreader: NN version 6.5.0 #1 (NOV) Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!newscore.univie.ac.at!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsswitch.lcs.mit.edu!news.uchicago.edu!nntp-server.caltech.edu!gah Xref: chonsp.franklin.ch comp.arch.fpga:12324 Ray Andraka writes: >The hardware to do a PDP-8 is really quite minimal. As I recall, the >6502 had quite a few bells and whistles in the instruction set. I'd >also be vey impressed if you got a 6502 clone running at even 100 MHz in >an FPGA. The structure is not well matched to the FPGA, and designs >that are specifically tailored to the FPGA architecture have difficulty >running above about 100 MHz. I don't know them that well to compare, but I would think a 6502 wouldn't be hard to do in an FPGA. Maybe the speed was a little off, though probably not much longer before they are that fast. I think it takes a number of clock cycles for each instruction in a real 6502, and maybe in an emulated one, too. Not so many bells or whistles as the 6800. -- glen ###### Sender: eric@ruckus.brouhaha.com From: Eric Smith Newsgroups: comp.arch.fpga Subject: Re: where is designed FPGA for apple II computer...? References: <9uod8d$puk@gap.cco.caltech.edu> <3C0FE3E6.5E790EE0@andraka.com> <9v3dvh$m50@gap.cco.caltech.edu> Organization: Eric Conspiracy Secret Labs X-Eric-Conspiracy: There is no conspiracy. Date: 10 Dec 2001 15:05:27 -0800 Message-ID: Lines: 16 User-Agent: Gnus/5.0807 (Gnus v5.8.7) Emacs/20.7 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii NNTP-Posting-Host: ruckus.brouhaha.com X-Trace: 10 Dec 2001 15:10:53 -0800, ruckus.brouhaha.com Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!out.nntp.be!propagator-SanJose!in.nntp.be!news-in-sanjose!cyclone-sf.pbi.net!216.218.192.242!news.he.net!news.kjsl.com!news.spies.com!ruckus.brouhaha.com Xref: chonsp.franklin.ch comp.arch.fpga:12333 gah@ugcs.caltech.edu (glen herrmannsfeldt) writes: > I don't know them that well to compare, but I would think a 6502 > wouldn't be hard to do in an FPGA. Maybe the speed was a little > off, though probably not much longer before they are that fast. > > I think it takes a number of clock cycles for each instruction > in a real 6502, and maybe in an emulated one, too. It's fairly difficult to design it for the same number of clock cycles; the actual 6502 design is done cleverly. If you don't mind taking more clock cycles per instruction, it becomes easier to do in an FPGA, though it still takes a LARGE number of CLBs. > Not so many bells or whistles as the 6800. True. And easier ot match the cycle counts, as well. ###### From: "Jan Gray" Newsgroups: comp.arch.fpga Subject: Re: where is designed FPGA for apple II computer...? Date: Mon, 10 Dec 2001 16:21:57 -0800 Organization: Gray Research LLC Lines: 14 Message-ID: <9v3k2i$66o$1@slb3.atl.mindspring.net> References: <9uod8d$puk@gap.cco.caltech.edu> <3C0FE3E6.5E790EE0@andraka.com> <9v3dvh$m50@gap.cco.caltech.edu> NNTP-Posting-Host: 04.21.a1.6d X-Server-Date: 11 Dec 2001 00:30:10 GMT X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 6.00.2600.0000 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2600.0000 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.mailgate.org!newsfeeder.edisontel.com!newsfeed4.cidera.com!newsfeed1.cidera.com!Cidera!netnews.com!xfer02.netnews.com!newsfeed2.earthlink.net!newsfeed.earthlink.net!news.mindspring.net!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:12330 > it still takes a LARGE number of CLBs. A compact, quick, and easy way to implement a 6502 in an FPGA may be to build a 100-200 LUT RISC, and then emulate the 6502 in software. (An acceptable 6502 ISA emulator would probably fit in a couple of V-II BRAMs.) The same goes for any complex bit of hardware that only has to run at a few MHz. Jan Gray Gray Research LLC