From: Petter Gustad Newsgroups: comp.arch.fpga Subject: Xilinx machine readable package info Organization: 502 You are not allowed to talk Lines: 17 Sender: petter@filestore.home.gustad.com Message-ID: <87zo5yp87r.fsf@filestore.home.gustad.com> X-Home-Page: http://gustad.com X-Newsreader: Gnus v5.7/Emacs 20.7 NNTP-Posting-Host: 146.172.32.186 X-Complaints-To: news-abuse@nextra.no NNTP-Posting-Date: Wed, 07 Nov 2001 23:01:30 MET X-Trace: readme.online.no 1005170490 146.172.32.186 Date: 07 Nov 2001 22:44:08 +0100 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news.imp.ch!uni-erlangen.de!newsfeeds.belnet.be!news.belnet.be!news.tele.dk!small.news.tele.dk!212.37.1.10!newsfeed01.nntp.se.dataphone.net!nntp.se.dataphone.net!193.213.112.26.MISMATCH!newsfeed1.ulv.nextra.no!nextra.com!news1.oke.nextra.no.POSTED!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:11307 I'm working on a program to aid me in the tedious allocation of pins for a Virtex-II device. But I need to obtain package information, presumably in machine readable form. I can use partgen to generate a plain ASCII file, but this does not contain any information regarding the bank number for each pin. Is there an ASCII (or documented binary file) file where I can find this information? I guess this information is located in the nph file, but I don't have any documentation for its format. TIA Petter -- ________________________________________________________________________ Petter Gustad 8'h2B | (~8'h2B) - Hamlet in Verilog http://gustad.com ###### From: Mike Treseler Newsgroups: comp.arch.fpga Subject: Re: Xilinx machine readable package info Date: Wed, 07 Nov 2001 14:27:38 -0800 Organization: Fluke Networks Lines: 13 Message-ID: <3BE9B55A.23B01289@flukenetworks.com> References: <87zo5yp87r.fsf@filestore.home.gustad.com> NNTP-Posting-Host: slick.tc.fluke.com Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Mailer: Mozilla 4.77 [en] (X11; U; Linux 2.4.7-4GB i686) X-Accept-Language: en Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!cpk-news-hub1.bbnplanet.com!evrtwa1-snf1.gtei.net!news.gtei.net!fluke!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:11337 Petter Gustad wrote: > > I'm working on a program to aid me in the tedious allocation of pins > for a Virtex-II device. But I need to obtain package information, > presumably in machine readable form. bsdl files include the pin names and designations. check out: http://support.xilinx.com/support/sw_bsdl.htm --Mike Treseler ###### Message-ID: <3BE9CCD1.FBC32C43@algor.co.uk> From: Rick Filipkiewicz X-Mailer: Mozilla 4.75 [en] (WinNT; U) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: Xilinx machine readable package info References: <87zo5yp87r.fsf@filestore.home.gustad.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Organization: Algorithmics Ltd. Cache-Post-Path: mudchute.algor.co.uk!unknown@rfhome.algor.co.uk X-Cache: nntpcache 2.4.0b2 (see http://www.nntpcache.org/) Lines: 33 Date: Thu, 08 Nov 2001 00:07:45 +0000 NNTP-Posting-Host: 62.254.210.251 X-Complaints-To: abuse@ntlworld.com X-Trace: news6-win.server.ntlworld.com 1005178070 62.254.210.251 (Thu, 08 Nov 2001 00:07:50 GMT) NNTP-Posting-Date: Thu, 08 Nov 2001 00:07:50 GMT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news.imp.ch!fr.clara.net!heighliner.fr.clara.net!diablo.netcom.net.uk!netcom.net.uk!btnet-peer!btnet-peer0!btnet!news5-gui.server.ntli.net!ntli.net!news6-win.server.ntlworld.com.POSTED!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:11315 Petter Gustad wrote: > I'm working on a program to aid me in the tedious allocation of pins > for a Virtex-II device. But I need to obtain package information, > presumably in machine readable form. I can use partgen to generate a > plain ASCII file, but this does not contain any information regarding > the bank number for each pin. Is there an ASCII (or documented binary > file) file where I can find this information? > > I guess this information is located in the nph file, but I don't have > any documentation for its format. > > TIA > > Petter > -- > ________________________________________________________________________ > Petter Gustad 8'h2B | (~8'h2B) - Hamlet in Verilog http://gustad.com A trick I use, given that the idea of publishing simple ASCII text pinout/function files has escaped the attention of the chip industry since its inception, is to fake a design that uses every pin of the device (incl. clocks). Then a perl script can extract all the info you need from the post P&R .pad and .par files. The only non-simple thing you need to do is make sure there's at least one non-LVTTL IO standard so that the .par file has the banking info. Its a hassle to set up for the first device but easy for all subsequent ones you might want to use. Together with the advantage that the occasional pinout error in the published tables won't catch you out. ###### From: "Leon Heller" Newsgroups: comp.arch.fpga Subject: Re: Xilinx machine readable package info Date: Thu, 8 Nov 2001 06:11:48 -0000 Organization: BT Internet Lines: 26 Message-ID: <9sd7mm$jlp$1@uranium.btinternet.com> References: <87zo5yp87r.fsf@filestore.home.gustad.com> NNTP-Posting-Host: host213-122-209-204.btinternet.com X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 6.00.2600.0000 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2600.0000 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news.imp.ch!fr.clara.net!heighliner.fr.clara.net!isdnet!btnet-peer1!btnet-peer0!btnet-feed5!btnet!mendelevium.btinternet.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:11339 "Petter Gustad" wrote in message news:87zo5yp87r.fsf@filestore.home.gustad.com... > > I'm working on a program to aid me in the tedious allocation of pins > for a Virtex-II device. But I need to obtain package information, > presumably in machine readable form. I can use partgen to generate a > plain ASCII file, but this does not contain any information regarding > the bank number for each pin. Is there an ASCII (or documented binary > file) file where I can find this information? > I found pinouts for the Spartan-II chips in the form of an Excel spreadsheet somewhere on the Xilinx web site. It should be available for the Virtex chips as well. Leon -- Leon Heller, G1HSM leon_heller@hotmail.con http://www.geocities.com/leon_heller Low-cost Altera Flex design kit: http://www.leonheller.com ###### From: "Leon Heller" Newsgroups: comp.arch.fpga Subject: Re: Xilinx machine readable package info Date: Thu, 8 Nov 2001 06:34:03 -0000 Organization: BT Internet Lines: 21 Message-ID: <9sd90f$7mv$1@neptunium.btinternet.com> References: <87zo5yp87r.fsf@filestore.home.gustad.com> NNTP-Posting-Host: host213-122-209-204.btinternet.com X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 6.00.2600.0000 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2600.0000 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news.imp.ch!fr.clara.net!heighliner.fr.clara.net!esplande3000.net!isdnet!btnet-peer1!btnet-feed5!btnet!mendelevium.btinternet.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:11344 "Petter Gustad" wrote in message news:87zo5yp87r.fsf@filestore.home.gustad.com... > > I'm working on a program to aid me in the tedious allocation of pins > for a Virtex-II device. But I need to obtain package information, > presumably in machine readable form. I can use partgen to generate a > plain ASCII file, but this does not contain any information regarding > the bank number for each pin. Is there an ASCII (or documented binary > file) file where I can find this information? http://www.xilinx.com/products/virtex/vpackages.htm -- Leon Heller, G1HSM leon_heller@hotmail.con http://www.geocities.com/leon_heller Low-cost Altera Flex design kit: http://www.leonheller.com ###### From: Petter Gustad Newsgroups: comp.arch.fpga Subject: Re: Xilinx machine readable package info Organization: 502 You are not allowed to talk Lines: 21 Sender: petter@filestore.home.gustad.com Message-ID: <87g07pdr70.fsf@filestore.home.gustad.com> References: <87zo5yp87r.fsf@filestore.home.gustad.com> <9sd90f$7mv$1@neptunium.btinternet.com> X-Home-Page: http://gustad.com X-Newsreader: Gnus v5.7/Emacs 20.7 NNTP-Posting-Host: 146.172.32.186 X-Complaints-To: news-abuse@nextra.no NNTP-Posting-Date: Thu, 08 Nov 2001 20:01:29 MET X-Trace: readme.online.no 1005246089 146.172.32.186 Date: 08 Nov 2001 19:59:31 +0100 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news.imp.ch!nntp-out.monmouth.com!newspeer.monmouth.com!news.tele.dk!small.news.tele.dk!212.37.1.10!newsfeed01.nntp.se.dataphone.net!nntp.se.dataphone.net!news1.fra.nextra.com!nextra.com!news1.oke.nextra.no.POSTED!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:11355 "Leon Heller" writes: > "Petter Gustad" wrote in message > news:87zo5yp87r.fsf@filestore.home.gustad.com... > > > > I'm working on a program to aid me in the tedious allocation of pins > > for a Virtex-II device. But I need to obtain package information, > > presumably in machine readable form. I can use partgen to generate a > > plain ASCII file, but this does not contain any information regarding > > the bank number for each pin. Is there an ASCII (or documented binary > > file) file where I can find this information? > > http://www.xilinx.com/products/virtex/vpackages.htm Thanks, great. I'll just have to locate the same file for virtex2. So far I've only found PDF files. Petter -- ________________________________________________________________________ Petter Gustad 8'h2B | (~8'h2B) - Hamlet in Verilog http://gustad.com ###### From: Petter Gustad Newsgroups: comp.arch.fpga Subject: Re: Xilinx machine readable package info Organization: 502 You are not allowed to talk Lines: 17 Sender: petter@filestore.home.gustad.com Message-ID: <87d72tdr39.fsf@filestore.home.gustad.com> References: <87zo5yp87r.fsf@filestore.home.gustad.com> <3BE9CCD1.FBC32C43@algor.co.uk> X-Home-Page: http://gustad.com X-Newsreader: Gnus v5.7/Emacs 20.7 NNTP-Posting-Host: 146.172.32.186 X-Complaints-To: news-abuse@nextra.no NNTP-Posting-Date: Thu, 08 Nov 2001 21:01:30 MET X-Trace: readme.online.no 1005249690 146.172.32.186 Date: 08 Nov 2001 20:01:46 +0100 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!1993933!news.imp.ch!fr.clara.net!heighliner.fr.clara.net!news.tele.dk!small.news.tele.dk!212.37.1.10!newsfeed01.nntp.se.dataphone.net!nntp.se.dataphone.net!193.213.112.26.MISMATCH!newsfeed1.ulv.nextra.no!nextra.com!news1.oke.nextra.no.POSTED!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:11367 Rick Filipkiewicz writes: > A trick I use, given that the idea of publishing simple ASCII text > pinout/function files has escaped the attention of the chip industry since > its inception, is to fake a design that uses every pin of the device (incl. > clocks). Then a perl script can extract all the info you need from the post > P&R .pad and .par files. The only non-simple thing you need to do is make > sure there's at least one non-LVTTL IO standard so that the .par file has > the banking info. Smart. I'll look into that if I can't find any other easily readable files. Petter -- ________________________________________________________________________ Petter Gustad 8'h2B | (~8'h2B) - Hamlet in Verilog http://gustad.com ###### Path: chonsp.franklin.ch!not-for-mail From: Neil Franklin Newsgroups: comp.arch.fpga Subject: Re: Xilinx machine readable package info Date: 08 Nov 2001 23:21:19 +0100 Organization: My own Private Self Lines: 34 Message-ID: <6upu6saops.fsf@chonsp.franklin.ch> References: <87zo5yp87r.fsf@filestore.home.gustad.com> <9sd7mm$jlp$1@uranium.btinternet.com> NNTP-Posting-Host: chonsp.franklin.ch X-Trace: chonsp.franklin.ch 1005258079 1432 10.0.3.2 (8 Nov 2001 22:21:19 GMT) X-Complaints-To: news@chonsp.franklin.ch NNTP-Posting-Date: 8 Nov 2001 22:21:19 GMT X-Newsreader: Gnus v5.7/Emacs 20.4 Xref: chonsp.franklin.ch comp.arch.fpga:11370 "Leon Heller" writes: > "Petter Gustad" wrote in message > news:87zo5yp87r.fsf@filestore.home.gustad.com... > > > > plain ASCII file, but this does not contain any information regarding > > the bank number for each pin. Is there an ASCII (or documented binary > > file) file where I can find this information? > > I found pinouts for the Spartan-II chips in the form of an Excel spreadsheet > somewhere on the Xilinx web site. It should be available for the Virtex > chips as well. After seeing the Virtex data in one of the other posts, I got a bit of hope, and went searching the Xilinx site for Spartan-II (which is what I need, more precise XC2S200-PQ208). This seems to be your Excel file(s), in .zip archive: http://www.xilinx.com/products/spartan2/s2_pin.zip Unfortunately(?) I have no Windows and no Excel, so I need ASCII or HTML. I am not aware of some anti-word like program for Excel. Could one of the @xilinx.com people here on this group get someone to do and excel-ectomy on these files and put the raw data on the site, like it is for Virtex? -- Neil Franklin, neil@franklin.ch.remove http://neil.franklin.ch/ Hacker, Unix Guru, El Eng HTL/BSc, Sysadmin, Archer, Roleplayer - Intellectual Property is Intellectual Robbery ###### From: Peter Alfke Newsgroups: comp.arch.fpga Subject: Re: How dense are FPGA/CPLD's Date: Thu, 08 Nov 2001 17:10:56 -0800 Organization: Xilinx Lines: 14 Message-ID: <3BEB2D20.B3431FAF@xilinx.com> References: <3be44c04.109339469@news.charter.net> <3BE993A3.F854175D@dplanet.ch> <3BEA5DFB.55BC544E@iprimus.com.au> <3BEAAC84.C422C6BE@earthlink.net> <3BEB1B6F.60B00C6D@iprimus.com.au> Reply-To: peter.alfke@xilinx.com NNTP-Posting-Host: peter.xsj.xilinx.com Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii; x-mac-type="54455854"; x-mac-creator="4D4F5353" Content-Transfer-Encoding: 7bit X-Mailer: Mozilla 4.7 (Macintosh; U; PPC) X-Accept-Language: en To: Russell Shaw Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news.imp.ch!nntp-out.monmouth.com!newspeer.monmouth.com!cpk-news-hub1.bbnplanet.com!cambridge1-snf1.gtei.net!news.gtei.net!bos-service1.ext.raytheon.com!attla1!ip.att.net!newsgate.xilinx.com!cliff.xsj.xilinx.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:11374 Russell Shaw wrote: > What was the patent over? (This refers to the Xilinx vs Altera lawsuit.) I refuse to go into the merits and demerits of the case. But the main bone of contention was the Xilinx ( Ross Freeman ) patent #4 870 302 and its re-issue RE 34,363. I bet Altera would give you a different answer. Thank God it's over. Xilinx received a (token) $20M settlement from Altera. Only the lawyers got rich... Peter Alfke ###### From: Petter Gustad Newsgroups: comp.arch.fpga Subject: Re: Xilinx machine readable package info Organization: 502 You are not allowed to talk Lines: 46 Sender: petter@filestore.home.gustad.com Message-ID: <87668ke9a3.fsf@filestore.home.gustad.com> References: <87zo5yp87r.fsf@filestore.home.gustad.com> <9sd7mm$jlp$1@uranium.btinternet.com> <6upu6saops.fsf@chonsp.franklin.ch> X-Home-Page: http://gustad.com X-Newsreader: Gnus v5.7/Emacs 20.7 NNTP-Posting-Host: 146.172.32.186 X-Complaints-To: news-abuse@nextra.no NNTP-Posting-Date: Fri, 09 Nov 2001 08:01:31 MET X-Trace: readme.online.no 1005289291 146.172.32.186 Date: 09 Nov 2001 07:41:08 +0100 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news.imp.ch!uni-erlangen.de!newsfeeds.belnet.be!news.belnet.be!newsfeed.wirehub.nl!148.122.224.18.MISMATCH!news1.fra.nextra.com!nextra.com!news1.oke.nextra.no.POSTED!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:11435 Neil Franklin writes: > "Leon Heller" writes: > > > "Petter Gustad" wrote in message > > news:87zo5yp87r.fsf@filestore.home.gustad.com... > > > > > > plain ASCII file, but this does not contain any information regarding > > > the bank number for each pin. Is there an ASCII (or documented binary > > > file) file where I can find this information? > > > > I found pinouts for the Spartan-II chips in the form of an Excel spreadsheet > > somewhere on the Xilinx web site. It should be available for the Virtex > > chips as well. > > After seeing the Virtex data in one of the other posts, I got a bit of > hope, and went searching the Xilinx site for Spartan-II (which is what > I need, more precise XC2S200-PQ208). > > This seems to be your Excel file(s), in .zip archive: > > http://www.xilinx.com/products/spartan2/s2_pin.zip > > > Unfortunately(?) I have no Windows and no Excel, so I need ASCII or I don't use Windows either. Personally I can't see how people can consider an OS where a reboot is a part of the typical installation procedure as a serious EDA platform... > HTML. I am not aware of some anti-word like program for Excel. gnumeric, even though I've never actually used it myself. > Could one of the @xilinx.com people here on this group get someone to > do and excel-ectomy on these files and put the raw data on the site, > like it is for Virtex? It would be great if partinfo (or a similar) could generate most of the information found in the NPH file in a well documented and easily parsed ASCII format. Petter -- ________________________________________________________________________ Petter Gustad 8'h2B | (~8'h2B) - Hamlet in Verilog http://gustad.com ###### From: Petter Gustad Newsgroups: comp.arch.fpga Subject: Re: Xilinx machine readable package info Date: 09 Nov 2001 09:49:45 +0100 Organization: 502 You are not allowed to talk Lines: 22 Message-ID: References: <87zo5yp87r.fsf@filestore.home.gustad.com> <9sd90f$7mv$1@neptunium.btinternet.com> NNTP-Posting-Host: scimul.dolphinics.no Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-Trace: oslo-nntp.eunet.no 1005294891 4955 193.71.153.166 (9 Nov 2001 08:34:51 GMT) X-Complaints-To: abuse@KPNQwest.no NNTP-Posting-Date: 9 Nov 2001 08:34:51 GMT User-Agent: Gnus/5.0808 (Gnus v5.8.8) Emacs/20.7 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!newscore.univie.ac.at!fu-berlin.de!news.dataguard.no!Norway.EU.net!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:11429 "Leon Heller" writes: > "Petter Gustad" wrote in message > news:87zo5yp87r.fsf@filestore.home.gustad.com... > > > > I'm working on a program to aid me in the tedious allocation of pins > > for a Virtex-II device. But I need to obtain package information, > > presumably in machine readable form. I can use partgen to generate a > > plain ASCII file, but this does not contain any information regarding > > the bank number for each pin. Is there an ASCII (or documented binary > > file) file where I can find this information? > > http://www.xilinx.com/products/virtex/vpackages.htm Thanks, the Virtex II package files can be found at: http://www.xilinx.com/products/virtex/v2packages.htm Petter -- ________________________________________________________________________ Petter Gustad 8'h2B | (~8'h2B) - Hamlet in Verilog http://gustad.com