Message-ID: <3B794111.FD83B10C@wanabe.nl>
Date: Tue, 14 Aug 2001 17:17:37 +0200
From: Reinoud <dus@wanabe.nl>
Organization: remains troubled
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Subject: A parallel port - low voltage signal interface (for new FPGAs)
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BLAPP (Buffer and Level Adapter for Parallel Port) is a simple design
for safely interfacing a PC parallel port to circuits with low
voltage (CMOS) signals.  It offers a fair amount of protection, and
uses only standard parts.  The reason for the design was a need for
interfacing with newer FPGA families.  In the hope that it will be
useful to some:

    http://ce.et.tudelft.nl/~reinoud/blapp/README.html

- Reinoud

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