Message-ID: <3B38DAC3.C02FC7F3@prowokulta.org> Date: Tue, 26 Jun 2001 20:56:03 +0200 From: Kolja Sulimma X-Mailer: Mozilla 4.76 [de] (X11; U; Linux 2.4.2-4GB i686) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Stupid Xilinx Patent Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit NNTP-Posting-Host: 213.23.52.186 X-Trace: 26 Jun 2001 18:56:04 +0200, 213.23.52.186 Lines: 26 X-Complaints-To: abuse@arcor-ip.de Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!fr.clara.net!heighliner.fr.clara.net!newsfeed.hanau.net!news-fra1.dfn.de!newsfeed.arcor-ip.de!news.arcor-ip.de!213.23.52.186 Xref: chonsp.franklin.ch comp.arch.fpga:7606 I just stumbled over a stupid Xilinx patent describing how to builld an 8 input AND function in a single slice. It was filed in August 1999. http://www.delphion.com/details?pn=US06201410__ I know that I used structures like this years ago. Jan Gray wrote some messages about this but I could not find any posting that are old enough. Anyone published this before August 1999? I wonder what kind of licence fee xilinx has in mind. Or maybe they do not license it at all? What happens if synthesis implements this structure by chance? Remember that you can map the mux that is described in the patent into a XC4K H-LUT !!!! So Xilinx patented two of the "some 9-input functions" that can be implemented in a single XC4K CLB. There are only a few hundred left, maybe I should patent some of them. Then I will license the 9-input XOR for 1 cent per CLB. Kolja Sulimma ###### From: Peter Alfke Newsgroups: comp.arch.fpga Subject: Re: Stupid Xilinx Patent Date: Tue, 26 Jun 2001 10:48:37 -0700 Organization: Xilinx Lines: 51 Message-ID: <3B38CAF5.10720B2D@xilinx.com> References: <3B38DAC3.C02FC7F3@prowokulta.org> Reply-To: peter.alfke@xilinx.com NNTP-Posting-Host: peter.xsj.xilinx.com Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii; x-mac-type="54455854"; x-mac-creator="4D4F5353" Content-Transfer-Encoding: 7bit X-Mailer: Mozilla 4.7 (Macintosh; U; PPC) X-Accept-Language: en To: Kolja Sulimma Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!pinatubo.switch.ch!news-ge.switch.ch!newsfeed00.sul.t-online.de!t-online.de!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed.icl.net!netnews.com!micro-heart-of-gold.mit.edu!out.nntp.be!propagator-dallas!news-in-dallas.newsfeeds.com!cyclone-sf.pbi.net!216.166.61.5!nntp.giganews.com!nntp1.hal-pc.org!12.120.16.16.MISMATCH!attdl1!attdl2!attsl2!attla2!ip.att.net!newsgate.xilinx.com!cliff.xsj.xilinx.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:7466 Kolja, let's not get carried away. Xilinx has no intentions whatsoever to sue any user of Xilinx devices for having used any of these "systems-related" patents. Why we patent such things is a long, complicated, and even controversial story. But reality is that patents can make or break a company. Fairchild survived for years on the royalties from the planar patent, Kodak had to give up instant photography, when it was found violating a Polaroid patent. Philips has a tendency to patent anything in sight. But they have also had smart ideas, like audio and video cassettes and the CD... Closer to home, we have a 7-year long fight with Altera over some basic FPGA patents. In the case you cited, we somehow must have convinced the patent examiner that this use of LUTs etc. was novel and not obvious. But any Xilinx user has an automatic license to use this patent. Hopefully very often! :-) Peter Alfke Kolja Sulimma wrote: > I just stumbled over a stupid Xilinx patent describing how to builld an > 8 input AND function in a single slice. > It was filed in August 1999. > http://www.delphion.com/details?pn=US06201410__ > > I know that I used structures like this years ago. > Jan Gray wrote some messages about this but I could not find any posting > that are old enough. > > Anyone published this before August 1999? > > I wonder what kind of licence fee xilinx has in mind. Or maybe they do > not license it at all? > What happens if synthesis implements this structure by chance? Remember > that you can map the mux that is described in the patent into a XC4K > H-LUT !!!! > So Xilinx patented two of the "some 9-input functions" that can be > implemented in a single XC4K CLB. There are only a few hundred left, > maybe I should patent some of them. Then I will license the 9-input > XOR for 1 cent per CLB. > > Kolja Sulimma ###### From: "Austin Franklin" Newsgroups: comp.arch.fpga Subject: Re: Stupid Xilinx Patent Date: Tue, 26 Jun 2001 14:26:09 -0400 Organization: MindSpring Enterprises Lines: 37 Message-ID: <9hak45$cuo$1@slb3.atl.mindspring.net> References: <3B38DAC3.C02FC7F3@prowokulta.org> <3B38CAF5.10720B2D@xilinx.com> NNTP-Posting-Host: a5.f7.07.90 X-Server-Date: 26 Jun 2001 18:26:13 GMT X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 5.50.4522.1200 X-MimeOLE: Produced By Microsoft MimeOLE V5.50.4522.1200 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!pinatubo.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!cpk-news-hub1.bbnplanet.com!lsanca1-snf1!news.gtei.net!newsfeed2.earthlink.net!newsfeed.earthlink.net!news.mindspring.net!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:7708 > Xilinx has no intentions whatsoever to sue any user of Xilinx devices for having > used any of these "systems-related" patents. I don't know if it would stand up even if you did, for a number of reasons...one of them being this is a technique I know I've used for as long as I can remember...certainly prior to the filing date in 1999! > Why we patent such things is a long, complicated, and even controversial story. > But reality is that patents can make or break a company. Not patents like this! > Fairchild survived for years on the royalties from the planar patent, > Kodak had to give up instant photography, when it was found violating a Polaroid > patent. Entirely different stories... > Philips has a tendency to patent anything in sight. And Intel, and er, well, Xilinx ;-) > In the case you cited, we somehow must have convinced the patent examiner that > this use of LUTs etc. was novel and not obvious. Xilinx convinced the patent examiner that if was novel and not obvious to HIM (or HER). Unfortunately, the patent examiners for electronics are NOT very good. For fishing lures, they are top notch...but no EE who is worth their salt is going to work for the patent office at $60k/year, when they can be working in industry and making at least 2x that. Keep that in mind. ###### From: Peter Alfke Newsgroups: comp.arch.fpga Subject: Re: Stupid Xilinx Patent Date: Tue, 26 Jun 2001 12:28:31 -0700 Organization: Xilinx Lines: 47 Message-ID: <3B38E25F.CB0BC221@xilinx.com> References: <3B38DAC3.C02FC7F3@prowokulta.org> <3B38CAF5.10720B2D@xilinx.com> <9hak45$cuo$1@slb3.atl.mindspring.net> Reply-To: peter.alfke@xilinx.com NNTP-Posting-Host: peter.xsj.xilinx.com Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii; x-mac-type="54455854"; x-mac-creator="4D4F5353" Content-Transfer-Encoding: 7bit X-Mailer: Mozilla 4.7 (Macintosh; U; PPC) X-Accept-Language: en To: Austin Franklin Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!korova.insync.net!nntp1.hal-pc.org!12.120.16.16.MISMATCH!attdl1!attdl2!attsl2!attla2!attla1!ip.att.net!newsgate.xilinx.com!cliff.xsj.xilinx.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:7478 I will not argue the validity of a specific patent, nor the general reasons for patenting, nor the quality of patent examiners. But I do maintain that no Xilinx user should be intimidated or feel restrained by this patent. Don't even be upset. If you want to, be amused. That's all. Peter Alfke ================================ Austin Franklin wrote: > > Xilinx has no intentions whatsoever to sue any user of Xilinx devices for > having > > used any of these "systems-related" patents. > > I don't know if it would stand up even if you did, for a number of > reasons...one of them being this is a technique I know I've used for as long > as I can remember...certainly prior to the filing date in 1999! > > > Why we patent such things is a long, complicated, and even controversial > story. > > But reality is that patents can make or break a company. > > Not patents like this! > > > Fairchild survived for years on the royalties from the planar patent, > > Kodak had to give up instant photography, when it was found violating a > Polaroid > > patent. > > Entirely different stories... > > > Philips has a tendency to patent anything in sight. > > And Intel, and er, well, Xilinx ;-) > > > In the case you cited, we somehow must have convinced the patent examiner > that > > this use of LUTs etc. was novel and not obvious. > > Xilinx convinced the patent examiner that if was novel and not obvious to > HIM (or HER). Unfortunately, the patent examiners for electronics are NOT > very good. For fishing lures, they are top notch...but no EE who is worth > their salt is going to work for the patent office at $60k/year, when they > can be working in industry and making at least 2x that. Keep that in mind. ###### Message-ID: <3B38E6BA.409D78BD@sulimma.de> Date: Tue, 26 Jun 2001 21:47:07 +0200 From: Kolja Sulimma Reply-To: kolja@sulimma.de X-Mailer: Mozilla 4.7 [en] (Win98; I) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: Stupid Xilinx Patent References: <3B38DAC3.C02FC7F3@prowokulta.org> <3B38CAF5.10720B2D@xilinx.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit NNTP-Posting-Host: 213.23.52.186 X-Trace: 26 Jun 2001 21:47:08 +0200, 213.23.52.186 Lines: 71 X-Complaints-To: abuse@arcor-ip.de Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!newsfeed00.sul.t-online.de!t-online.de!newsfeed.r-kom.de!newsfeed.arcor-ip.de!news.arcor-ip.de!213.23.52.186 Xref: chonsp.franklin.ch comp.arch.fpga:7472 Peter Alfke wrote: > Kolja, let's not get carried away. I just do not like the patent law, thats all. > Xilinx has no intentions whatsoever to sue any user of Xilinx devices for having > used any of these "systems-related" patents. Thats probably right. Unisiys had no intention to sue anyone about their compression patents for almost 20 years. Than they announced to sue everyone who has a GIF on his web site. Later they limited it to a couple of hundred software companies... AFAIK it is illegal for me to use this technique without permission from Xilinx. That's true even if the patent does not hold, because I am require to challenge any patent that I believe to be unjustified orior to using it. > Why we patent such things is a long, complicated, and even controversial story. > But reality is that patents can make or break a company. Or break other companies... To protect yourself from other peoples patent claims it is enough to publish any idea that you have. > Closer to home, we have a 7-year long fight with Altera over some basic FPGA > patents. Thats right. Xilinx patented the great idea of having two routing networks, one general and one special for short connections. Because this idea had been implemented a thousand times before (for example in automata designed by John v. Neumann in the 60's) they based the patent on the novel idea that these networks have no connectino whatsoever.. (all the other Implementations had at least one conenctions between those resources) On the ground of this missing connection Xilinx now tries to prevent the import of essentially all Altera products into the US. That's not what I call nice behaviour. You should try to build your success on superior products instead. Be honest: In the unlikely case that you succeed in banning altera from the US, your research budget would be cut. And Xilinx would become the Microsoft of the FPGA world. > In the case you cited, we somehow must have convinced the patent examiner that > this use of LUTs etc. was novel and not obvious. > But any Xilinx user has an automatic license to use this patent. Hopefully very > often! :-) Where is this fact published? I twenty years, when my IP core sold 10 Million times and Xilinx has become a huge dinosaur because they bet their money on FPGAs alone and ignored the new 3-D quantum logic trend and decides to behave like Unisys or Rambus, then I am going to need more then a newgroup posting... Suggestion: The Delphion Patent Database allows to enter licensing information for any patent. Why don't you add a note to these patents, that the use of it is free? Kolja Sulimma P.S.: The following patent (filed 2/2000) describes exactly one of the main feature of the BRASS HSRA FPGA design that I worked on at UC Berkeley in 1997: Published 1/99 at the FPGA symposium. BRASS uses many pages instead of 2, but otherwise it is the same. http://www.delphion.com/details?pn=US06150839__ ###### From: gah@ugcs.caltech.edu (glen herrmannsfeldt) Newsgroups: comp.arch.fpga Subject: Re: Stupid Xilinx Patent Date: 26 Jun 2001 20:55:15 GMT Organization: California Institute of Technology, Pasadena Lines: 20 Message-ID: <9hasrj$1rl@gap.cco.caltech.edu> References: <3B38DAC3.C02FC7F3@prowokulta.org> <3B38CAF5.10720B2D@xilinx.com> <9hak45$cuo$1@slb3.atl.mindspring.net> <3B38E25F.CB0BC221@xilinx.com> NNTP-Posting-Host: seniti.ugcs.caltech.edu X-Newsreader: NN version 6.5.0 #1 (NOV) Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!pinatubo.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!newsfeed1.cidera.com!vixen.cso.uiuc.edu!news.uchicago.edu!nntp-server.caltech.edu!gah Xref: chonsp.franklin.ch comp.arch.fpga:7650 Peter Alfke writes: >I will not argue the validity of a specific patent, nor the >general reasons for patenting, nor the quality of patent examiners. >But I do maintain that no Xilinx user should be intimidated or >feel restrained by this patent. >Don't even be upset. If you want to, be amused. Everyone in the binary logic business learns quickly that XOR has the property that if applied twice restores the original value. Yet someone has a patent on using XOR on a bit-mapped display, with the property of being able to erase by XORint again. It was twice challenged and twice upheld. Now, as XOR is a fundamental logical operation, I feel badly toward a company that would try to patent it. I don't know the details of the Xilinx patent, but it does sound more than amusing to me. -- glen ###### From: "Austin Franklin" Newsgroups: comp.arch.fpga Subject: Re: Stupid Xilinx Patent Date: Tue, 26 Jun 2001 17:02:06 -0400 Organization: MindSpring Enterprises Lines: 7 Message-ID: <9hat91$lul$1@slb2.atl.mindspring.net> References: <3B38DAC3.C02FC7F3@prowokulta.org> <3B38CAF5.10720B2D@xilinx.com> <9hak45$cuo$1@slb3.atl.mindspring.net> <3B38E25F.CB0BC221@xilinx.com> NNTP-Posting-Host: a5.f7.07.90 X-Server-Date: 26 Jun 2001 21:02:25 GMT X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 5.50.4522.1200 X-MimeOLE: Produced By Microsoft MimeOLE V5.50.4522.1200 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!newsfeed00.sul.t-online.de!t-online.de!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!cpk-news-hub1.bbnplanet.com!news.gtei.net!news.mindspring.net!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:7710 > Don't even be upset. If you want to, be amused. I am amused, but also annoyed. Patents like this, are the bane of my existence at times, being that I do patent work. ###### From: cyber_spook Newsgroups: comp.arch.fpga Subject: Re: Stupid Xilinx Patent Date: Tue, 26 Jun 2001 22:25:28 +0100 Organization: Netscape Online member Lines: 28 Message-ID: <3B38FDC8.7D15928@cyberspook.freeserve.co.uk> References: <3B38DAC3.C02FC7F3@prowokulta.org> <3B38CAF5.10720B2D@xilinx.com> <9hak45$cuo$1@slb3.atl.mindspring.net> <3B38E25F.CB0BC221@xilinx.com> <9hasrj$1rl@gap.cco.caltech.edu> NNTP-Posting-Host: modem-340.parrot.dialup.pol.co.uk Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: newsg3.svr.pol.co.uk 993590942 15158 62.137.105.84 (26 Jun 2001 21:29:02 GMT) NNTP-Posting-Date: 26 Jun 2001 21:29:02 GMT X-Complaints-To: abuse@theplanet.net X-Mailer: Mozilla 4.6 [en-gb]C-CCK-MCD NetscapeOnline.co.uk (Win98; I) X-Accept-Language: en-GB,en Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!fr.clara.net!heighliner.fr.clara.net!diablo.netcom.net.uk!netcom.net.uk!diablo.theplanet.net!news.theplanet.net!newspost.theplanet.net!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:7800 Being a Fan of Peter I don't wish to upset him... but these are my views... Currently I see the two big guns of the FPGA world finding ways to block or out do each other just to gain some ground. I don't see how this can realy benifit us the engineers!? It would however be nice if these idears were published so that everyone can take advantage for the benifit of the design. Putting a Paten on the way a gate is implumented is like having a paten on a type of nut and blot! these are the things we build with to make our designs. If someone wishes to paten somthing then paten a PCI funtion block that will do 66Mhz/64Bits in under 100 gates!!! In other words paten something that is a major break though for the industre and not the way a gate is implumented. Question: If I do this in a Altera chip - Do I have to pay Xilinx? I never liked Microsoft - but we were all puched into it - I hope Altera and Xilinx continue to give us a choise as a monoply firm like Microsoft will come under the microscope and have the finger pointed at *it* for not suppling what *we* the designers want! I think compines should remember that it is us and our pennys that put them up at the top and things like this just make them look greedy and give a bad impresstion to its users. Regards Cyber_Spook_Man ###### From: Rick Collins Newsgroups: comp.arch.fpga Subject: Re: Stupid Xilinx Patent Date: Wed, 27 Jun 2001 04:10:26 -0400 Organization: Arius, Inc Lines: 56 Message-ID: <3B3994F1.687778FD@yahoo.com> References: <3B38DAC3.C02FC7F3@prowokulta.org> <3B38CAF5.10720B2D@xilinx.com> <9hak45$cuo$1@slb3.atl.mindspring.net> <3B38E25F.CB0BC221@xilinx.com> <9hasrj$1rl@gap.cco.caltech.edu> <3B38FDC8.7D15928@cyberspook.freeserve.co.uk> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: UmFuZG9tSVY4vZxp/T6hDl7pkkZk9HbU2gjP9bl/rjv0j7ghFh2Ps5hD+s9UI16F X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 27 Jun 2001 08:10:38 GMT X-Mailer: Mozilla 4.73 [en] (Win98; U) X-Accept-Language: en Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!feed2.news.rcn.net!feed1.news.rcn.net!rcn!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:7425 I took a look at the patent, and it does not look like a significant issue. The patent seems to cover specific configurations that allow you to combine two LUTs using a mux to implement AND and OR functions among others. But if I understand correctly, if you don't use a mux, then you have a different circuit. I also don't know if this is a valid patent. I have a data sheet from Lucent dated June '99 which clearly shows multiple LUTs connected by muxes. Certainly no one can say it is not obvious to program these muxes to make the two LUTs into a single AND or OR gate. Like, DUH! cyber_spook wrote: > > Being a Fan of Peter I don't wish to upset him... but these are my > views... > > Currently I see the two big guns of the FPGA world finding ways to block > or out do each other just to gain some ground. I don't see how this can > realy benifit us the engineers!? It would however be nice if these idears > were published so that everyone can take advantage for the benifit of the > design. Putting a Paten on the way a gate is implumented is like having a > paten on a type of nut and blot! these are the things we build with to > make our designs. If someone wishes to paten somthing then paten a PCI > funtion block that will do 66Mhz/64Bits in under 100 gates!!! In other > words paten something that is a major break though for the industre and > not the way a gate is implumented. > > Question: If I do this in a Altera chip - Do I have to pay Xilinx? > > I never liked Microsoft - but we were all puched into it - I hope Altera > and Xilinx continue to give us a choise as a monoply firm like Microsoft > will come under the microscope and have the finger pointed at *it* for > not suppling what *we* the designers want! I think compines should > remember that it is us and our pennys that put them up at the top and > things like this just make them look greedy and give a bad impresstion to > its users. > > Regards > > Cyber_Spook_Man -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAX ###### Message-ID: <3B399C0B.2A2CAA4@sulimma.de> Date: Wed, 27 Jun 2001 10:40:43 +0200 From: Kolja Sulimma Reply-To: kolja@sulimma.de X-Mailer: Mozilla 4.7 [en] (Win98; I) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: Stupid Xilinx Patent References: <3B38DAC3.C02FC7F3@prowokulta.org> <3B38CAF5.10720B2D@xilinx.com> <9hak45$cuo$1@slb3.atl.mindspring.net> <3B38E25F.CB0BC221@xilinx.com> <9hasrj$1rl@gap.cco.caltech.edu> <3B38FDC8.7D15928@cyberspook.freeserve.co.uk> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit NNTP-Posting-Host: 213.23.52.59 X-Trace: 27 Jun 2001 10:40:44 +0200, 213.23.52.59 Lines: 15 X-Complaints-To: abuse@arcor-ip.de Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.bme.hu!andromeda.datanet.hu!bignews.mediaways.net!newsfeed.arcor-ip.de!news.arcor-ip.de!213.23.52.59 Xref: chonsp.franklin.ch comp.arch.fpga:7436 cyber_spook wrote: > Being a Fan of Peter I don't wish to upset him... but these are my > views... I sincerely hope we can have contrary views in this newgroup without upsetting anybody. Besides: Peter is known for taking a lot of beating in this newsgroup for things that are not his fault And he still continues with his invaluable support. Kolja Sulimma ###### From: Greg Neff Newsgroups: comp.arch.fpga Subject: Re: Stupid Xilinx Patent Date: Wed, 27 Jun 2001 09:21:58 -0400 Organization: Microsym Computers Inc. Lines: 23 Message-ID: <1bnjjtg9mb715ghg38l83d5gdh8nd13dsv@4ax.com> References: <3B38DAC3.C02FC7F3@prowokulta.org> <3B38CAF5.10720B2D@xilinx.com> <9hak45$cuo$1@slb3.atl.mindspring.net> NNTP-Posting-Host: hil-qbu-ppm-vty6.as.wcom.net Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: sshuraaa-i-1.production.compuserve.com 993648080 22688 206.175.100.6 (27 Jun 2001 13:21:20 GMT) X-Complaints-To: newsmaster@compuserve.com NNTP-Posting-Date: 27 Jun 2001 13:21:20 GMT X-Newsreader: Forte Agent 1.8/32.548 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!pinatubo.switch.ch!news-ge.switch.ch!newsfeed.mathworks.com!portc01.blue.aol.com!news.compuserve.com!news-master.compuserve.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:7794 On Tue, 26 Jun 2001 14:26:09 -0400, "Austin Franklin" wrote: (snip) > >Xilinx convinced the patent examiner that if was novel and not obvious to >HIM (or HER). Unfortunately, the patent examiners for electronics are NOT >very good. For fishing lures, they are top notch...but no EE who is worth >their salt is going to work for the patent office at $60k/year, when they >can be working in industry and making at least 2x that. Keep that in mind. > > I recently read an issued patent that included a specific claim on N-input OR gates used to accept data from N-sources. I wonder what OR gates were used before this inventor came up with this novel concept... =================================== Greg Neff VP Engineering *Microsym* Computers Inc. greg@guesswhichwordgoeshere.com ###### From: Davis Moore Newsgroups: comp.arch.fpga Subject: Re: Stupid Xilinx Patent Date: Wed, 27 Jun 2001 10:20:43 -0600 Organization: CAE Core Software Lines: 24 Message-ID: <3B3A07DB.2CE164A@ieee.org> References: <3B38DAC3.C02FC7F3@prowokulta.org> <3B38CAF5.10720B2D@xilinx.com> <9hak45$cuo$1@slb3.atl.mindspring.net> <3B38E25F.CB0BC221@xilinx.com> <9hasrj$1rl@gap.cco.caltech.edu> <3B38FDC8.7D15928@cyberspook.freeserve.co.uk> <3B3994F1.687778FD@yahoo.com> NNTP-Posting-Host: optimus.xsj.xilinx.com Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Mailer: Mozilla 4.7 [en] (X11; I; SunOS 5.8 sun4u) X-Accept-Language: en Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed.cwix.com!sjc-peer.news.verio.net!dfw-feed.news.verio.net!news.verio.net!nntp1.hal-pc.org!12.120.16.16.MISMATCH!attdl1!attdl2!attsl2!attla2!ip.att.net!newsgate.xilinx.com!cliff.xsj.xilinx.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:7865 Rick Collins wrote: > > I took a look at the patent, and it does not look like a significant > issue. The patent seems to cover specific configurations that allow you > to combine two LUTs using a mux to implement AND and OR functions among > others. But if I understand correctly, if you don't use a mux, then you > have a different circuit. > > I also don't know if this is a valid patent. I have a data sheet from > Lucent dated June '99 which clearly shows multiple LUTs connected by > muxes. Certainly no one can say it is not obvious to program these muxes > to make the two LUTs into a single AND or OR gate. Like, DUH! > Everyone here seems to think that owning the patent means that you invented the idea. That is not the case in MOST patents. This patent is probably specfic to FPGAs. Sure people have been using this logic construct for a long time, but have they been doing it in an FPGA? I don't know the answer to that, but my point is that a lot of patents are based on well known technology that is applied in novel ways. I'm sure Xilinx would not claim to own the rights to a wide input OR function, but they might be able to claim that their *FPGA* was the first of its kind to contain such a circuit. ###### From: tom_systek@msn.com (Tom Seim) Newsgroups: comp.arch.fpga Subject: Re: Stupid Xilinx Patent Date: 27 Jun 2001 10:32:20 -0700 Organization: http://groups.google.com/ Lines: 26 Message-ID: <308fd995.0106270932.6eb8b987@posting.google.com> References: <3B38DAC3.C02FC7F3@prowokulta.org> <3B38CAF5.10720B2D@xilinx.com> <9hak45$cuo$1@slb3.atl.mindspring.net> <3B38E25F.CB0BC221@xilinx.com> <9hasrj$1rl@gap.cco.caltech.edu> <3B38FDC8.7D15928@cyberspook.freeserve.co.uk> <3B399C0B.2A2CAA4@sulimma.de> NNTP-Posting-Host: 63.25.45.29 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8bit X-Trace: posting.google.com 993663140 20974 127.0.0.1 (27 Jun 2001 17:32:20 GMT) X-Complaints-To: groups-support@google.com NNTP-Posting-Date: 27 Jun 2001 17:32:20 GMT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed.stanford.edu!postnews1.google.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:7791 It might help to look at the big picture: America's economy is largely based on a technology lead over the rest of the world (we certainly are not going to compete with China on wage rates). Patents are a key part of protecting our technology edge. Are there dumb, obvious, bizare and ridiculous patents? Of course, but we have a legal system for sorting that out (those poor, destitute lawyers have to make a living some how, God knows that they don't have any useful skills). Tom Seim Kolja Sulimma wrote in message news:<3B399C0B.2A2CAA4@sulimma.de>... > cyber_spook wrote: > > > Being a Fan of Peter I don't wish to upset him... but these are my > > views... > > I sincerely hope we can have contrary views in this newgroup without > upsetting anybody. > > Besides: > Peter is known for taking a lot of beating in this newsgroup for things that > are not his fault > And he still continues with his invaluable support. > > Kolja Sulimma ###### From: Austin Lesea Newsgroups: comp.arch.fpga Subject: Re: Stupid Xilinx Patent Date: Wed, 27 Jun 2001 10:55:53 -0700 Organization: Xilinx Lines: 62 Message-ID: <3B3A1E29.A61A7BF9@xilinx.com> References: <3B38DAC3.C02FC7F3@prowokulta.org> <3B38CAF5.10720B2D@xilinx.com> <9hak45$cuo$1@slb3.atl.mindspring.net> <3B38E25F.CB0BC221@xilinx.com> <9hasrj$1rl@gap.cco.caltech.edu> <3B38FDC8.7D15928@cyberspook.freeserve.co.uk> <3B399C0B.2A2CAA4@sulimma.de> <308fd995.0106270932.6eb8b987@posting.google.com> NNTP-Posting-Host: 149.199.7.181 Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Mailer: Mozilla 4.76 [en] (WinNT; U) X-Accept-Language: en,pdf Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed1.cidera.com!netnews.com!newsfeed.nyc.globix.net!newsfeed.sjc.globix.net!cyclone-sf.pbi.net!216.166.61.5!nntp.giganews.com!nntp1.hal-pc.org!12.120.16.16.MISMATCH!attdl1!attdl2!attsl2!attla2!ip.att.net!newsgate.xilinx.com!cliff.xsj.xilinx.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:7485 Tom, The Golgafrinchian Ark "B" had no lawyers on it. Perhaps this is the reason why. If you search for patents in my name, (or Peter's) you may be amused at what is "patentable." I hope no one gets "insensed." There are many fine legal distinctions that I do not pretend to understand, and the laws are changing daily. As it was explained to me, "new" and "obvious" have totally legal meanings when it comes to patents. The laws in different countries are also different. So it may be old, and obvious to you, but within the very narrow confines of patent law, it may be "new" and not "obvious" and thus, patentable. Also, "one skilled in the art" is another of my favorite phrases, as unless you work for one of two companies, you really don't know anything at all about the design, care, and feeding, or the internal guts of the ultra-deep sub micron FPGA technologies. If we would have patented a few use related issues back in the 2000 days, no one would have been able to use LUTS in FPGA's at all. It isn't the LUT itself, it is the use of the LUT in an FPGA to do something. If that has never been done before, and it is by definition "new," and even if every customer uses it (after all, you didn't need a license to use a Polaroid Camera), you are "protected" (whatever the hell that means). I suggest that anyone really hot about this issue go work as an expert witness for awhile: excellent pay (even while traveling!), good food, short hours. Email us with the number of months you could stomach it, before you give up the fat living, and go back to a real job in total disgust and disillusionment....... Austin Tom Seim wrote: > It might help to look at the big picture: America's economy is largely > based on a technology lead over the rest of the world (we certainly > are not going to compete with China on wage rates). Patents are a key > part of protecting our technology edge. > Are there dumb, obvious, bizare and ridiculous patents? Of course, but > we have a legal system for sorting that out (those poor, destitute > lawyers have to make a living some how, God knows that they don't have > any useful skills). > > Tom Seim > > Kolja Sulimma wrote in message news:<3B399C0B.2A2CAA4@sulimma.de>... > > cyber_spook wrote: > > > > > Being a Fan of Peter I don't wish to upset him... but these are my > > > views... > > > > I sincerely hope we can have contrary views in this newgroup without > > upsetting anybody. > > > > Besides: > > Peter is known for taking a lot of beating in this newsgroup for things that > > are not his fault > > And he still continues with his invaluable support. > > > > Kolja Sulimma ###### From: "Austin Franklin" Newsgroups: comp.arch.fpga Subject: Re: Stupid Xilinx Patent Date: Wed, 27 Jun 2001 14:42:09 -0400 Organization: MindSpring Enterprises Lines: 7 Message-ID: <9hd9ed$jh5$1@slb6.atl.mindspring.net> References: <3B38DAC3.C02FC7F3@prowokulta.org> <3B38CAF5.10720B2D@xilinx.com> <9hak45$cuo$1@slb3.atl.mindspring.net> <3B38E25F.CB0BC221@xilinx.com> <9hasrj$1rl@gap.cco.caltech.edu> <3B38FDC8.7D15928@cyberspook.freeserve.co.uk> <3B3994F1.687778FD@yahoo.com> <3B3A07DB.2CE164A@ieee.org> NNTP-Posting-Host: a5.f7.0b.71 X-Server-Date: 27 Jun 2001 18:42:21 GMT X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 5.50.4522.1200 X-MimeOLE: Produced By Microsoft MimeOLE V5.50.4522.1200 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!feed2.news.rcn.net!rcn!newsfeed1.earthlink.net!newsfeed2.earthlink.net!newsfeed.earthlink.net!news.mindspring.net!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:7705 > Sure people have been using this > logic construct for a long time, but have they been doing it in an FPGA? YES. ###### From: "Austin Franklin" Newsgroups: comp.arch.fpga Subject: Re: Stupid Xilinx Patent Date: Wed, 27 Jun 2001 14:56:14 -0400 Organization: MindSpring Enterprises Lines: 19 Message-ID: <9hda8o$thg$1@slb2.atl.mindspring.net> References: <3B38DAC3.C02FC7F3@prowokulta.org> <3B38CAF5.10720B2D@xilinx.com> <9hak45$cuo$1@slb3.atl.mindspring.net> <3B38E25F.CB0BC221@xilinx.com> <9hasrj$1rl@gap.cco.caltech.edu> <3B38FDC8.7D15928@cyberspook.freeserve.co.uk> <3B399C0B.2A2CAA4@sulimma.de> <308fd995.0106270932.6eb8b987@posting.google.com> <3B3A1E29.A61A7BF9@xilinx.com> NNTP-Posting-Host: a5.f7.0b.71 X-Server-Date: 27 Jun 2001 18:56:24 GMT X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 5.50.4522.1200 X-MimeOLE: Produced By Microsoft MimeOLE V5.50.4522.1200 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!feed2.news.rcn.net!rcn!netnews.com!newsfeed2.earthlink.net!newsfeed.earthlink.net!news.mindspring.net!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:7714 > As it was explained to me, "new" and "obvious" have totally legal meanings when it comes to > patents. What is new and novel to the patent examiner may not be new and novel to a truly qualified engineer. > Also, "one skilled in the art" is another of my favorite phrases, I assure you, the patent examiners for this type of stuff are NOT "skilled in the art" to the extent they should be. How "skilled" is "skilled"?. That is unfortunately a fact. It is a downside of technology patents that the USPTO has not dealt with appropriately, IMO. Just think about the "one click" patent and a number of the business "process" patents that have been recently issued... ###### From: cyber_spook Newsgroups: comp.arch.fpga Subject: Re: Stupid Xilinx Patent Date: Wed, 27 Jun 2001 21:36:12 +0100 Organization: Netscape Online member Lines: 12 Message-ID: <3B3A43BC.EDA209CF@cyberspook.freeserve.co.uk> References: <3B38DAC3.C02FC7F3@prowokulta.org> <3B38CAF5.10720B2D@xilinx.com> <9hak45$cuo$1@slb3.atl.mindspring.net> <3B38E25F.CB0BC221@xilinx.com> <9hasrj$1rl@gap.cco.caltech.edu> <3B38FDC8.7D15928@cyberspook.freeserve.co.uk> <3B399C0B.2A2CAA4@sulimma.de> NNTP-Posting-Host: modem-214.crow.dialup.pol.co.uk Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: newsg4.svr.pol.co.uk 993674386 7715 62.137.120.214 (27 Jun 2001 20:39:46 GMT) NNTP-Posting-Date: 27 Jun 2001 20:39:46 GMT X-Complaints-To: abuse@theplanet.net X-Mailer: Mozilla 4.6 [en-gb]C-CCK-MCD NetscapeOnline.co.uk (Win98; I) X-Accept-Language: en-GB,en Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!dispose.news.demon.net!demon!diablo.theplanet.net!news.theplanet.net!newspost.theplanet.net!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:7835 Kolja Sulimma wrote: > I sincerely hope we can have contrary views in this newgroup without > upsetting anybody. Agreed but some times the written word dose not carry the body language we see when we talk - so I like to point it out. Cyber_Spook_Man ###### From: "Steve Casselman" Newsgroups: comp.arch.fpga References: <3B38DAC3.C02FC7F3@prowokulta.org> <3B38CAF5.10720B2D@xilinx.com> <9hak45$cuo$1@slb3.atl.mindspring.net> <3B38E25F.CB0BC221@xilinx.com> <9hasrj$1rl@gap.cco.caltech.edu> <3B38FDC8.7D15928@cyberspook.freeserve.co.uk> <3B399C0B.2A2CAA4@sulimma.de> <308fd995.0106270932.6eb8b987@posting.google.com> <3B3A1E29.A61A7BF9@xilinx.com> <9hda8o$thg$1@slb2.atl.mindspring.net> Subject: Re: Stupid Xilinx Patent Lines: 48 X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 5.50.4133.2400 X-MimeOLE: Produced By Microsoft MimeOLE V5.50.4133.2400 Message-ID: Date: Wed, 27 Jun 2001 14:28:25 -0700 NNTP-Posting-Host: 64.174.106.246 X-Complaints-To: abuse@pacbell.net X-Trace: news.pacbell.net 993677448 64.174.106.246 (Wed, 27 Jun 2001 14:30:48 PDT) NNTP-Posting-Date: Wed, 27 Jun 2001 14:30:48 PDT Organization: SBC Internet Services Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!feed2.onemain.com!feed1.onemain.com!cyclone-sf.pbi.net!206.13.28.143!news.pacbell.net.POSTED!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:7670 Actually in the patent system it is the responsibility of the applicant to supply the examiner with all the information needed to make a determination of what is patentable. The applicant has to provide the examiner with _all_ the prior art associated with a proclaimed invention. We had to "train" our examiner but he now has a good grasp on reconfigurable computing. For example I got the patent for automatically downloading configurations into FPGAs. I had applied for this patent years before and was not able to search for all the prior art. When I was allowed the claims I looked around and saw that that there was some prior art (1) so I withdrew the patent and resubmitted it with a ton of prior art and claims about "generating bitstreams on the fly." I got that patent and 4 others. So the bottom line is the applicant is responsible for educating the examiner. That is the reason losers in patent cases have to pay court costs. So really getting a patent is just the first leg of having the protection everyone thinks a patent gives them. One side point on stupid patents. I'd rather that Xilinx had all the stupid patents on FPGAs rather than someone else at least that stops someone running around trying to stop someone from doing a design. Steve Casselman "Austin Franklin" wrote in message news:9hda8o$thg$1@slb2.atl.mindspring.net... > > As it was explained to me, "new" and "obvious" have totally legal meanings > when it comes to > > patents. > > What is new and novel to the patent examiner may not be new and novel to a > truly qualified engineer. > > > Also, "one skilled in the art" is another of my favorite phrases, > > I assure you, the patent examiners for this type of stuff are NOT "skilled > in the art" to the extent they should be. How "skilled" is "skilled"?. > That is unfortunately a fact. It is a downside of technology patents that > the USPTO has not dealt with appropriately, IMO. > > Just think about the "one click" patent and a number of the business > "process" patents that have been recently issued... > > > > ###### Message-ID: <3B3A52D2.53411D08@sulimma.de> Date: Wed, 27 Jun 2001 23:40:34 +0200 From: Kolja Sulimma Reply-To: kolja@sulimma.de X-Mailer: Mozilla 4.7 [en] (Win98; I) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: Stupid Xilinx Patent References: <3B38DAC3.C02FC7F3@prowokulta.org> <3B38CAF5.10720B2D@xilinx.com> <9hak45$cuo$1@slb3.atl.mindspring.net> <3B38E25F.CB0BC221@xilinx.com> <9hasrj$1rl@gap.cco.caltech.edu> <3B38FDC8.7D15928@cyberspook.freeserve.co.uk> <3B399C0B.2A2CAA4@sulimma.de> <308fd995.0106270932.6eb8b987@posting.google.com> <3B3A1E29.A61A7BF9@xilinx.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit NNTP-Posting-Host: 213.23.52.59 X-Trace: 27 Jun 2001 23:40:36 +0200, 213.23.52.59 Lines: 35 X-Complaints-To: abuse@arcor-ip.de Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!fr.clara.net!heighliner.fr.clara.net!newsfeed01.sul.t-online.de!t-online.de!newsfeed.arcor-ip.de!news.arcor-ip.de!213.23.52.59 Xref: chonsp.franklin.ch comp.arch.fpga:7438 Austin Lesea wrote: > Tom, > > The Golgafrinchian Ark "B" had no lawyers on it. Perhaps this is the reason why. > > If you search for patents in my name, (or Peter's) you may be amused at what is > "patentable." I hope no one gets "insensed." Hihi! Yes, you patented to use a Virtex-E IOB comparator instead of the external comparator in XAPP155. Can you please license this to me? I am afraid that a student of mine is using this to read out a joystick port in my lab course. [...] > The laws in different countries are also different. > > Tom Seim: > > It might help to look at the big picture: America's economy is largely > > based on a technology lead over the rest of the world (we certainly > > are not going to compete with China on wage rates). Patents are a key > > part of protecting our technology edge. BUT: A lot of stuff that is patentable in the U.S is not patentable in other countries. So you can only protect the U.S. market. Kolja Sulimma ###### Message-ID: <3B3A5DCA.E261DA22@sulimma.de> Date: Thu, 28 Jun 2001 00:27:22 +0200 From: Kolja Sulimma Reply-To: kolja@sulimma.de X-Mailer: Mozilla 4.7 [en] (Win98; I) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: Stupid Xilinx Patent References: <3B38DAC3.C02FC7F3@prowokulta.org> <3B38CAF5.10720B2D@xilinx.com> <9hak45$cuo$1@slb3.atl.mindspring.net> <3B38E25F.CB0BC221@xilinx.com> <9hasrj$1rl@gap.cco.caltech.edu> <3B38FDC8.7D15928@cyberspook.freeserve.co.uk> <3B3994F1.687778FD@yahoo.com> <3B3A07DB.2CE164A@ieee.org> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit NNTP-Posting-Host: 213.23.52.59 X-Trace: 28 Jun 2001 00:27:23 +0200, 213.23.52.59 Lines: 49 X-Complaints-To: abuse@arcor-ip.de Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!uni-erlangen.de!news-nue1.dfn.de!news-lei1.dfn.de!news-fra1.dfn.de!newsfeed.arcor-ip.de!news.arcor-ip.de!213.23.52.59 Xref: chonsp.franklin.ch comp.arch.fpga:7469 > I'm sure Xilinx would not claim to own the rights to a wide input OR > function, but they might be able to claim that their *FPGA* was the first of > its > kind to contain such a circuit. No. If I understand correctly, they claim, that: 1. They where the first to publish that you can use an FPGA CLB with 2 4-LUTs and a Mux to build an 8 input AND gate. 2. They did not publish this before 8/99 3. It was not abvious that can do this (albeit they wrote in their own databook years before that you can implement "some 8 input functions" this way. If you read a sentence like this, of what type of function do you think first? ------------------- As a bottom line, I am not opposing the idea of patents. But I believe in the information age the system just does not work anymore. It is not possible for the patent office to check what has been published in newgroups, e-zines and so on. Think of the many good ideas discussed in this group. Just consider the following patent from 2000: http://www.delphion.com/details?pn=US06150839__ This is identical to one of the main features of a publication by Andre Dehon et. al. at FPGA '99 Publications about FPGA architecture are rare. They occur mainly at the FPGA symposium, at FCCM and some other workshops and make only a small parts of the proceedings. The patent office had a FPGA architecture patent filed and did not even check against the two most important conference proceedings of the previous year! Also, it is impossible to successfully check whether there is a patent on an idea I am using. I am willing to pay license fees, but when someone can come and block the import of my product it's not funny anymore. If this is an old patent, the language used will be completely different from modern terms and I have no chance of finding this with a search engine beforehand. Shortening the time a patent protects the holder would help a lot! 20 years is essentially forever when it comes to EE. Kolja Sulimma ###### Message-ID: <3B3A69C1.ADDF2C11@algor.co.uk> From: Rick Filipkiewicz X-Mailer: Mozilla 4.75 [en] (WinNT; U) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: Stupid Xilinx Patent References: <3B38DAC3.C02FC7F3@prowokulta.org> <3B38CAF5.10720B2D@xilinx.com> <9hak45$cuo$1@slb3.atl.mindspring.net> <3B38E25F.CB0BC221@xilinx.com> <9hasrj$1rl@gap.cco.caltech.edu> <3B38FDC8.7D15928@cyberspook.freeserve.co.uk> <3B399C0B.2A2CAA4@sulimma.de> <308fd995.0106270932.6eb8b987@posting.google.com> <3B3A1E29.A61A7BF9@xilinx.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Organization: Algorithmics Ltd. Cache-Post-Path: mudchute.algor.co.uk!root@oval.algor.co.uk X-Cache: nntpcache 2.4.0b2 (see http://www.nntpcache.org/) Lines: 17 Date: Thu, 28 Jun 2001 00:18:25 +0100 NNTP-Posting-Host: 62.254.210.251 X-Complaints-To: abuse@ntlworld.com X-Trace: news6-win.server.ntlworld.com 993683906 62.254.210.251 (Thu, 28 Jun 2001 00:18:26 BST) NNTP-Posting-Date: Thu, 28 Jun 2001 00:18:26 BST Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!fr.clara.net!heighliner.fr.clara.net!skynet.be!newspeer.clara.net!news.clara.net!news5-gui.server.ntli.net!ntli.net!news6-win.server.ntlworld.com.POSTED!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:7516 Austin Lesea wrote: > Tom, > > I suggest that anyone really hot about this issue go work as an expert witness for awhile: > excellent pay (even while traveling!), good food, short hours. Email us with the number of > months you could stomach it, before you give up the fat living, and go back to a real job > in total disgust and disillusionment....... > > Austin > This has the true sound of personal experience about it.