From: George P. Burdell Newsgroups: comp.arch.fpga Subject: Virtex USB solution Message-ID: X-Newsreader: Forte Agent 1.6/32.525 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 6 Date: Thu, 22 Feb 2001 04:35:32 GMT NNTP-Posting-Host: 66.56.8.82 X-Complaints-To: abuse@mediaone.net X-Trace: typhoon.southeast.rr.com 982816532 66.56.8.82 (Wed, 21 Feb 2001 23:35:32 EST) NNTP-Posting-Date: Wed, 21 Feb 2001 23:35:32 EST Organization: MediaOne - Atlanta Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!fr.clara.net!heighliner.fr.clara.net!grolier!news.stealth.net!24.30.200.2.MISMATCH!news-east.rr.com!news.rr.com!cyclone.southeast.rr.com!typhoon.southeast.rr.com.POSTED!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:4809 Has anyone had success implementing a USB interace with the Xilinx Virtex series chips? I imagine you would need a transceiver chip, but which one is best to use? And has anyone gotten it working? And more specifically, does anyone have design docs or schematic files for it? Otherwise it looks like I'm going to have to start from scratch using the PDIUSBP11A. ###### From: Muzaffer Kal Newsgroups: comp.arch.fpga Subject: Re: Virtex USB solution Organization: dspia inc. http://www.dspia.com Message-ID: <91e99t8e9ohc5a0hrj9q1t1lh9h723kqu7@4ax.com> References: X-Newsreader: Forte Agent 1.8/32.548 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 26 Date: Thu, 22 Feb 2001 07:01:45 GMT NNTP-Posting-Host: 24.16.43.54 X-Complaints-To: abuse@home.net X-Trace: news1.frmt1.sfba.home.com 982825305 24.16.43.54 (Wed, 21 Feb 2001 23:01:45 PST) NNTP-Posting-Date: Wed, 21 Feb 2001 23:01:45 PST Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newshub2.home.com!news.home.com!news1.frmt1.sfba.home.com.POSTED!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:4811 On Thu, 22 Feb 2001 04:35:32 GMT, George P. Burdell wrote: >Has anyone had success implementing a USB interace with the Xilinx >Virtex series chips? I imagine you would need a transceiver chip, but >which one is best to use? And has anyone gotten it working? And more >specifically, does anyone have design docs or schematic files for it? >Otherwise it looks like I'm going to have to start from scratch using >the PDIUSBP11A. I have been involved in design of this chip http://www.controlchips.com/UsbRam.htm and verification of this chip http://www.ubicom.com/hardware/IP2022.html. The first one got prototyped with a Phillips transceiver and an Altera 10K. The second one with the same transceiver and Virtex 300K. I should say that going from a transceiver to a functioning USB 1.1 device is not a trivial undertaking. You should at least review these documents http://www.usb.org/developers/data/crcdes.pdf, http://www.usb.org/developers/data/siewp.pdf. hope this is some help, Muzaffer FPGA DSP Consulting http://www.dspia.com ###### From: Andy Peters <"apeters <"@> noao [.] edu> Newsgroups: comp.arch.fpga Subject: Re: Virtex USB solution Date: Thu, 22 Feb 2001 10:29:47 -0700 Organization: National Optical Astronomy Observatory Lines: 24 Message-ID: <973ib2$fdq$1@noao.edu> References: NNTP-Posting-Host: theremin.tuc.noao.edu Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: noao.edu 982863010 15802 140.252.18.68 (22 Feb 2001 17:30:10 GMT) X-Complaints-To: abuse@noao.edu NNTP-Posting-Date: Thu, 22 Feb 2001 17:30:10 +0000 (UTC) X-Mailer: Mozilla 4.76 [en] (X11; U; Linux 2.2.16-22 i686) X-Accept-Language: en Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!canoe.uoregon.edu!arclight.uoregon.edu!news.asu.edu!ennfs.eas.asu.edu!noao.edu!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:4814 "George P. Burdell" wrote: > > Has anyone had success implementing a USB interace with the Xilinx > Virtex series chips? I imagine you would need a transceiver chip, but > which one is best to use? And has anyone gotten it working? And more > specifically, does anyone have design docs or schematic files for it? > Otherwise it looks like I'm going to have to start from scratch using > the PDIUSBP11A. You're probably better off putting the USB functions into one of the dozen or so USB microcontrollers you can buy. Most of them are based on an 8051 core. For instance, I'm doing a USB audio project and I'm using the TI TUSB3200 part. It literally does everything I need it to do, with very little programming (mostly setting up endpoints). And it's like $5.50 in 1K quantities. Cypress has their EZ-USB-FX parts which cost more (maybe $15 each) but they're also easy to program. I think doing USB in a big Virtex part is exactly the wrong thing to do. just my opinion, of course. -a ###### From: "Simon Bacon" Newsgroups: comp.arch.fpga Subject: Re: Virtex USB solution Date: Fri, 23 Feb 2001 00:15:26 -0000 Message-ID: <982926548.19511.0.nnrp-08.9e9832fa@news.demon.co.uk> References: <973ib2$fdq$1@noao.edu> NNTP-Posting-Host: tile.demon.co.uk X-NNTP-Posting-Host: tile.demon.co.uk:158.152.50.250 X-Trace: news.demon.co.uk 982926548 nnrp-08:19511 NO-IDENT tile.demon.co.uk:158.152.50.250 X-Complaints-To: abuse@demon.net X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 5.00.2919.6600 X-MimeOLE: Produced By Microsoft MimeOLE V5.00.2919.6600 Lines: 12 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!newsfeed.icl.net!dispose.news.demon.net!news.demon.co.uk!demon!tile.demon.co.uk!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:4811 "Andy Peters noao [.] edu>" <"apeters <"@> wrote in message news:973ib2$fdq$1@noao.edu... > I think doing USB in a big Virtex part is exactly the wrong thing to do. And the Virtex start-up current could be a problem is you plan on being bus-powered. ###### From: Austin Lesea Newsgroups: comp.arch.fpga Subject: Re: Virtex USB solution Date: Mon, 26 Feb 2001 20:41:50 -0800 Organization: Xilinx Lines: 48 Message-ID: <3A9B300E.9B477967@xilinx.com> References: <973ib2$fdq$1@noao.edu> NNTP-Posting-Host: 149.199.249.5 Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Mailer: Mozilla 4.7 [en]C-CCK-MCD (WinNT; U) X-Accept-Language: en Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!fu-berlin.de!newsfeed.mathworks.com!cyclone.swbell.net!bos-service1.ext.raytheon.com!attla1!ip.att.net!newsgate.xilinx.com!cliff.xsj.xilinx.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:4852 Andy, I will probably shock someone somewhere, but I agree with you. There are some things that are so well entrenched, so ubiquitous, and/or so screwey to implement (perhaps intentionally), that FPGA's are not even a realistic consideration. The ASIC is just too cheap and easy not to use. Sometimes people paint themselves into a corner, and have to provide a solution without adding anything, or without increasing the cost, but it can be very painful, and all of the cost savings often disappear. If it is popular enough (like PCI), we will do a core as IP from the IP center. If it requires a special hardware interface, then it might end up as a built in hardware design (like LVDS, or LDT/ULVDS in Virtex II). By the way, they are promoting USB II now, so we are not highly motivated to implement an older interface. More exciting are the newer Infiniband 2.4 Gb/s interfaces! Austin Andy Peters wrote: > "George P. Burdell" wrote: > > > > Has anyone had success implementing a USB interace with the Xilinx > > Virtex series chips? I imagine you would need a transceiver chip, but > > which one is best to use? And has anyone gotten it working? And more > > specifically, does anyone have design docs or schematic files for it? > > Otherwise it looks like I'm going to have to start from scratch using > > the PDIUSBP11A. > > You're probably better off putting the USB functions into one of the > dozen or so USB microcontrollers you can buy. Most of them are based on > an 8051 core. For instance, I'm doing a USB audio project and I'm using > the TI TUSB3200 part. It literally does everything I need it to do, > with very little programming (mostly setting up endpoints). And it's > like $5.50 in 1K quantities. > > Cypress has their EZ-USB-FX parts which cost more (maybe $15 each) but > they're also easy to program. > > I think doing USB in a big Virtex part is exactly the wrong thing to do. > > just my opinion, of course. > > -a ###### Message-ID: <3A9BA93C.50CC491@andraka.com> From: Ray Andraka Organization: Andraka Consulting Group, Inc X-Mailer: Mozilla 4.73 [en] (WinNT; I) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: Virtex USB solution References: <973ib2$fdq$1@noao.edu> <3A9B300E.9B477967@xilinx.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 75 Date: Tue, 27 Feb 2001 13:14:02 GMT NNTP-Posting-Host: 24.13.238.93 X-Complaints-To: abuse@home.net X-Trace: news1.wwck1.ri.home.com 983279642 24.13.238.93 (Tue, 27 Feb 2001 05:14:02 PST) NNTP-Posting-Date: Tue, 27 Feb 2001 05:14:02 PST Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newshub2.home.com!news.home.com!news1.wwck1.ri.home.com.POSTED!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:4856 USB is a bit awkward for a strictly hardware implementation because of the rather complex protocol layer. If you are doing it in an FPGA, it would probably make sense to use a microcontroller core for the protocol layer such as the risc processor published by Jan Gray, or if you are using the Altera parts, perhaps the NIOS processor (someone recently told me NIOS was an acronym for "not in our system" :-) ). As long as the microcontroller is one that is designed to the FPGA fabric, you can get pretty good performance in a fairly small footprint. The short answer then is, yes you can do the USB in an FPGA, and if you have enough spare CLBs in a design that already uses an FPGA, this could make lots of sense provided the extra engineering effort is balanced by sufficient production volume to make the amortized effort less than the cost of the extra board area and component costs of a less integrated design. Another consideration is that the USB bus powered specification has a fairly low power requirement. For many FPGA designs, you'll be forced to use a dedicated power supply for your USB appliance. Austin Lesea wrote: > > Andy, > > I will probably shock someone somewhere, but I agree with you. There are > some things that are so well entrenched, so ubiquitous, and/or so screwey to > implement (perhaps intentionally), that FPGA's are not even a realistic > consideration. The ASIC is just too cheap and easy not to use. > > Sometimes people paint themselves into a corner, and have to provide a > solution without adding anything, or without increasing the cost, but it can > be very painful, and all of the cost savings often disappear. > > If it is popular enough (like PCI), we will do a core as IP from the IP > center. If it requires a special hardware interface, then it might end up > as a built in hardware design (like LVDS, or LDT/ULVDS in Virtex II). > > By the way, they are promoting USB II now, so we are not highly motivated to > implement an older interface. More exciting are the newer Infiniband 2.4 > Gb/s interfaces! > > Austin > > Andy Peters wrote: > > > "George P. Burdell" wrote: > > > > > > Has anyone had success implementing a USB interace with the Xilinx > > > Virtex series chips? I imagine you would need a transceiver chip, but > > > which one is best to use? And has anyone gotten it working? And more > > > specifically, does anyone have design docs or schematic files for it? > > > Otherwise it looks like I'm going to have to start from scratch using > > > the PDIUSBP11A. > > > > You're probably better off putting the USB functions into one of the > > dozen or so USB microcontrollers you can buy. Most of them are based on > > an 8051 core. For instance, I'm doing a USB audio project and I'm using > > the TI TUSB3200 part. It literally does everything I need it to do, > > with very little programming (mostly setting up endpoints). And it's > > like $5.50 in 1K quantities. > > > > Cypress has their EZ-USB-FX parts which cost more (maybe $15 each) but > > they're also easy to program. > > > > I think doing USB in a big Virtex part is exactly the wrong thing to do. > > > > just my opinion, of course. > > > > -a -- -Ray Andraka, P.E. President, the Andraka Consulting Group, Inc. 401/884-7930 Fax 401/884-7950 email ray@andraka.com http://www.andraka.com or http://www.fpga-guru.com ###### From: Andy Peters <"apeters <"@> noao [.] edu> Newsgroups: comp.arch.fpga Subject: Re: Virtex USB solution Date: Wed, 28 Feb 2001 11:42:35 -0700 Organization: National Optical Astronomy Observatory Lines: 13 Message-ID: <97jgsh$1j3p$4@noao.edu> References: <973ib2$fdq$1@noao.edu> <3A9B300E.9B477967@xilinx.com> NNTP-Posting-Host: theremin.tuc.noao.edu Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: noao.edu 983385809 52345 140.252.18.68 (28 Feb 2001 18:43:29 GMT) X-Complaints-To: abuse@noao.edu NNTP-Posting-Date: Wed, 28 Feb 2001 18:43:29 +0000 (UTC) X-Mailer: Mozilla 4.76 [en] (X11; U; Linux 2.2.16-22 i686) X-Accept-Language: en Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!arclight.uoregon.edu!news.asu.edu!ennfs.eas.asu.edu!noao.edu!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:4919 Austin Lesea wrote: > > Andy, > > I will probably shock someone somewhere, but I agree with you. There are > some things that are so well entrenched, so ubiquitous, and/or so screwey to > implement (perhaps intentionally), that FPGA's are not even a realistic > consideration. The ASIC is just too cheap and easy not to use. Methinks it's a case of "if the only tool available is a hammer, everything starts to look like a nail." -andy ###### From: Andy Peters <"apeters <"@> noao [.] edu> Newsgroups: comp.arch.fpga Subject: Re: Virtex USB solution Date: Tue, 06 Mar 2001 17:51:57 -0700 Organization: National Optical Astronomy Observatory Lines: 68 Message-ID: <9840p3$lnl$1@noao.edu> References: <973ib2$fdq$1@noao.edu> <3A9B300E.9B477967@xilinx.com> <97jgsh$1j3p$4@noao.edu> <9834og$3kul$1@ID-31589.news.dfncis.de> NNTP-Posting-Host: theremin.tuc.noao.edu Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: noao.edu 983926371 22261 140.252.18.68 (7 Mar 2001 00:52:51 GMT) X-Complaints-To: abuse@noao.edu NNTP-Posting-Date: Wed, 7 Mar 2001 00:52:51 +0000 (UTC) X-Mailer: Mozilla 4.76 [en] (X11; U; Linux 2.2.16-22 i686) X-Accept-Language: en Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!fu-berlin.de!arclight.uoregon.edu!news.asu.edu!ennfs.eas.asu.edu!noao.edu!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:5053 Felix Bertram wrote: > > Andy, > > ----- Original Message ----- > > > I will probably shock someone somewhere, but I agree with you. There > > > are some things that are so well entrenched, so ubiquitous, and/or so > > > screwey to implement (perhaps intentionally), that FPGA's are not > > > even a realistic consideration. The ASIC is just too cheap and easy > > > not to use. > > this is true for most cases (so does not shock me). But the moment you > cannot find a chip that is dedicated to your specific application things may > look different, audio could be an example here. > > Assume the TUSB3200 did not exist (or is buggy). You would switch to > something different, e.g. an AN2131 (which is truly more expensive). You > would add your audio functionality to it, basically shift registers and > FIFOs. This is the moment you begin thinking about adding an FPGA to your > design. Next you would start to move all your surrounding logic into the > FPGA, as this makes better usage of a component that is already on your > board. The IEC958 output gives you your first $4, which is already about a > third of your Spartan-II. As an 8051 is not too good in moving data around > you wish you could interface your audio FIFO directly to the endpoint. So > one could imagine using a PDIUSBD12, a little bit more FPGA and a standard > 8051- if it only had more endpoints... which brings you to your own USB > implementation (as 200/768 slices are only $3.20). And at the same time your > product management approaches you to add some fancy level meters. And > finally you have a pricing that is very competitive to a solution based on > the TUSB3200 again. But you are right- it is not the same lean and mean > very low-cost design it was in the beginning. > > Products are distinguished either by features or by pricing. Sometimes you > want a product, that adds a little bit to "what everybody is doing". And > here your off-the-shelf ASIC may create a lot of headaches. > > > Methinks it's a case of "if the only tool available is a hammer, > > everything starts to look like a nail." > > I think there are two different situations here: > a) Do I use an FPGA or not? > b) Do I add another chip or upgrade to a larger FPGA? > > And the latter scenario boils down to the following questions: > i) Do I have the time to invent Intellectual Property? > ii) Can I effort buying Intellectual Property? Felix, I see your points. In this case, since the TI part *does* exist (I'm still waiting for my eval board, so "bugginess" is TBD), it makes a lot more sense to go with that rather than roll my own into an FPGA. Why? Because it does all of the hard stuff. You mention the audio stuff -- that's what this part does. It has digital audio CODEC ports (and the clock generation!) on board, the audio ports are on endpoints. The only programming required is to set up source and destination for the endpoints. As data comes in from the PC, it's DMAed right out to the audio interface -- no programming or overhead required. If this part didn't exist, I'd use the Philips part, with built-in ADC and DAC. Believe me, I prefer to do FPGA designs. But using this type of part makes a whole lot more sense than trying to implement USB in an FPGA. I have the product concept nailed down, and I think the TUSB3200 is the way to go. -a ###### Message-ID: <3AB61E4F.5361D750@bnl.gov> Date: Mon, 19 Mar 2001 15:57:19 +0100 From: Kolja Sulimma Reply-To: kolja@bnl.gov X-Mailer: Mozilla 4.7 [en] (Win98; I) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: Virtex USB solution References: <973ib2$fdq$1@noao.edu> <3A9B300E.9B477967@xilinx.com> <97jgsh$1j3p$4@noao.edu> <9834og$3kul$1@ID-31589.news.dfncis.de> <9840p3$lnl$1@noao.edu> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit NNTP-Posting-Host: 213.23.52.180 X-Trace: 19 Mar 2001 15:57:18 +0100, 213.23.52.180 Lines: 16 X-Complaints-To: abuse@arcor-ip.de Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!uni-erlangen.de!news-nue1.dfn.de!news-lei1.dfn.de!news-fra1.dfn.de!newsfeed.arcor-ip.de!news.arcor-ip.de!213.23.52.180 Xref: chonsp.franklin.ch comp.arch.fpga:5233 Also, there are USB parts around that are not much more expensive than a configuration PROM. I think there are a lot of USB applications where an FPGA that receives its bitstream from the USB driver is a good way to go. Kolja > Believe me, I prefer to do FPGA designs. But using this type of part > makes a whole lot more sense than trying to implement USB in an FPGA. I > have the product concept nailed down, and I think the TUSB3200 is the > way to go. > > -a