From: erika_uk@my-deja.com
Newsgroups: comp.arch.fpga
Subject: can -(A+B) computed in one level of logic ?
Date: Tue, 06 Feb 2001 15:30:29 GMT
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Xref: chonsp.franklin.ch comp.arch.fpga:4413

hello,

Say a parrallel arithmetic.
Is it possible to compute -A-B in one bank of slice.
yes, i know, i can compute A+B, the transmit the sign (-) later for the
subsequent operator. As i can compute A+B (one bank of Slice), and feed
the result to 2's Complement Negator ( another bank of Slice).

but i want to know, is it possible that the operation -(A+B) consumes
the same number of slices as A+B ...

any input for serial arithmetic will more than appreciated

Regards

--Erika


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######

From: kolja@prowokulta.org
Newsgroups: comp.arch.fpga
Subject: Re: can -(A+B) computed in one level of logic ?
Date: Tue, 06 Feb 2001 16:52:56 GMT
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Xref: chonsp.franklin.ch comp.arch.fpga:4411

Yes. You need just one extra LUT.

-A = (not A)+1
therefore

-A-B = (-A) + (-B) = (not A) + (not B) + 2;

So, you need to handle the first two bits seperately. With three luts
you can determine sum(0), sum(1) and carry(1). Carry(1) is then fed
into a (n-2)-bit adder with inverted inputs.

CU,
    Kolja

In article <95p5al$74q$1@nnrp1.deja.com>,
  erika_uk@my-deja.com wrote:
> hello,
>
> Say a parrallel arithmetic.
> Is it possible to compute -A-B in one bank of slice.
> yes, i know, i can compute A+B, the transmit the sign (-) later for
the
> subsequent operator. As i can compute A+B (one bank of Slice), and
feed
> the result to 2's Complement Negator ( another bank of Slice).
>
> but i want to know, is it possible that the operation -(A+B) consumes
> the same number of slices as A+B ...
>
> any input for serial arithmetic will more than appreciated
>
> Regards
>
> --Erika
>
> Sent via Deja.com
> http://www.deja.com/
>


Sent via Deja.com
http://www.deja.com/

######

From: "Daniel Lang" <dblx@xtyrvos.caltech.edu>
Newsgroups: comp.arch.fpga
Subject: Re: can -(A+B) computed in one level of logic ?
Date: Thu, 8 Feb 2001 17:07:41 -0800
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Xref: chonsp.franklin.ch comp.arch.fpga:4520

<kolja@prowokulta.org> wrote in message news:95pa52$bv1$1@nnrp1.deja.com...
> Yes. You need just one extra LUT.
>
> -A = (not A)+1
> therefore
>
> -A-B = (-A) + (-B) = (not A) + (not B) + 2;
>
> So, you need to handle the first two bits seperately. With three luts
> you can determine sum(0), sum(1) and carry(1). Carry(1) is then fed
> into a (n-2)-bit adder with inverted inputs.

Let's consider the case A=B=0.  If n=8, this give us (in binary)
11111111 + 11111111 + 10.  The desired answer is 00000000 after
dropping the msb carry bit.

Processing the first two bits gives:
  Sum(0) = 0, Carry(0) = 1.
  Sum(1) = 0, Carry(1) = 2.  You need two carry bits.
Even if you process additional bits, you still need two carries.

Daniel Lang