Message-ID: <3A2360E0.B62C21B7@earthlink.net> From: Bill Lenihan Reply-To: lenihan3weNOSPAM@earthlink.net X-Mailer: Mozilla 4.7 [en] (Win98; I) X-Accept-Language: en,pdf MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Virtex ROM ques. Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 35 Date: Tue, 28 Nov 2000 07:36:40 GMT NNTP-Posting-Host: 209.178.176.248 X-Complaints-To: abuse@earthlink.net X-Trace: newsread1.prod.itd.earthlink.net 975397000 209.178.176.248 (Mon, 27 Nov 2000 23:36:40 PST) NNTP-Posting-Date: Mon, 27 Nov 2000 23:36:40 PST Organization: EarthLink Inc. -- http://www.EarthLink.net Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!howland.erols.net!cyclone2.usenetserver.com!news-out.usenetserver.com!newsfeed2.earthlink.net!newsfeed.earthlink.net!newsmaster1.prod.itd.earthlink.net!newsread1.prod.itd.earthlink.net.POSTED!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:2942 Question 1: How can I take a Xilinx Virtex FPGA design that contains instance-unique ROM (ROM values unique to each module/unit manufactured) and keep my core logic the same, but update the ROM for each SPROM/board manufactured, preferably without having to re-synthesize, re-place & route, re-verify, etc.,? Ideally, the designer would have a generic logic bitstream (with anything in the ROM) and be able to merge/append/over-write the ROM with the desired-ROM-contents file that is unique to each board. Note: whether the ROM is truly ROM or really RAM that can be further written over by the mission logic is irrelevent, the key is that at power-on the memory is ROM and has the desired unique values. I'm thinking specifically about building the ROM with BlockRAM, but the problem may be equally relevent to ROM built with the distributed, LUT-based RAM, too. Question 2: Suppose I want to build a 4kx8 ROM from instantiated BlockRAM (8 instances of 4kx1 aspect ratio RAMs), as opposed to inferred ROM via a big case statement. The required INIT statements (in the HDL code) to provide the right values for simulation & synthesis require a non-trivial bit-slicing & parsing operation to assemble the INIT statements from the ideal representation of values (i.e., one text file of 4k lines, where each line is a 8-bit binary or hex value). Are there any programs (shareware or $$) to do this bit-slicing & parsing or does everyone have to write their own C programs to do it? ============================== William Lenihan lenihan3weNOSPAM@earthlink.net .... remove "NOSPAM" when replying ============================== ###### Message-ID: <3A23AC1C.90BFA157@algor.co.uk> From: Rick Filipkiewicz X-Mailer: Mozilla 4.5 [en] (WinNT; I) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: Virtex ROM ques. References: <3A2360E0.B62C21B7@earthlink.net> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Organization: Algorithmics Ltd. Cache-Post-Path: mudchute.algor.co.uk!unknown@borough.algor.co.uk X-Cache: nntpcache 2.4.0b2 (see http://www.nntpcache.org/) Lines: 47 Date: Tue, 28 Nov 2000 12:59:08 +0000 NNTP-Posting-Host: 62.254.210.251 X-Complaints-To: abuse@ntlworld.com X-Trace: news2-win.server.ntlworld.com 975416348 62.254.210.251 (Tue, 28 Nov 2000 12:59:08 GMT) NNTP-Posting-Date: Tue, 28 Nov 2000 12:59:08 GMT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!fr.clara.net!heighliner.fr.clara.net!grolier!btnet-peer0!btnet!news5-gui.server.ntli.net!ntli.net!news2-win.server.ntlworld.com.POSTED!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:2938 Bill Lenihan wrote: > Question 1: > > How can I take a Xilinx Virtex FPGA design that contains instance-unique > ROM (ROM values unique to each module/unit manufactured) and keep my > core logic the same, but update the ROM for each SPROM/board > manufactured, preferably without having to re-synthesize, re-place & > route, re-verify, etc.,? Ideally, the designer would have a generic > logic bitstream (with anything in the ROM) and be able to > merge/append/over-write the ROM with the desired-ROM-contents file that > is unique to each board. Note: whether the ROM is truly ROM or really > RAM that can be further written over by the mission logic is irrelevent, > the key is that at power-on the memory is ROM and has the desired unique > values. I'm thinking specifically about building the ROM with BlockRAM, > but the problem may be equally relevent to ROM built with the > distributed, LUT-based RAM, too. > The solutions are either J-bits or convert the routed database to text form via xdl, hack the init statements, then back to binary via xdl again. Beware with xdl though since including the ``pips'' routing info leads to huge text files. Run xdl -h to find out how to turn off the pips [I *think* its -nopips]. > > Question 2: > > Suppose I want to build a 4kx8 ROM from instantiated BlockRAM (8 > instances of 4kx1 aspect ratio RAMs), as opposed to inferred ROM via a > big case statement. The required INIT statements (in the HDL code) to > provide the right values for simulation & synthesis require a > non-trivial bit-slicing & parsing operation to assemble the INIT > statements from the ideal representation of values (i.e., one text file > of 4k lines, where each line is a 8-bit binary or hex value). Are there > any programs (shareware or $$) to do this bit-slicing & parsing or does > everyone have to write their own C programs to do it? > > I suspect you could probably do this in < 16 lines if you used Perl instead of `C'. Note that the xdl stuff above's also much easier to do in Perl - I've done a fair bit of Perl hacking on xdl data bases. ###### From: A person Newsgroups: comp.arch.fpga Subject: Re: Virtex ROM ques. Date: Wed, 29 Nov 2000 19:18:49 -0800 Organization: Univ of Calif San Diego Lines: 62 Message-ID: References: <3A2360E0.B62C21B7@earthlink.net> NNTP-Posting-Host: fechen.extern.ucsd.edu X-Trace: news1.ucsd.edu 975553968 21580 137.110.49.171 (30 Nov 2000 03:12:48 GMT) X-Complaints-To: usenet@news1.ucsd.edu NNTP-Posting-Date: Thu, 30 Nov 2000 03:12:48 +0000 (UTC) User-Agent: MT-NewsWatcher/3.0 (PPC) Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!logbridge.uoregon.edu!ihnp4.ucsd.edu!news.ucsd.edu!person Xref: chonsp.franklin.ch comp.arch.fpga:3028 Question 1a: I have not tried this entire flow yet, but this may work in theory (I also think there is a better way). I have used FPGA editor to change the initial value of RAMs (ROMs are just RAMs without write capabilities). If memory serves me right, fpga_editor makes a playback file (this is the part I have never tried). You can write a script to change the playback file to change the content of the RAM and rerun fpga_editor. Write ncd file and re-run bitgen. Question 1b: Another possible solution is the following, but I have had some problems with guide files in bigger designs (works awesome in smaller designs). The .edf file for the RAMs have the initial contents that are pretty human readable. Write a script to change these values. Rerun par with guide files. Since only the initial contents are changed, it should run quite fast. Question 2: If I understand correctly, you can write a .coe file and use coregen to make the ROM. Just some ideas, I hope they help. Remove capital letters for email eApBaCrDk@EtFi.GcHoIm. -Edwin Park In article <3A2360E0.B62C21B7@earthlink.net>, lenihan3weNOSPAM@earthlink.net wrote: >Question 1: > >How can I take a Xilinx Virtex FPGA design that contains instance-unique >ROM (ROM values unique to each module/unit manufactured) and keep my >core logic the same, but update the ROM for each SPROM/board >manufactured, preferably without having to re-synthesize, re-place & >route, re-verify, etc.,? Ideally, the designer would have a generic >logic bitstream (with anything in the ROM) and be able to >merge/append/over-write the ROM with the desired-ROM-contents file that >is unique to each board. Note: whether the ROM is truly ROM or really >RAM that can be further written over by the mission logic is irrelevent, >the key is that at power-on the memory is ROM and has the desired unique >values. I'm thinking specifically about building the ROM with BlockRAM, >but the problem may be equally relevent to ROM built with the >distributed, LUT-based RAM, too. > >Question 2: > >Suppose I want to build a 4kx8 ROM from instantiated BlockRAM (8 >instances of 4kx1 aspect ratio RAMs), as opposed to inferred ROM via a >big case statement. The required INIT statements (in the HDL code) to >provide the right values for simulation & synthesis require a >non-trivial bit-slicing & parsing operation to assemble the INIT >statements from the ideal representation of values (i.e., one text file >of 4k lines, where each line is a 8-bit binary or hex value). Are there >any programs (shareware or $$) to do this bit-slicing & parsing or does >everyone have to write their own C programs to do it? > >============================== >William Lenihan >lenihan3weNOSPAM@earthlink.net >.... remove "NOSPAM" when replying >============================== > > ###### From: Phil James-Roxby Newsgroups: comp.arch.fpga Subject: Re: Virtex ROM ques. Date: Fri, 01 Dec 2000 15:32:25 -0700 Organization: Xilinx, Inc. Lines: 36 Message-ID: <3A2826F9.CAC91BFF@xilinx.com> References: <3A2360E0.B62C21B7@earthlink.net> NNTP-Posting-Host: 149.199.185.56 Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Mailer: Mozilla 4.7 [en] (WinNT; I) X-Accept-Language: en Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!xfer13.netnews.com!netnews.com!news.voicenet.com!nntp2.aus1.giganews.com!NetNews1!attla1!ip.att.net!newsgate.xilinx.com!xbc-news.xilinx.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:3070 Bill Lenihan wrote: > > Question 1: > > How can I take a Xilinx Virtex FPGA design that contains instance-unique > ROM (ROM values unique to each module/unit manufactured) and keep my > core logic the same, but update the ROM for each SPROM/board > manufactured, preferably without having to re-synthesize, re-place & > route, re-verify, etc.,? Ideally, the designer would have a generic > logic bitstream (with anything in the ROM) and be able to > merge/append/over-write the ROM with the desired-ROM-contents file that > is unique to each board. Note: whether the ROM is truly ROM or really > RAM that can be further written over by the mission logic is irrelevent, > the key is that at power-on the memory is ROM and has the desired unique > values. I'm thinking specifically about building the ROM with BlockRAM, > but the problem may be equally relevent to ROM built with the > distributed, LUT-based RAM, too. You could use JBits to do this. On the main Xilinx web site, go to products -> System solutions -> Xilinx Online and there is a little description of JBits. Basically, JBits gives you read and write access to programmable resources at the bitstream level, so in your case, you would want write access to BlockRAM which is supported in the latest version. The basic operation is to read in a bitstream, do some modification (in Java) and write out a second bitstream, which is then used for download. Perhaps if you drop me a line, I can give you some more details. Phil -- --------------------------------------------------------------------- __ / /\/ Dr Phil James-Roxby Direct Dial: 303-544-5545 \ \ Staff Software Engineer Fax: Unreliable use email :-) / / Loki/DARPA Email: phil.james-roxby@xilinx.com \_\/\ Xilinx Boulder --------------------------------------------------------------------- ###### Sender: eric@ruckus.brouhaha.com From: Eric Smith Newsgroups: comp.arch.fpga Subject: Re: Virtex ROM ques. References: <3A2360E0.B62C21B7@earthlink.net> <3A2826F9.CAC91BFF@xilinx.com> X-Disclaimer: Everything I write is false. Organization: Eric Conspiracy Secret Labs X-Eric-Conspiracy: There is no conspiracy. Date: 01 Dec 2000 16:43:01 -0800 Message-ID: Lines: 7 X-Newsreader: Gnus v5.7/Emacs 20.7 NNTP-Posting-Host: ruckus.brouhaha.com X-Trace: 1 Dec 2000 16:44:53 -0800, ruckus.brouhaha.com Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!psinet-eu-nl!newsfeeds.belnet.be!news.belnet.be!news.tele.dk!144.212.100.101!newsfeed.mathworks.com!news.kjsl.com!news.spies.com!ruckus.brouhaha.com Xref: chonsp.franklin.ch comp.arch.fpga:3075 Phil James-Roxby writes: > You could use JBits to do this. On the main Xilinx web site, go to > products -> System solutions -> Xilinx Online and there is a little > description of JBits. Sounds nifty. It says "JBits will be available over the web in 1Q99." But I can't seem to actually find it. Any hints? ###### Path: chonsp.franklin.ch!not-for-mail From: Neil Franklin Newsgroups: comp.arch.fpga Subject: Re: Virtex ROM ques. Date: 02 Dec 2000 23:08:08 +0100 Organization: My own Private Self Lines: 33 Message-ID: <6uvgt2iiif.fsf@chonsp.franklin.ch> References: <3A2360E0.B62C21B7@earthlink.net> <3A2826F9.CAC91BFF@xilinx.com> NNTP-Posting-Host: chonsp.franklin.ch X-Trace: chonsp.franklin.ch 975794888 692 10.0.3.2 (2 Dec 2000 22:08:08 GMT) X-Complaints-To: news@chonsp.franklin.ch NNTP-Posting-Date: 2 Dec 2000 22:08:08 GMT X-Newsreader: Gnus v5.7/Emacs 20.4 Xref: chonsp.franklin.ch comp.arch.fpga:3079 Eric Smith writes: > Phil James-Roxby writes: > > You could use JBits to do this. On the main Xilinx web site, go to > > products -> System solutions -> Xilinx Online and there is a little > > description of JBits. The page I visited (did search for jbits from search page) was: http://www.xilinx.com/products/software/jbits/index.htm JBits SDK > Sounds nifty. Is nifty. As far as what I have read in its documentation, since installing it last wednesday. Now I just need time to use it ... >It says "JBits will be available over the web in 1Q99." > But I can't seem to actually find it. Any hints? Mail to the address given on the page (JBits@xilinx.com). They then send you an URL (actually 3 URLs, Windows NT, Solaris, Linux) plus password. Then download (9MByte), install and have fun. Greetings from another a.f.c-er. Looks like JBits and an XCV300 are going to be the base of some historic computer cloning... -- Neil Franklin, neil@franklin.ch.remove http://neil.franklin.ch/ Nerd, Geek, Hacker, Unix Guru, Sysadmin, Roleplayer, LARPer, Mystic ###### From: Phil James-Roxby Newsgroups: comp.arch.fpga Subject: Re: Virtex ROM ques. Date: Mon, 04 Dec 2000 08:53:31 -0700 Organization: Xilinx, Inc. Lines: 20 Message-ID: <3A2BBDFB.EE460E33@xilinx.com> References: <3A2360E0.B62C21B7@earthlink.net> <3A2826F9.CAC91BFF@xilinx.com> <6uvgt2iiif.fsf@chonsp.franklin.ch> NNTP-Posting-Host: 149.199.185.56 Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Mailer: Mozilla 4.7 [en] (WinNT; I) X-Accept-Language: en Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.nextra.ch!news1.sunrise.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newspeer.monmouth.com!nntp2.aus1.giganews.com!NetNews1!attla1!ip.att.net!newsgate.xilinx.com!xbc-news.xilinx.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:3093 Neil Franklin wrote: > Mail to the address given on the page (JBits@xilinx.com). They then > send you an URL (actually 3 URLs, Windows NT, Solaris, Linux) plus > password. Then download (9MByte), install and have fun. That address is also the one to use for general queries about JBits to see if its going to work for your particular app., and for support once you've installed it. And yes, you will have fun. I had so much I joined the company. Phil -- --------------------------------------------------------------------- __ / /\/ Dr Phil James-Roxby Direct Dial: 303-544-5545 \ \ Staff Software Engineer Fax: Unreliable use email :-) / / Loki/DARPA Email: phil.james-roxby@xilinx.com \_\/\ Xilinx Boulder ---------------------------------------------------------------------