From: Richard Chidester Newsgroups: comp.arch.fpga Subject: WebPACK ISE V3.2i is available for immediate download! Date: Mon, 30 Oct 2000 13:07:55 -0700 Organization: CPLD Software Division Lines: 36 Message-ID: <39FDD51B.15AA7B88@xilinx.com> NNTP-Posting-Host: 149.199.177.192 Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="------------78A790531B2653C89156DE2B" X-Mailer: Mozilla 4.7 [en] (Win98; U) X-Accept-Language: en Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!uni-erlangen.de!newsfeeds.belnet.be!news.belnet.be!feed2.onemain.com!feed1.onemain.com!cyclone-sf.pbi.net!207.207.0.26!nntp.giganews.com!nntp2.aus1.giganews.com!NetNews1!attla1!ip.att.net!newsgate.xilinx.com!xbc-news.xilinx.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:2253 This is a multi-part message in MIME format. --------------78A790531B2653C89156DE2B Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Just wanted to make everyone aware that the new WebPACK ISE which adds support for FPGAs (Spartan II and Virtex 300E) is now available. Go to http://www.xilinx.com/products/software/webpowered.htm --------------78A790531B2653C89156DE2B Content-Type: text/x-vcard; charset=us-ascii; name="richardc.vcf" Content-Transfer-Encoding: 7bit Content-Description: Card for Richard Chidester Content-Disposition: attachment; filename="richardc.vcf" begin:vcard n:Chidester;Richard tel;cell:303-882-9077 tel;fax:303-442-9124 tel;home:303-972-8649 tel;work:303-544-5558 x-mozilla-html:TRUE org:CPLD Software Group;Xilinx, Inc.
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fn:Richard Chidester end:vcard --------------78A790531B2653C89156DE2B-- ###### From: Santiago de Pablo Newsgroups: comp.arch.fpga Subject: Re: WebPACK ISE V3.2i is available for immediate download! Date: Tue, 31 Oct 2000 13:07:52 +0100 Organization: Universidad de Valladolid Lines: 18 Message-ID: <39FEB618.2B79C1DC@eis.uva.es> References: <39FDD51B.15AA7B88@xilinx.com> NNTP-Posting-Host: cdem26.dte.eis.uva.es Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: 8bit X-Trace: simancas.uva.es 972993884 21657 157.88.140.26 (31 Oct 2000 12:04:44 GMT) X-Complaints-To: usenet@news.uva.es NNTP-Posting-Date: 31 Oct 2000 12:04:44 GMT X-Mailer: Mozilla 4.5 [es] (Win98; I) X-Accept-Language: es Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.nextra.ch!news1.sunrise.ch!news.imp.ch!psinet-eu-nl!newsfeeds.belnet.be!naxos.belnet.be!news.belnet.be!news.rediris.es!news.uva.es!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:2251 Richard Chidester escribió: > > Just wanted to make everyone aware that the new WebPACK ISE which adds > support for FPGAs (Spartan II and Virtex 300E) is now available. > > Go to http://www.xilinx.com/products/software/webpowered.htm Hi folks, I've downloaded the WebPACK ISE for PLDs, trying to find a development environment using VHDL for my students. When I use it I've found a lot of limits: no more than 21 transitions on the bencher, ... I want to know which are the complete *list of limits* of these (free) products. Hey, Xilinx guys, give our students a really *free* set of software! (Currently we are using Max+Plus II 7.21 and 9.23). Cheers, Santiago. ###### From: Richard Chidester Newsgroups: comp.arch.fpga Subject: Re: WebPACK ISE V3.2i is available for immediate download! Date: Tue, 31 Oct 2000 14:09:10 -0700 Organization: CPLD Software Division Lines: 94 Message-ID: <39FF34F6.A3FEDCA8@xilinx.com> References: <39FDD51B.15AA7B88@xilinx.com> <39FEB618.2B79C1DC@eis.uva.es> NNTP-Posting-Host: 149.199.177.192 Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: 8bit X-Mailer: Mozilla 4.7 [en] (Win98; U) X-Accept-Language: en Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!nntp.primenet.com!nntp.gblx.net!nntp.giganews.com!nntp2.aus1.giganews.com!NetNews1!attla1!attla2!ip.att.net!newsgate.xilinx.com!xbc-news.xilinx.com!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:2280 Hello Santiago, Xilinx has a university program which can be found at the following URL: http://university.xilinx.com/ The limitations can be found under frequently asked questions at the following URL: http://www.xilinx.com/products/software/cpldswfaqs_new.htm I've cut and pasted the limitations below. Thanks for the feedback! There is always room for improvement! Q: Are there limitations on the third party tools included with WebPACK, and if so, what are they? A: These tools are starter versions offered by third party vendors such as Model Technology Inc. and Visual Software Solutions. The scaled down versions demonstrate the capabilities of their software and provide an indication of whether the full scale tool would be useful for the designer. The limits for ModelSim Xilinx Starter Edition are 500 lines of debuggable code. Beyond this limit, the processing begins to slow down, but does not stop. The usefulness of this software is going to depend on coding style and type of simulation (either functional or timing) that is desired. Visual Software Solutions tools comprised of StateCAD and HDL Bencher follow the limits below: Unregistered ------------------ StateCAD: 6 states, 16 transitions, 2 logic equations Bencher: 12 signal assignments, 6 ports, max bus width (port) 8 bits Registered ------------------ StateCAD: 10 states, 20 transitions, 8 logic equations Bencher limit is 21 assignments (other limits dropped) HDL Bencher and StateCAD may be used unregistered and without a license up to the limits given above. Once the limits are reached, the tools will automatically prompt you to register. Registration is as easy as providing a name and e-mail address. A password will be sent directly to the address given within minutes, and the limits are automatically relaxed. Both MTI and Visual Software Solutions offer registered users a discount on full software support purchases. Best regards, Richard Chidester Santiago de Pablo wrote: > Richard Chidester escribió: > > > > Just wanted to make everyone aware that the new WebPACK ISE which adds > > support for FPGAs (Spartan II and Virtex 300E) is now available. > > > > Go to http://www.xilinx.com/products/software/webpowered.htm > > Hi folks, > > I've downloaded the WebPACK ISE for PLDs, trying to find a development > environment using VHDL for my students. When I use it I've found a lot > of limits: no more than 21 transitions on the bencher, ... > > I want to know which are the complete *list of limits* of these (free) > products. Hey, Xilinx guys, give our students a really *free* set of > software! (Currently we are using Max+Plus II 7.21 and 9.23). > > Cheers, Santiago.