From: rickman Newsgroups: comp.arch.fpga Subject: Re: tbuf Date: Tue, 01 Aug 2000 01:35:15 -0400 Lines: 58 Message-ID: <39866193.C565C403@yahoo.com> References: <8m4a3r$3mm$1@nnrp1.deja.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: iWp5W2Li80owVSMUVckVFjKfYrxaKqwg7M8ROefHdkM= X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 1 Aug 2000 05:35:18 GMT X-Accept-Language: en X-Mailer: Mozilla 4.7 [en] (Win95; U) Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!feed1.news.rcn.net!rcn!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:1097 For low fan in multiplexors they are slow and consume a lot of long lines (one per bit). But for high fan in muxes, they are pretty good. You need to decode the select lines. But this can make it easier to utilize unique select setups such as a 1 of N select. I have used TBUF muxes when I needed to make an unusual mux which allowed me to pack a variable sized data word into 32 bit data words. The size was preselected, but ranged from 1 to 8 bits. I used a 5 bit counter and a decoder to give me the 1 of 8 select to enable the different tristate enables. This was pipelined to give speed so that the 8 enables changed on every clock edge. The slow path then was the enable register output through the tristate buffer onto the long line and to the data register D input. It ran at the needed 50 MHz in an XC4013XL. The real beauty is that it used *no* CLBs for the actual mux and only 4 CLBs for the decodes. Not bad for an 8 to 32 mux array. It worked so well that I used another, similar TBUF array for the inputs to the register which controlled the CE on the data register. This one was a little more complicated to figure out, but the decode was purely static. erika_uk@my-deja.com wrote: > > hey, > > what are the advantages and disadvantages from using TBUFs( e.g : for > multiplixer purpose ) > > anticipated thanks > > --Erika > > Sent via Deja.com http://www.deja.com/ > Before you buy. -- Rick Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design Arius 4 King Ave Frederick, MD 21701-3110 301-682-7772 Voice 301-682-7666 FAX Internet URL http://www.arius.com ###### Message-ID: <39879F2B.58A635D4@banet.net> Date: Wed, 02 Aug 2000 00:10:20 -0400 From: yuryws@banet.net Reply-To: yuryws@banet.net X-Mailer: Mozilla 4.7 [en] (WinNT; I) X-Accept-Language: uk,ru MIME-Version: 1.0 Newsgroups: comp.arch.fpga Subject: Re: tbuf References: <8m4a3r$3mm$1@nnrp1.deja.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit NNTP-Posting-Host: 32.100.112.239 X-Trace: 2 Aug 2000 04:04:06 GMT, 32.100.112.239 Organization: Global Network Services - Remote Access Mail & News Services Lines: 30 X-Complaints-To: abuse@prserv.net Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.nextra.ch!news1.sunrise.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!cpk-news-hub1.bbnplanet.com!news.gtei.net!newsfeed.us.ibm.net!ibm.net!news1.prserv.net!32.100.112.239 Xref: chonsp.franklin.ch comp.arch.fpga:1130 It all depends on the target architecture and device utilization (Xilinx I presume). Xilinx XC4000/Spartans use TBUFs for logic and for routing purposes. So when your device utilization is rather high using TBUFs for MUXes may diminish the routability of the device. On the other hand if LUTs are plentiful, then you can use them to implement MUXes. Again, it is a trade-off, if the MUX is large then, the combinatorial delays through the logic may be unacceptable, and therefore TBUFs could be used instead. Yury erika_uk@my-deja.com wrote: > hey, > > what are the advantages and disadvantages from using TBUFs( e.g : for > multiplixer purpose ) > > anticipated thanks > > --Erika > > Sent via Deja.com http://www.deja.com/ > Before you buy. ###### From: "Domagoj" Newsgroups: comp.arch.fpga Subject: Re: tbuf Date: Wed, 2 Aug 2000 13:54:49 +0200 Organization: CARNet, CROATIA Lines: 81 Message-ID: <8majcd$523$1@bagan.srce.hr> References: <8m4a3r$3mm$1@nnrp1.deja.com> <39866193.C565C403@yahoo.com> NNTP-Posting-Host: asy109.jmu.carnet.hr X-Trace: bagan.srce.hr 965267661 5187 193.198.128.109 (3 Aug 2000 01:54:21 GMT) X-Complaints-To: abuse@news.carnet.hr NNTP-Posting-Date: 3 Aug 2000 01:54:21 GMT X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 5.00.2314.1300 X-MimeOLE: Produced By Microsoft MimeOLE V5.00.2314.1300 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!isdnet!newsfeed.cwix.com!argos.tel.hr!carnet.feed!CARNet.hr!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:286 Hi, one of disadvantages : if you are planning to port your design to ASIC some day, or maybe to another FPGA family without tbufs, you'll probably need to rewrite your code again. so, using plain old muxes implemented in luts enhance portability. it's not impossible to implement three state in ASIC, but not easy. also it's easier to test your design without three state buffers. if you're sure your design will be used only in fpga, and if you need to squeeze it as much as possible, tbufs are marvelous. regards, -- ------------------------------------------- - Domagoj - - Domagoj@engineer.com - ------------------------------------------- rickman wrote in message news:39866193.C565C403@yahoo.com... > For low fan in multiplexors they are slow and consume a lot of long > lines (one per bit). But for high fan in muxes, they are pretty good. > You need to decode the select lines. But this can make it easier to > utilize unique select setups such as a 1 of N select. > > I have used TBUF muxes when I needed to make an unusual mux which > allowed me to pack a variable sized data word into 32 bit data words. > The size was preselected, but ranged from 1 to 8 bits. I used a 5 bit > counter and a decoder to give me the 1 of 8 select to enable the > different tristate enables. This was pipelined to give speed so that the > 8 enables changed on every clock edge. The slow path then was the enable > register output through the tristate buffer onto the long line and to > the data register D input. It ran at the needed 50 MHz in an XC4013XL. > > The real beauty is that it used *no* CLBs for the actual mux and only 4 > CLBs for the decodes. Not bad for an 8 to 32 mux array. > > It worked so well that I used another, similar TBUF array for the inputs > to the register which controlled the CE on the data register. This one > was a little more complicated to figure out, but the decode was purely > static. > > > erika_uk@my-deja.com wrote: > > > > hey, > > > > what are the advantages and disadvantages from using TBUFs( e.g : for > > multiplixer purpose ) > > > > anticipated thanks > > > > --Erika > > > > Sent via Deja.com http://www.deja.com/ > > Before you buy. > > -- > > Rick Collins > > rick.collins@XYarius.com > > Ignore the reply address. To email me use the above address with the XY > removed. > > > > Arius - A Signal Processing Solutions Company > Specializing in DSP and FPGA design > > Arius > 4 King Ave > Frederick, MD 21701-3110 > 301-682-7772 Voice > 301-682-7666 FAX > > Internet URL http://www.arius.com ###### From: eml@riverside-machines.com.NOSPAM Newsgroups: comp.arch.fpga Subject: Re: tbuf Date: Thu, 03 Aug 2000 09:59:44 GMT Organization: Riverside Machines Ltd. Lines: 39 Message-ID: <3989425e.9240556@news.dial.pipex.com> References: <8m4a3r$3mm$1@nnrp1.deja.com> NNTP-Posting-Host: userek80.uk.uudial.com X-Trace: lure.pipex.net 965296918 27162 62.188.13.190 (3 Aug 2000 10:01:58 GMT) X-Complaints-To: abuse@uk.uu.net NNTP-Posting-Date: 3 Aug 2000 10:01:58 GMT X-Newsreader: Forte Free Agent 1.11/32.235 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!tank.news.pipex.net!pipex!tube.news.pipex.net!pipex!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:698 On Mon, 31 Jul 2000 16:39:23 GMT, erika_uk@my-deja.com wrote: >hey, > >what are the advantages and disadvantages from using TBUFs( e.g : for >multiplixer purpose ) > >anticipated thanks > >--Erika + potentially better for large muxes, in some cases + synth tools can generally recode combinatorially if there's a problem - potentially difficult to move to an ASIC process - may force use of an asynchronous reset - potentially very slow - can cause placement problems: as a (xilinx) rule, you will probably want your logic blocks arranged vertically, but a bus line implemented with tristates will run horizontally. The speed issue now seems to be historical. 4K TBUFs got *very* slow with larger devices, but Virtex TBUFs are relatively fast and the speed appears to be independent of device size. This is apparently because there aren't actually any tristate buffers on Virtex; they're actually implemented as combinatorial muxes and just pretend to be tristates. As a rule, I'd say forget it. TBUFs are fine for small FPGAs, where you have to use every trick you can to squeeze performance out of them. For 'big' devices, the issues are completely different - design management, timing closure, getting a design done in a reasonable timescale. I'd say the days of the TBUF are numbered (at least until someone gives us the 10GHz 100-CLB FPGA, then we can start all over again...) Evan ###### From: rickman Newsgroups: comp.arch.fpga Subject: Re: tbuf Date: Thu, 03 Aug 2000 10:11:37 -0400 Lines: 77 Message-ID: <39897D99.B93ED30@yahoo.com> References: <8m4a3r$3mm$1@nnrp1.deja.com> <3989425e.9240556@news.dial.pipex.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: 0ul8kOMibGz3kQUanKDCtXSb1vYceKCrTIEBmthJrwo= X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 3 Aug 2000 14:11:27 GMT X-Accept-Language: en X-Mailer: Mozilla 4.7 [en] (Win95; U) Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!join.news.pipex.net!pipex!tank.news.pipex.net!pipex!cpk-news-hub1.bbnplanet.com!news.gtei.net!feed1.news.rcn.net!rcn!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:1090 eml@riverside-machines.com.NOSPAM wrote: > > On Mon, 31 Jul 2000 16:39:23 GMT, erika_uk@my-deja.com wrote: > > >hey, > > > >what are the advantages and disadvantages from using TBUFs( e.g : for > >multiplixer purpose ) > > > >anticipated thanks > > > >--Erika > > + potentially better for large muxes, in some cases > + synth tools can generally recode combinatorially if there's a > problem > > - potentially difficult to move to an ASIC process > - may force use of an asynchronous reset > - potentially very slow > - can cause placement problems: as a (xilinx) rule, you will probably > want your logic blocks arranged vertically, but a bus line implemented > with tristates will run horizontally. > > The speed issue now seems to be historical. 4K TBUFs got *very* slow > with larger devices, but Virtex TBUFs are relatively fast and the > speed appears to be independent of device size. This is apparently > because there aren't actually any tristate buffers on Virtex; they're > actually implemented as combinatorial muxes and just pretend to be > tristates. > > As a rule, I'd say forget it. TBUFs are fine for small FPGAs, where > you have to use every trick you can to squeeze performance out of > them. For 'big' devices, the issues are completely different - design > management, timing closure, getting a design done in a reasonable > timescale. I'd say the days of the TBUF are numbered (at least until > someone gives us the 10GHz 100-CLB FPGA, then we can start all over > again...) > > Evan I would quibble with the last two disadvantages you mention. In many cases the speed will be fine since it does not slow as appreciably with size compared to a LUT mux. I doubt that the tbufs are really muxes, but I can't say for sure. Of course it can't be pipelined for speed the way a LUT solution can. The placement issue is often perfect for placement. If you are muxing many registers onto a wide bus, then the registers will be vertically arranged and the mux *should* be horizontal. Of course if you are muxing one wide register to a single signal the arrangement is not good. A barrel shifter still works out since it has to be a 2D array. The input data lines run diagonal, the enables run vertical and the output data is horizontal. This is what I used and it had no problems routing at all. -- Rick Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design Arius 4 King Ave Frederick, MD 21701-3110 301-682-7772 Voice 301-682-7666 FAX Internet URL http://www.arius.com ###### From: "Andrew Ince" Newsgroups: comp.arch.fpga References: <8m4a3r$3mm$1@nnrp1.deja.com> <39866193.C565C403@yahoo.com> <8majcd$523$1@bagan.srce.hr> Subject: Re: tbuf Date: Tue, 8 Aug 2000 10:43:50 -0000 Lines: 14 X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 5.00.2919.6600 X-MimeOLE: Produced By Microsoft MimeOLE V5.00.2919.6600 NNTP-Posting-Host: basit47307021.basldn.gecm.com Message-ID: <398fd5ee$1@pull.gecm.com> X-Trace: 8 Aug 2000 10:42:06 GMT, basit47307021.basldn.gecm.com Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.nextra.ch!news1.sunrise.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed00.sul.t-online.de!t-online.de!grolier!btnet-peer0!btnet!newreader.ukcore.bt.net!pull.gecm.com!basit47307021.basldn.gecm.com Xref: chonsp.franklin.ch comp.arch.fpga:105 "Domagoj" wrote in message news:8majcd$523$1@bagan.srce.hr... > one of disadvantages : if you are planning to port your design to ASIC > some day, or maybe to another FPGA family without tbufs, you'll probably > need to rewrite your code again. so, using plain old muxes implemented in > luts enhance portability. What about the Automatic replacement of internal Tristates available in Synthesis tools.? Andrew Ince ###### From: "Domagoj" Newsgroups: comp.arch.fpga Subject: Re: tbuf Date: Thu, 10 Aug 2000 23:05:09 +0200 Organization: CARNet, CROATIA Lines: 15 Message-ID: <8mv5mj$f40$1@bagan.srce.hr> References: <8m4a3r$3mm$1@nnrp1.deja.com> <39866193.C565C403@yahoo.com> <8majcd$523$1@bagan.srce.hr> <398fd5ee$1@pull.gecm.com> NNTP-Posting-Host: asy236.jmu.carnet.hr X-Trace: bagan.srce.hr 965941779 15488 193.198.129.116 (10 Aug 2000 21:09:39 GMT) X-Complaints-To: abuse@news.carnet.hr NNTP-Posting-Date: 10 Aug 2000 21:09:39 GMT X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 5.00.2314.1300 X-MimeOLE: Produced By Microsoft MimeOLE V5.00.2314.1300 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed.cwix.com!argos.tel.hr!carnet.feed!CARNet.hr!not-for-mail Xref: chonsp.franklin.ch comp.arch.fpga:341 > What about the Automatic replacement of internal Tristates available in > Synthesis tools.? Had no idea about that possiblity.. :) Which tools can do that ? regards. ------------------------------------------- - Domagoj - - Domagoj@engineer.com - ------------------------------------------- ###### From: "Andrew Ince" Newsgroups: comp.arch.fpga References: <8m4a3r$3mm$1@nnrp1.deja.com> <39866193.C565C403@yahoo.com> <8majcd$523$1@bagan.srce.hr> <398fd5ee$1@pull.gecm.com> <8mv5mj$f40$1@bagan.srce.hr> Subject: Re: tbuf Date: Fri, 11 Aug 2000 14:43:19 -0000 Lines: 12 X-Priority: 3 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 5.00.2919.6600 X-MimeOLE: Produced By Microsoft MimeOLE V5.00.2919.6600 NNTP-Posting-Host: basit47307021.basldn.gecm.com Message-ID: <39940293$1@pull.gecm.com> X-Trace: 11 Aug 2000 14:41:39 GMT, basit47307021.basldn.gecm.com Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!news.imp.ch!psinet-eu-nl!newsfeeds.belnet.be!news.belnet.be!newsfeed00.sul.t-online.de!t-online.de!diablo.theplanet.net!peer.news.th.u-net.net!u-net!btnet-peer0!btnet!newreader.ukcore.bt.net!pull.gecm.com!basit47307021.basldn.gecm.com Xref: chonsp.franklin.ch comp.arch.fpga:1065 "Domagoj" wrote in message news:8mv5mj$f40$1@bagan.srce.hr... > > What about the Automatic replacement of internal Tristates available in > > Synthesis tools.? > > Had no idea about that possiblity.. :) > Which tools can do that ? Leonardo says it can, but I have not tested it. ###### From: krw@attglobal.net (Keith R. Williams) Reply-To: krw@attglobal.net Message-ID: Newsgroups: comp.arch.fpga Subject: Re: tbuf References: <8m4a3r$3mm$1@nnrp1.deja.com> <39866193.C565C403@yahoo.com> <8majcd$523$1@bagan.srce.hr> <398fd5ee$1@pull.gecm.com> <8mv5mj$f40$1@bagan.srce.hr> X-Newsreader: ProNews/2 Version 1.50 ia093a MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8bit NNTP-Posting-Host: 32.101.168.121 Date: 13 Aug 2000 14:36:04 GMT X-Trace: 13 Aug 2000 14:36:04 GMT, 32.101.168.121 Organization: Global Network Services - Remote Access Mail & News Services Lines: 14 X-Complaints-To: abuse@prserv.net Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!cpk-news-hub1.bbnplanet.com!news.gtei.net!newsfeed.us.ibm.net!ibm.net!news3.prserv.net!32.101.168.121 Xref: chonsp.franklin.ch comp.arch.fpga:887 On Thu, 10 Aug 2000 21:05:09, "Domagoj" wrote: > > What about the Automatic replacement of internal Tristates available in > > Synthesis tools.? > > Had no idea about that possiblity.. :) > Which tools can do that ? Synplify has an attribute that will do this. I believe it'll go either way, but I can't remember. ---- Keith