Index of /Usenet/comp.arch.fpga

[ICO]NameLast modifiedSizeDescription
[DIR]Parent Directory  -  
[ ]00000000_all_posts.tar.gz23-Dec-2003 21:41 26M 
[ ]20000801_tbuf24-Dec-2000 23:38 18K 
[ ]20000802_FPGA_selection24-Dec-2000 19:34 20K 
[ ]20000804_Memory_specification24-Dec-2000 21:01 23K 
[ ]20000806_Help_Virtex_system_gate_count24-Dec-2000 20:25 17K 
[ ]20000809_3_state_busses_on_Virtex24-Dec-2000 18:43 7.7K 
[ ]20000829_Spartan_II_vs_Virtex24-Dec-2000 23:33 19K 
[ ]20000917_Are_SpartanIIs_in_FG456_drop_in_replacements_for_Virtex_FG45624-Dec-2000 18:52 19K 
[ ]20000917_virtex_shape24-Dec-2000 23:44 7.6K 
[ ]20000928_atmel_verses_altera24-Dec-2000 19:12 31K 
[ ]20000929_FPGA_development_on_the_cheap01-Oct-2000 22:10 17K 
[ ]20001002_Amplify_experience19-Oct-2000 21:45 422K 
[ ]20001002_Xilinx_Adds_FPGA_Support_to_Free_Web_Design_Tools15-Oct-2000 14:32 8.5K 
[ ]20001017_VHDL_vs_Verilog22-Oct-2000 01:23 22K 
[ ]20001023_PCB_s_for_re_casting_the_form_factor_of_a_QFP24-Oct-2000 23:05 7.5K 
[ ]20001030_WebPACK_ISE_V3_2i_is_available_for_immediate_download01-Nov-2000 22:14 7.8K 
[ ]20001101_JBits02-Nov-2000 23:12 4.4K 
[ ]20001102_Pwer_supply_for_a_XCV300_Recommendations_please02-Nov-2000 23:11 2.5K 
[ ]20001106_Encoding_of_FSMs_internal_states24-Dec-2000 19:28 6.2K 
[ ]20001108_Linux_Unix_code_to_drive_Xilinx_download_cable24-Dec-2000 20:54 2.9K 
[ ]20001117_Hardware_suggestions_for_evolutionary_experiments20-Nov-2000 22:55 7.9K 
[ ]20001117_In_the_news21-Nov-2000 21:25 31K 
[ ]20001127_Xess_XS40_005XL_question05-Dec-2000 23:42 16K 
[ ]20001128_Virtex_ROM_ques05-Dec-2000 23:39 16K 
[ ]20001129_Wide_AND_function24-Dec-2000 23:56 15K 
[ ]20001201_DLLs_driving_DLLs_in_Virtex02-Dec-2000 22:59 8.1K 
[ ]20001206_JBits_Xilinx_customer_support09-Dec-2000 22:43 4.5K 
[ ]20001208_Altera_free_development_tools18-Dec-2000 21:27 12K 
[ ]20001213_Is_it_necessary_to_synchronize_the_reset_signal_in_an_FPGA23-Dec-2000 21:38 25K 
[ ]20001214_Verilog_or_VHDL02-Jan-2001 01:51 81K 
[ ]20001219_3V_5V_clock_signal_level_conversion23-Dec-2000 00:23 60K 
[ ]20001219_FPGA_and_Board_for_Microprocessor_Design23-Dec-2000 00:27 20K 
[ ]20001220_Hand_Soldering_a_PQ208_It_looks_tough_to_do23-Dec-2000 00:33 6.3K 
[ ]20001222_driving_color_VGA_from_FPGA23-Dec-2000 00:24 4.9K 
[ ]20001223_Question_about_programming_xcv10003-Jan-2001 19:55 45K 
[ ]20001226_Newbie_question_on_clock_timing_generation03-Jan-2001 19:54 21K 
[ ]20010102_Free_Tools_and_Designs02-Jan-2001 15:03 1.6K 
[ ]20010103_Fixing_pins_on_Spartan_II17-Jan-2001 22:13 22K 
[ ]20010104_Spartan_II_DLL_Usage16-Jan-2001 23:33 63K 
[ ]20010108_Alliance_for_Linux20-Jan-2001 16:17 70K 
[ ]20010110_grey_code_counters03-Feb-2001 21:46 84K 
[ ]20010112_Virtex_counter_speed13-Jan-2001 23:31 7.8K 
[ ]20010117_About_programming_cables24-Jan-2001 22:49 13K 
[ ]20010117_FPGA_driving_clock_line20-Jan-2001 01:06 30K 
[ ]20010117_FSM_encoding20-Jan-2001 16:21 19K 
[ ]20010118_Best_design_for_asyn_interface_DSP_FPGA20-Jan-2001 16:18 32K 
[ ]20010123_Foundation_FPGA_Editor_hard_macros_in_VHDL26-Jan-2001 23:52 9.8K 
[ ]20010130_Spartan_2_DLL06-Feb-2001 22:20 65K 
[ ]20010206_can_A_B_computed_in_one_level_of_logic10-Feb-2001 16:04 4.5K 
[ ]20010215_FAQ_submission17-Feb-2001 16:55 2.9K 
[ ]20010216_Vertex_Place_Route_Time17-Feb-2001 23:38 11K 
[ ]20010218_Samll_quantities_ordering28-Feb-2001 23:07 12K 
[ ]20010221_Clocks21-Feb-2001 23:16 5.5K 
[ ]20010222_Virtex_USB_solution19-Mar-2001 22:30 20K 
[ ]20010224_Soldering_and_Unsoldering_PQFP_by_hand04-Mar-2001 00:26 14K 
[ ]20010225_VDHL_Book_recomendation_please_Xilinx_designer27-Feb-2001 20:44 3.1K 
[ ]20010226_Linux_Xilinx_Programmer27-Feb-2001 20:31 7.6K 
[ ]20010227_Interfacing_Xilinx_4003_to_an_IDE_Hard_Disk_interface06-Mar-2001 22:02 27K 
[ ]20010227_Partial_Reconfig_using_JBits28-Feb-2001 23:07 10K 
[ ]20010303_Bad_Xilinx_bitstream_big_bang07-Mar-2001 21:56 42K 
[ ]20010306_More_detailed_Spartan_II_CLB_drawings11-Mar-2001 23:10 9.4K 
[ ]20010311_sample_code_for_JTAG_configuration_of_Virtex_Spartan_II14-Mar-2001 00:59 2.1K 
[ ]20010319_TBUFs_in_Virtex_and_later_chips_going_out_of_fashion_what_instead23-Mar-2001 23:34 63K 
[ ]20010417_Download_Cable_Mystery_Solved18-Apr-2001 17:30 7.6K 
[ ]20010428_BlockRAM_outputs_and_the_Placer30-Apr-2001 01:03 13K 
[ ]20010510_Finally_an_FPGA_tool_chain_for_Linux_Altera_Quartus_II23-May-2001 20:11 85K 
[ ]20010526_Internal_tri_states29-May-2001 23:28 20K 
[ ]20010526_The_FAQ_is_Live_and_so_is_the_Archive29-May-2001 23:33 7.5K 
[ ]20010526_Xilinx_XC4010E_Problem06-Jun-2001 19:32 31K 
[ ]20010604_Xilinx_Configuration_Bitstream13-Jul-2001 23:27 35K 
[ ]20010611_Doing_Ethernet_in_a_Virtex12-Jun-2001 23:00 6.7K 
[ ]20010611_Gray_Code_Guard_bits12-Jun-2001 23:03 10K 
[ ]20010626_Stupid_Xilinx_Patent13-Jul-2001 22:59 46K 
[ ]20010630_xr16vx_a_GPL_16_bit_xr16_microcontroller_in_JHDL13-Jul-2001 23:39 18K 
[ ]20010706_Problems_with_Virtex_Block_Ram_Propagation_Delay13-Jul-2001 22:31 8.4K 
[ ]20010708_Shift_and_Add_Multiplier_With_Signed_Numbers17-Jul-2001 21:31 27K 
[ ]20010712_Design_entry17-Jul-2001 21:24 44K 
[ ]20010716_Xilinx_bit_file_format17-Jul-2001 21:41 7.9K 
[ ]20010721_Soldering_Ceramic_BGA_s25-Jul-2001 17:43 12K 
[ ]20010723_Homemade_Xilinx_parallel_cable_problem04-Aug-2001 21:15 23K 
[ ]20010726_PQFP_sockets28-Jul-2001 02:41 11K 
[ ]20010802_Clock_skew_with_Xilinx_DLLs03-Aug-2001 23:39 17K 
[ ]20010802_Spartan_II_and_asynchronous_memory_interface08-Aug-2001 23:48 82K 
[ ]20010814_A_parallel_port_low_voltage_signal_interface_for_new_FPGAs14-Aug-2001 23:24 1.4K 
[ ]20010814_Building_a_clock_out_of_a_PLD17-Aug-2001 00:01 37K 
[ ]20010815_Xilinx_pin_lists_in_text_format16-Aug-2001 00:04 6.4K 
[ ]20010816_hardware_damage_to_a_Virtex_or_Spartan_II25-Aug-2001 16:37 43K 
[ ]20010828_download_bitstream_to_FPGA31-Aug-2001 23:49 24K 
[ ]20010830_Ethernet_CRC05-Sep-2001 15:29 26K 
[ ]20010830_Re_XCV800_Jbits01-Sep-2001 00:18 4.1K 
[ ]20010831_ISA_PC_104_BUS_DECODE_ASYNC_or_SYNC05-Sep-2001 22:55 19K 
[ ]20010901_Re_Jbits_more_info_required01-Sep-2001 21:01 6.9K 
[ ]20010903_Linux_download_bitstream_w_source04-Sep-2001 21:57 5.8K 
[ ]20010903_Virtex_Architecture_Interconnect05-Sep-2001 15:31 3.3K 
[ ]20010904_Open_collector_outputs04-Sep-2001 21:59 5.9K 
[ ]20010920_Clockin_on_rising_AND_falling_edge24-Sep-2001 21:03 18K 
[ ]20010920_Data_cache_for_fpga_cpu_using_Xilinx_BlockRam12-Sep-2001 21:19 11K 
[ ]20010930_future_Xilinx_products_wish_list26-Oct-2001 23:19 75K 
[ ]20011001_CTL_Register_in_Virtex_E_Configuration03-Oct-2001 21:45 2.6K 
[ ]20011008_FPGA_reset15-Oct-2001 21:41 30K 
[ ]20011014_PLLs_DLLs17-Oct-2001 23:33 39K 
[ ]20011016_LUT_Glitches28-Oct-2001 15:13 35K 
[ ]20011025_Probing_BGA_Designs27-Oct-2001 21:22 6.4K 
[ ]20011030_Autostart_Problem_SPROM_FPGA31-Oct-2001 20:19 4.9K 
[ ]20011102_Open_configuration_bitstreams03-Nov-2001 18:26 9.6K 
[ ]20011103_How_dense_are_FPGA_CPLD_s10-Nov-2001 20:01 28K 
[ ]20011104_JBITS_and_modular_FPGA_configuration04-Nov-2001 23:20 8.7K 
[ ]20011107_FPGA_suppliers_for_hobbyists08-Nov-2001 00:40 7.9K 
[ ]20011107_Modifying_BlockRAM_contents_in_a_bitstream07-Nov-2001 21:14 3.4K 
[ ]20011107_Xilinx_machine_readable_package_info10-Nov-2001 20:05 20K 
[ ]20011109_Carry_chain_in_Virtex_II15-Nov-2001 21:52 10K 
[ ]20011109_Decoupling_capacitors_on_Virtex_II26-Nov-2001 20:56 75K 
[ ]20011117_Q_XILINX_binary_bit_file_header18-Nov-2001 19:01 6.8K 
[ ]20011120_Ann_Low_cost_Spartan2_FPGA_board19-Nov-2001 21:07 2.1K 
[ ]20011128_Is_there_a_full_open_source_synthesis_path_for_any_FPGA04-Dec-2001 22:53 197K 
[ ]20011128_SpartanIIE10-Dec-2001 21:23 25K 
[ ]20011130_What_do_you_like_dislike_about_place_and_route_tools13-Dec-2001 13:41 53K 
[ ]20011203_Crossing_a_clock_domain06-Dec-2001 21:42 24K 
[ ]20011206_where_is_designed_FPGA_for_apple_II_computer13-Dec-2001 13:42 30K 
[ ]20011208_ISA_syncronization13-Dec-2001 13:40 19K 
[ ]20011216_Multiplying_by_squaring_using_Block_RAM17-Dec-2001 22:09 7.3K 
[ ]20011218_Barrel_shifter_puts_three_2_1_muxes_slice_in_Xilinx22-Dec-2001 23:54 49K 
[ ]20011218_Divide_by_3_with_remainder_efficient_and_fast_for_Altera_or_Xilinx19-Dec-2001 23:02 42K 
[ ]20011219_Efficient_new_multiplier_for_Spartan2_Virtex_c19-Dec-2001 23:03 8.4K 
[ ]20011219_Low_area_barrel_shift_puts_3_to_1_mux_in_a_Xilinx_LUT19-Dec-2001 23:11 38K 
[ ]20011221_16_5_multiplier_uses_new_multiply_algorithm22-Dec-2001 23:40 10K 
[ ]20011221_CE_on_XILINX_FFs_and_Metastability22-Dec-2001 23:57 13K 
[ ]20020103_Spartan_IIE_interfacing_issues06-Jan-2002 00:36 8.9K 
[ ]20020108_latch_vs_register13-Jan-2002 22:25 22K 
[ ]20020109_Spartan_IIE_pinout_compatibililty_with_Virtex_E10-Jan-2002 21:27 8.2K 
[ ]20020111_Xilinx_PAR_and_Editor_speed_up14-Jan-2002 20:47 12K 
[ ]20020113_Homebrew_computers_using_FPGA03-Feb-2002 20:00 31K 
[ ]20020117_Virtex2_ICAP18-Jan-2002 22:48 4.8K 
[ ]20020118_DDR_Interface21-Jan-2002 21:11 11K 
[ ]20020122_Virtex_II_Programming_Highs_and_Lows23-Jan-2002 21:51 18K 
[ ]20020124_Dynamic_Reconfiguration_of_single_Xilinx_FPGA25-Jan-2002 22:56 30K 
[ ]20020128_configuring_an_FPGA_from_an_Hard_drive_with_a_80c5103-Feb-2002 19:14 28K 
[ ]20020128_glitchless_clock_enable_disable_in_spartanII03-Feb-2002 19:53 57K 
[ ]20020129_Soft_errors_climb_in_0_13u_SRAM03-Feb-2002 20:23 10K 
[ ]20020130_Java_or_bytecode_processors03-Feb-2002 20:04 14K 
[ ]20020204_Virtex_II_and_SDRAM_Controller_at_133MHz07-Feb-2002 22:33 13K 
[ ]20020205_FPGA_SDRAM_Groundbounce_Latchup_Possible07-Feb-2002 22:25 20K 
[ ]20020206_Pseudorandom_Bitstream20-Feb-2002 21:34 76K 
[ ]20020206_designing_a_protocol_analyzer_for_proprietary_serial_bus07-Feb-2002 22:30 4.8K 
[ ]20020210_Xilinx_EDIF_to_BIT_transation13-Feb-2002 00:18 17K 
[ ]20020225_Comparison_between_two_FPGA_what_is_decisive_factor02-Mar-2002 23:11 12K 
[ ]20020227_SDRAM_FPGA28-Feb-2002 21:07 3.8K 
[ ]20020228_stuck_in_state_in_Spartan_II02-Mar-2002 23:28 41K 
[ ]20020301_Clock_multiplier_ADPLL_in_PLD02-Mar-2002 23:09 13K 
[ ]20020301_Xilinx_Virtex_Family_die_photos05-Mar-2002 23:41 4.9K 
[ ]20020306_Using_a_battery_instead_of_Config_device07-Mar-2002 21:30 5.9K 
[ ]20020312_powerpc_in_virtex2pro08-Apr-2002 23:18 104K 
[ ]20020315_High_speed_clock_routing27-Mar-2002 23:40 196K 
[ ]20020318_questions_from_a_newby18-Mar-2002 21:42 8.8K 
[ ]20020319_1_5V_power_supply20-Mar-2002 22:39 6.4K 
[ ]20020327_Partial_Reconfiguration28-Mar-2002 23:52 13K 
[ ]20020404_hand_placement12-Apr-2002 23:36 155K 
[ ]20020410_ChipScope_ILA_cable_requirements12-Apr-2002 23:25 6.0K 
[ ]20020412_DDR_SDRAM_Controller13-Apr-2002 14:10 9.2K 
[ ]20020413_new_to_fpga_s_need_insight16-Apr-2002 00:41 39K 
[ ]20020430_Virtex_Evolution02-May-2002 22:36 9.9K 
[ ]20020505_Xilinx_IOBUF06-May-2002 21:48 18K 
[ ]20020513_50_mA_sink20-May-2002 22:29 4.5K 
[ ]20020513_Architecture_for_high_level_reconfigurable_computing22-May-2002 22:36 120K 
[ ]20020516_Bidirectional_DONE20-May-2002 22:38 9.1K 
[ ]20020522_Routing_in_a_6200_like_sea_of_gates22-May-2002 23:01 8.5K 
[ ]20020523_Xilinx_proprietary_format30-May-2002 00:21 7.0K 
[ ]20020603_FPGA_destruction_possible07-Jun-2002 22:57 29K 
[ ]20020603_divide_by_509-Jun-2002 20:54 39K 
[ ]20020607_Doing_Trig_Functions_in_FPGA_EPLD09-Jun-2002 20:59 15K 
[ ]20020610_Power_supply_caps_on_PCB22-Jun-2002 17:58 59K 
[ ]20020616_new_computer24-Jun-2002 23:13 59K 
[ ]20020617_Internal_oscillator_in_CPLD19-Jun-2002 19:44 17K 
[ ]20020618_5V_tolerance01-Jul-2002 02:03 81K 
[ ]20020624_book_recommenation24-Jun-2002 22:57 1.9K 
[ ]20020624_too_hot_fpga_device28-Jun-2002 23:04 16K 
[ ]20020626_Virtex_E_Readback28-Jun-2002 23:07 4.4K 
[ ]20020702_Bitstream_Verification_JBITS05-Jul-2002 22:02 12K 
[ ]20020704_Maximum_frequency_in_Virtex_and_Virtex_E_Devices05-Jul-2002 22:09 13K 
[ ]20020713_What_proportion_of_an_FPGA_s_configuration_data_is_used_for_routing14-Jul-2002 02:29 6.0K 
[ ]20020713_serial_configuration_in_parallel_Xilinx_Spartan_II14-Jul-2002 12:32 5.1K 
[ ]20020715_Spartan_clock_mirroring16-Jul-2002 14:34 4.6K 
[ ]20020802_Silicon_Area_for_Xilinx_FPGAs03-Aug-2002 20:23 11K 
[ ]20020805_Qn_Low_Level_Design07-Aug-2002 01:30 4.0K 
[ ]20020805_Soundchip07-Aug-2002 01:32 18K 
[ ]20020813_RBT_versus_BIT_file14-Aug-2002 00:56 4.5K 
[ ]20020830_XNF_vs_EDIF30-Aug-2002 21:46 5.4K 
[ ]20020906_Metastability_numbers11-Sep-2002 20:40 54K 
[ ]20020906_Virtex_II_bit_file_and_strange_configuration_command10-Sep-2002 14:57 8.9K 
[ ]20020909_minimalist_FPGA_system11-Sep-2002 00:31 25K 
[ ]20020910_FPGA_comes_with_a_DAC14-Sep-2002 20:55 13K 
[ ]20020916_Readback_size_for_virtex217-Sep-2002 22:30 4.9K 
[ ]20020918_using_CPLD_s_inverter_in_oscillator_circuit19-Sep-2002 22:39 11K 
[ ]20020920_Overheat_with_XCV_600E23-Sep-2002 20:19 14K 
[ ]20020920_Silicon_lifetime21-Sep-2002 21:56 5.0K 
[ ]20020921_Can_a_fpga_replace_external_inverters_in_a_crystal_osc28-Sep-2002 00:14 23K 
[ ]20020921_Spartan_II_JTAG_reconfiguration_bug_workaround25-Sep-2002 21:32 25K 
[ ]20020921_external_switch_to_CPLD_input24-Sep-2002 00:18 8.8K 
[ ]20020925_PCB_Design_for_Altera_FPGA19-Oct-2002 16:02 23K 
[ ]20020927_Block_Ram_maximum_speed28-Sep-2002 21:03 9.8K 
[ ]20021001_Rounting_of_non_global_IO_pad_to_a_GCLKIOB_site02-Oct-2002 21:00 16K 
[ ]20021001_USB2_in_FPGA09-Oct-2002 23:04 44K 
[ ]20021003_Low_power_design07-Oct-2002 19:52 51K 
[ ]20021008_Why_can_Xilinx_sw_be_as_good_as_Altera_s_sw18-Oct-2002 22:58 379K 
[ ]20021009_Why_can_t_Altera_sw_be_as_good_as_Xilinx_s_sw13-Oct-2002 21:03 49K 
[ ]20021010_Sync_Reset_without_clocks15-Oct-2002 20:09 25K 
[ ]20021012_Open_Source_and_other_issues19-Oct-2002 16:00 96K 
[ ]20021015_GCK_as_normal_IO15-Oct-2002 19:57 4.7K 
[ ]20021018_Floorplanner_RPM_How_to_use_it23-Oct-2002 19:22 93K 
[ ]20021018_Size_of_configuration_bitstream_for_xcv5021-Oct-2002 22:05 16K 
[ ]20021020_6502_core_available23-Oct-2002 19:18 27K 
[ ]20021021_Newbie_Questions_Jan_Gray_XSOC23-Oct-2002 19:42 50K 
[ ]20021031_FPGA_convert_to_ASIC11-Nov-2002 23:00 17K 
[ ]20021108_Xilinx_LUT_based_FPGAs09-Nov-2002 23:15 5.4K 
[ ]20021210_State_of_the_PCB_world11-Mar-2003 23:23 52K 
[ ]20021218_Async_RAM_on_an_FPGA_board23-Dec-2002 21:31 47K 
[ ]20021219_virtex_output_pin_voltage09-Dec-2002 23:20 4.1K 
[ ]20021220_Hi_xilinx23-Dec-2002 21:33 21K 
[ ]20021231_Unused_FPGA_I_O_Pins06-Jan-2003 14:46 11K 
[ ]20030108_USB_OPENCORE_IP_usage08-Jan-2003 19:44 8.5K 
[ ]20030110_Spartan_2_reset_sync_or_async13-Jan-2003 21:02 8.4K 
[ ]20030116_Support_for_older_Virtex19-Jan-2003 00:09 13K 
[ ]20030128_Clock_Feedback_for_DDR_SDRAM04-Feb-2003 18:46 10K 
[ ]20030128_PCI_protocol_assigning_an_address_to_my_device05-Feb-2003 23:46 23K 
[ ]20030129_GNU_C_for_custom_processor02-Feb-2003 21:45 17K 
[ ]20030203_Difference_between_CPLD_FPGA_ASICS05-Feb-2003 18:59 11K 
[ ]20030206_debounce_circuit08-Feb-2003 00:26 7.3K 
[ ]20030210_JBits14-Feb-2003 23:17 18K 
[ ]20030218_PCB_Design_for_a_Xilinx_Spartan_II_FPGA21-Feb-2003 21:28 27K 
[ ]20030225_Licencing_for_downloadable_FPGA_tools27-Feb-2003 23:12 36K 
[ ]20030313_Xilinx_Looking_for_Parallel_Cable_III14-Mar-2003 21:56 21K 
[ ]20030314_Xilinx_WebPACK_on_WINE_getting_close16-Mar-2003 01:19 11K 
[ ]20030317_Cheapest_Spartan_II_IIE_configuration_flash_EEPROM20-Mar-2003 22:16 13K 
[ ]20030410_Ethernet_MAC12-Apr-2003 21:53 5.5K 
[ ]20030414_ISE_WebPack_under_Linux_use_of_command_line_tools20-Apr-2003 22:57 11K 
[ ]20030414_request for simple UART16-Apr-2003 01:44 32K 
[ ]20030415_Selling_CPU_cores16-Apr-2003 21:10 12K 
[ ]20030501_Schmitt_Trigger_an_a_Virtex05-May-2003 19:33 12K 
[ ]20030508_accurate_power_measurements10-May-2003 14:51 11K 
[ ]20030518_Mini_solder_masks18-May-2003 23:51 3.0K 
[ ]20030610_Cheap_development_tools11-Jun-2003 20:45 7.6K 
[ ]20030610_What_s_in_a_bitstream11-Jun-2003 20:49 16K 
[ ]20030613_PDP11_40_Compatible_CPU_on_an_FPGA13-Jun-2003 20:56 3.2K 
[ ]20030613_Problem_with_tristate_inout_pins_of_PS_2_Host17-Jun-2003 15:51 11K 
[ ]20030616_BGA_Xray_inspection_costs17-Jun-2003 15:41 8.7K 
[ ]20030622_Ethernet_only_network23-Jun-2003 21:38 6.0K 
[ ]20030623_JBits_and_Virtex_II_Pro24-Jun-2003 01:51 2.3K 
[ ]20030623_Q_regarding_I2C_protocols25-Jun-2003 01:30 52K 
[ ]20030625_GAL16V8_reverse_compilation26-Jun-2003 22:07 5.8K 
[ ]20030625_Xilinx_Webpack_bugs_bugs_bugs30-Jun-2003 18:25 176K 
[ ]20030626_Free_PAL_synth_tools27-Jun-2003 21:53 15K 
[ ]20030626_content_of_a_LUT26-Jun-2003 21:50 4.1K 
[ ]20030629_SPARTAN_3_vs_VIRTEX_II09-Jul-2003 15:56 54K 
[ ]20030707_Spartan_XL_Tool_Support08-Jul-2003 00:15 4.3K 
[ ]20030711_Graduation_Day_My_first_4_layer_PCB22-Jul-2003 00:37 92K 
[ ]20030712_edge_card_connectors_and_high_speed_design16-Jul-2003 17:45 8.9K 
[ ]20030714_Virtex_Bitstream_verification13-Jul-2003 21:07 2.3K 
[ ]20030724_Active_Probe25-Jul-2003 21:19 11K 
[ ]20030725_Reseting_the_whole_thing25-Jul-2003 21:23 23K 
[ ]20030803_Unused_Pins_on_big_Virtex_II03-Aug-2003 18:19 5.9K 
[ ]20030804_Virtual_Grounds06-Aug-2003 23:37 9.7K 
[ ]20030809_DDR_ram_interface_xapp20011-Aug-2003 19:04 11K 
[ ]20030811_Virtex_Virtual_VCC13-Aug-2003 00:22 7.7K 
[ ]20030812_Datasheet_for_National_PAL20L1029-Aug-2003 00:28 9.3K 
[ ]20030819_Async_logic_in_FPGAs23-Aug-2003 16:31 20K 
[ ]20030823_Thinking_out_loud_about_metastability07-Sep-2003 14:54 224K 
[ ]20030825_FPGA_minimum_operating_frequencies26-Aug-2003 21:07 8.7K 
[ ]20030825_Lithium_cell_on_Virtex2_Pro28-Aug-2003 22:13 11K 
[ ]20030826_How_to_listen_to_music_through_an_FPGA_pin01-Sep-2003 15:23 16K 
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