From: pechter@i4got.pechter.dyndns.org (Bill Pechter) Newsgroups: comp.arch,alt.folklore.computers Subject: Bus Design mistakes was Re: Minimalist design (was Re: Parity) Date: 6 Sep 2001 08:12:52 -0400 Organization: Unknown Lines: 44 Message-ID: <9n7p84$j86$1@i4got.pechter.dyndns.org> References: <9mhjn3$7nh$1@nnrp2.phx.gblx.net> <20010905081118.0a4e2a04.steveo@eircom.net> <1bitex1pfy.fsf@cs.nmsu.edu> <9n7lkr$8p$4@bob.news.rcn.net> NNTP-Posting-Host: bg-tc-ppp1231.monmouth.com Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!newspeer.monmouth.com!news.monmouth.com!not-for-mail Xref: chonsp.franklin.ch alt.folklore.computers:89737 In article <9n7lkr$8p$4@bob.news.rcn.net>, wrote: >Wait a minute. Are you saying that these systems can't deal with >more than one interrupt to a level? How bizarre. > >/BAH On the IBM PC the bus design makes having more than one device on an interrupt line impossible. DEC's Unibus had only 4 lines Bus Request 4 though 7 (BR4-7 and BG4-7) plus the DMA NPR/NPG lines for DMA Devices. They did daisy chain these lines through all the boards allowing multiple devices to share the interrupts and two levels of priority -- BR7 is the highest interrupt line and BR4 the lowest. BR7 -- did the 60hz line clock use this? or BR6? Old Field Service memory parity error BR6 -- some sync comm devices BR5 -- sync comm devices DUP's DU11's multiple comm line devices (sometimes DZ11's) BR4 -- single line async comm devices dl11's Most devices used either BR4 or BR5 for interrupts. Sometimes you would push the comm device to the next interrupt line (change a DIP header jumper called a) Bus Grant Plug or dip switch or solder a wire. Among boards on the same interrupt line the closest to the CPU had priority. I remember how dumb IBM's interrupt scheme looked -- but DEC used something similar in the Pro3xx line which pretty much crippled running their other OS's on it without new driver rewrites for everything. Bill -- -- d|i|g|i|t|a|l had it THEN. Don't you wish you could still buy it now! bpechter@shell.monmouth.com|pechter@pechter.dyndns.org ###### From: jmfbahciv@aol.com Newsgroups: comp.arch,alt.folklore.computers Subject: Re: Bus Design mistakes was Re: Minimalist design (was Re: Parity) Date: Thu, 06 Sep 01 10:00:44 GMT Organization: UltraNet Communications, Inc. Lines: 56 Message-ID: <9n7rb5$p95$4@bob.news.rcn.net> References: <9mhjn3$7nh$1@nnrp2.phx.gblx.net> <20010905081118.0a4e2a04.steveo@eircom.net> <1bitex1pfy.fsf@cs.nmsu.edu> <9n7lkr$8p$4@bob.news.rcn.net> <9n7p84$j86$1@i4got.pechter.dyndns.org> X-Trace: UmFuZG9tSVYhoir9JQC0uRgOuqQA11rTdg+doTl2dyJMkvcrKXsc0Pml6b1b+/1W X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 6 Sep 2001 12:48:37 GMT X-Newsreader: News Xpress Version 1.0 Beta #4 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!24832!news.imp.ch!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!feed2.news.rcn.net!feed1.news.rcn.net!rcn!207-172-102-46 Xref: chonsp.franklin.ch alt.folklore.computers:89707 In article <9n7p84$j86$1@i4got.pechter.dyndns.org>, pechter@i4got.pechter.dyndns.org (Bill Pechter) wrote: >In article <9n7lkr$8p$4@bob.news.rcn.net>, wrote: >>Wait a minute. Are you saying that these systems can't deal with >>more than one interrupt to a level? How bizarre. >> >>/BAH > > >On the IBM PC the bus design makes having more than one device >on an interrupt line impossible. That sounds terribly stupid. The clock had to have one of them.. didn't it? > >DEC's Unibus had only 4 lines Bus Request 4 though 7 (BR4-7 and BG4-7) plus >the DMA NPR/NPG lines for DMA Devices. They did daisy chain these lines >through all the boards allowing multiple devices to share the interrupts >and two levels of priority -- > >BR7 is the highest interrupt line and BR4 the lowest. > >BR7 -- did the 60hz line clock use this? or BR6? > Old Field Service memory parity error > >BR6 -- some sync comm devices > >BR5 -- sync comm devices DUP's DU11's multiple comm line devices > (sometimes DZ11's) > >BR4 -- single line async comm devices dl11's > >Most devices used either BR4 or BR5 for interrupts. Sometimes you >would push the comm device to the next interrupt line (change a DIP >header jumper called a) Bus Grant Plug or dip switch or solder a wire. > >Among boards on the same interrupt line the closest to the CPU had >priority. > >I remember how dumb IBM's interrupt scheme looked -- but DEC used >something similar in the Pro3xx line which pretty much crippled running >their other OS's on it without new driver rewrites for everything. You use different incantation than JMF and TW did. They were always talking about PI levels and trying to figure out which level the newest device should be placed. (Again, I don't know anything about this stuff...just what the guys talked about.) I remember a case where they choose the wrong level. The system became completely spastic. I think a customer once tried to change the clock's level with disasterous and sheepish results. /BAH Subtract a hundred and four for e-mail. ###### From: jmfbahciv@aol.com Newsgroups: alt.folklore.computers Subject: Re: Bus Design mistakes was Re: Minimalist design (was Re: Parity) Date: Fri, 07 Sep 01 09:58:51 GMT Organization: UltraNet Communications, Inc. Lines: 39 Message-ID: <9nafjs$f38$6@bob.news.rcn.net> References: <9mhjn3$7nh$1@nnrp2.phx.gblx.net> <20010905081118.0a4e2a04.steveo@eircom.net> <1bitex1pfy.fsf@cs.nmsu.edu> <9n7lkr$8p$4@bob.news.rcn.net> <9n7p84$j86$1@i4got.pechter.dyndns.org> <9n7rb5$p95$4@bob.news.rcn.net> X-Trace: UmFuZG9tSVbeLBNBLxhh+OVYrMSIobC3XyMDunEtH6QpyzPNt3ycp7RamluW+Tfa X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 7 Sep 2001 12:46:52 GMT X-Newsreader: News Xpress Version 1.0 Beta #4 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!newsfeed00.sul.t-online.de!newsfeed01.sul.t-online.de!t-online.de!newsfeed.online.be!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!feed2.news.rcn.net!feed1.news.rcn.net!rcn!207-172-255-184 Xref: chonsp.franklin.ch alt.folklore.computers:89842 In article , Jim Thomas wrote: >>>>>> "/BAH" == jmfbahciv writes: > > /BAH> In article <9n7p84$j86$1@i4got.pechter.dyndns.org>, > > >> DEC's Unibus had only 4 lines Bus Request 4 though 7 (BR4-7 and BG4-7) > >> plus the DMA NPR/NPG lines for DMA Devices. They did daisy chain these > >> lines through all the boards allowing multiple devices to share the > >> interrupts and two levels of priority -- > > /BAH> You use different incantation than JMF and TW did. They were > /BAH> always talking about PI levels and trying to figure out which > /BAH> level the newest device should be placed. > >Replace "BR" with "PI" and his table has the same meanings as on the -10. I had assumed that; however, this biz has so many different buzz words, I wanted to check. >On the UNIBUS (-11) the devices have BR levels. On the -10 the devices >have PI levels. Same function. > So that means that we could have many devices ship their interrupts to one level. I'm getting the sense that PCs can't or don't (which one is it) do that. IIRC the JMF/TW conversations, it was a small matter of programming to deal with all of them. I miss those guys. Think of the shit they would have posted here... assuming I could get them to read it. Thanks :-)). /BAH Subtract a hundred and four for e-mail. ###### From: Jim Thomas Newsgroups: comp.arch,alt.folklore.computers Subject: Re: Bus Design mistakes was Re: Minimalist design (was Re: Parity) Followup-To: alt.folklore.computers Date: 06 Sep 2001 13:17:45 -1000 Organization: Canada France Hawai`i Telescope Lines: 18 Message-ID: References: <9mhjn3$7nh$1@nnrp2.phx.gblx.net> <20010905081118.0a4e2a04.steveo@eircom.net> <1bitex1pfy.fsf@cs.nmsu.edu> <9n7lkr$8p$4@bob.news.rcn.net> <9n7p84$j86$1@i4got.pechter.dyndns.org> <9n7rb5$p95$4@bob.news.rcn.net> NNTP-Posting-Host: atlas.cfht.hawaii.edu X-Trace: news.hawaii.edu 999818275 7535 128.171.80.135 (6 Sep 2001 23:17:56 GMT) X-Complaints-To: usenet@hawaii.edu NNTP-Posting-Date: 6 Sep 2001 23:17:56 GMT X-Newsreader: Gnus v5.7/Emacs 20.6 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!198429!news.imp.ch!sunqbc.risq.qc.ca!news.maxwell.syr.edu!hammer.uoregon.edu!news.hawaii.edu!not-for-mail Xref: chonsp.franklin.ch alt.folklore.computers:89880 >>>>> "/BAH" == jmfbahciv writes: /BAH> In article <9n7p84$j86$1@i4got.pechter.dyndns.org>, >> DEC's Unibus had only 4 lines Bus Request 4 though 7 (BR4-7 and BG4-7) >> plus the DMA NPR/NPG lines for DMA Devices. They did daisy chain these >> lines through all the boards allowing multiple devices to share the >> interrupts and two levels of priority -- /BAH> You use different incantation than JMF and TW did. They were /BAH> always talking about PI levels and trying to figure out which /BAH> level the newest device should be placed. Replace "BR" with "PI" and his table has the same meanings as on the -10. On the UNIBUS (-11) the devices have BR levels. On the -10 the devices have PI levels. Same function. Nothead ###### Message-ID: <3B98FA15.6155FFD6@ev1.net> From: Charles Richmond Reply-To: richmond@ev1.net Organization: Cannine Computer Center X-Mailer: Mozilla 4.7C-CCK-MCD {C-UDP; EBM-APPLE} (Macintosh; I; PPC) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: alt.folklore.computers Subject: Re: Bus Design mistakes was Re: Minimalist design (was Re: Parity) References: <9mhjn3$7nh$1@nnrp2.phx.gblx.net> <20010905081118.0a4e2a04.steveo@eircom.net> <1bitex1pfy.fsf@cs.nmsu.edu> <9n7lkr$8p$4@bob.news.rcn.net> <9n7p84$j86$1@i4got.pechter.dyndns.org> <9n7rb5$p95$4@bob.news.rcn.net> <9nafjs$f38$6@bob.news.rcn.net> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 42 Date: Fri, 07 Sep 2001 14:49:41 GMT NNTP-Posting-Host: 24.179.111.125 X-Complaints-To: abuse@home.net X-Trace: news2.rdc2.tx.home.com 999874181 24.179.111.125 (Fri, 07 Sep 2001 07:49:41 PDT) NNTP-Posting-Date: Fri, 07 Sep 2001 07:49:41 PDT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!newsfeed00.sul.t-online.de!t-online.de!news-lei1.dfn.de!news-was.dfn.de!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!cpk-news-hub1.bbnplanet.com!news.gtei.net!newshub2.home.com!news.home.com!news2.rdc2.tx.home.com.POSTED!not-for-mail Xref: chonsp.franklin.ch alt.folklore.computers:89902 jmfbahciv@aol.com wrote: > > In article , > Jim Thomas wrote: > >>>>>> "/BAH" == jmfbahciv writes: > > > > /BAH> In article <9n7p84$j86$1@i4got.pechter.dyndns.org>, > > > > >> DEC's Unibus had only 4 lines Bus Request 4 though 7 (BR4-7 and BG4-7) > > >> plus the DMA NPR/NPG lines for DMA Devices. They did daisy chain > these > > >> lines through all the boards allowing multiple devices to share the > > >> interrupts and two levels of priority -- > > > > /BAH> You use different incantation than JMF and TW did. They were > > /BAH> always talking about PI levels and trying to figure out which > > /BAH> level the newest device should be placed. > > > >Replace "BR" with "PI" and his table has the same meanings as on the -10. > > I had assumed that; however, this biz has so many different buzz > words, I wanted to check. > > >On the UNIBUS (-11) the devices have BR levels. On the -10 the devices > >have PI levels. Same function. > > > > So that means that we could have many devices ship their interrupts > to one level. I'm getting the sense that PCs can't or don't (which > one is it) do that. IIRC the JMF/TW conversations, it was a > small matter of programming to deal with all of them. > > I miss those guys. Think of the shit they would have posted here... > assuming I could get them to read it. > What happened to Tony Wachs??? I remember when it was posted about what happened to JMF... Helluva world this one is... -- +-------------------------------------------------------------+ | Charles and Francis Richmond | +-------------------------------------------------------------+ ###### From: Joe Pfeiffer Newsgroups: alt.folklore.computers Subject: Re: Bus Design mistakes was Re: Minimalist design (was Re: Parity) Date: 07 Sep 2001 08:53:22 -0600 Organization: NMSU Computer Science Lines: 14 Message-ID: <1bheuf8331.fsf@cs.nmsu.edu> References: <9mhjn3$7nh$1@nnrp2.phx.gblx.net> <20010905081118.0a4e2a04.steveo@eircom.net> <1bitex1pfy.fsf@cs.nmsu.edu> <9n7lkr$8p$4@bob.news.rcn.net> <9n7p84$j86$1@i4got.pechter.dyndns.org> <9n7rb5$p95$4@bob.news.rcn.net> <9nafjs$f38$6@bob.news.rcn.net> NNTP-Posting-Host: viper.cs.nmsu.edu X-Trace: bubba.NMSU.Edu 999874398 11160 128.123.64.113 (7 Sep 2001 14:53:18 GMT) X-Complaints-To: usenet@bubba.NMSU.Edu NNTP-Posting-Date: 7 Sep 2001 14:53:18 GMT X-Newsreader: Gnus v5.7/Emacs 20.5 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!newsxfer.eecs.umich.edu!hardy.tc.umn.edu!lynx.unm.edu!news.NMSU.Edu!not-for-mail Xref: chonsp.franklin.ch alt.folklore.computers:89813 jmfbahciv@aol.com writes: > > So that means that we could have many devices ship their interrupts > to one level. I'm getting the sense that PCs can't or don't (which > one is it) do that. IIRC the JMF/TW conversations, it was a > small matter of programming to deal with all of them. Couldn't. PCI bus fixed it (along with a whole bunch of other stuff, which to be fair couldn't realistically have been done in 1981). -- Joseph J. Pfeiffer, Jr., Ph.D. Phone -- (505) 646-1605 Department of Computer Science FAX -- (505) 646-1002 New Mexico State University http://www.cs.nmsu.edu/~pfeiffer SWNMRSEF: http://www.nmsu.edu/~scifair ###### Path: chonsp.franklin.ch!not-for-mail From: Neil Franklin Newsgroups: alt.folklore.computers Subject: Re: Bus Design mistakes was Re: Minimalist design (was Re: Parity) Date: 07 Sep 2001 21:30:06 +0200 Organization: My own Private Self Lines: 44 Message-ID: <6uvgiuiytd.fsf@chonsp.franklin.ch> References: <9mhjn3$7nh$1@nnrp2.phx.gblx.net> <20010905081118.0a4e2a04.steveo@eircom.net> <1bitex1pfy.fsf@cs.nmsu.edu> <9n7lkr$8p$4@bob.news.rcn.net> <9n7p84$j86$1@i4got.pechter.dyndns.org> <9n7rb5$p95$4@bob.news.rcn.net> <9nafjs$f38$6@bob.news.rcn.net> <1bheuf8331.fsf@cs.nmsu.edu> NNTP-Posting-Host: chonsp.franklin.ch X-Trace: chonsp.franklin.ch 999891006 821 10.0.3.2 (7 Sep 2001 19:30:06 GMT) X-Complaints-To: news@chonsp.franklin.ch NNTP-Posting-Date: 7 Sep 2001 19:30:06 GMT X-Newsreader: Gnus v5.7/Emacs 20.4 Xref: chonsp.franklin.ch alt.folklore.computers:89914 Joe Pfeiffer writes: > jmfbahciv@aol.com writes: > > > > So that means that we could have many devices ship their interrupts > > to one level. I'm getting the sense that PCs can't or don't (which > > one is it) do that. Can't. Interrupt line sharing requires devices using open collecotr outputs in the devices and then wire-ORing them on the bus, with an pull-up resistor to hold "no interrupt" state, unless a device is demanding one. It also requires an interrupt controller that reacty to levels, not edges. PCs a) lack the resistors, b) have devices that drive the interrupts with totem-pole outputs, c) an PIC programmed to edge mode, d) devices that expect that to be so. > > IIRC the JMF/TW conversations, it was a > > small matter of programming to deal with all of them. Something PCs do do with their software interrupt drivers (the ones used for system calls and other hookable events). > Couldn't. PCI bus fixed it (along with a whole bunch of other stuff, PS/2 Microchannel already fixed it also, but failled in the market due to IBMs idiotic license policy (back-pay licenses for all ISA bus machines). > which to be fair couldn't realistically have been done in 1981). It certainly could have been done. The PIC chip supports wire-OR and level triggering on an Microchannel machine is set to that mode. This is not exactly rocket science. The PDP-8 already did it. The PC simly was an awfully bad design, even for its days. -- Neil Franklin, neil@franklin.ch.remove http://neil.franklin.ch/ Hacker, Unix Guru, El Eng HTL/BSc, Sysadmin, Archer, Roleplayer - Intellectual Property is Intellectual Robbery ###### From: jmfbahciv@aol.com Newsgroups: alt.folklore.computers Subject: Re: Bus Design mistakes was Re: Minimalist design (was Re: Parity) Date: Sat, 08 Sep 01 09:37:27 GMT Organization: UltraNet Communications, Inc. Lines: 32 Message-ID: <9nd2o2$i2m$2@bob.news.rcn.net> References: <9mhjn3$7nh$1@nnrp2.phx.gblx.net> <20010905081118.0a4e2a04.steveo@eircom.net> <1bitex1pfy.fsf@cs.nmsu.edu> <9n7lkr$8p$4@bob.news.rcn.net> <9n7p84$j86$1@i4got.pechter.dyndns.org> <9n7rb5$p95$4@bob.news.rcn.net> <9nafjs$f38$6@bob.news.rcn.net> <1bheuf8331.fsf@cs.nmsu.edu> <6uvgiuiytd.fsf@chonsp.franklin.ch> X-Trace: UmFuZG9tSVacvelccOIcXMbif2+HUJnuyk3X0r/zpcXQx14cCBAQmQ8Wx6WMIrQR X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 8 Sep 2001 12:25:38 GMT X-Newsreader: News Xpress Version 1.0 Beta #4 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!feed2.news.rcn.net!feed1.news.rcn.net!rcn!207-172-245-189 Xref: chonsp.franklin.ch alt.folklore.computers:89957 In article <6uvgiuiytd.fsf@chonsp.franklin.ch>, Neil Franklin wrote: >Joe Pfeiffer writes: > >> jmfbahciv@aol.com writes: >> > >> > So that means that we could have many devices ship their interrupts >> > to one level. I'm getting the sense that PCs can't or don't (which >> > one is it) do that. > >Can't. Interrupt line sharing requires devices using open collecotr >outputs in the devices and then wire-ORing them on the bus, with an >pull-up resistor to hold "no interrupt" state, unless a device is >demanding one. It also requires an interrupt controller that reacty to >levels, not edges. >> which to be fair couldn't realistically have been done in 1981). > >It certainly could have been done. The PIC chip supports wire-OR and >level triggering on an Microchannel machine is set to that mode. > >This is not exactly rocket science. The PDP-8 already did it. >The PC simly was an awfully bad design, even for its days. In my ignorance of hardware, I never did understand why we (DEC) never used our PDP-8s for this stuff..nevermind, I just remembered why--DECnet. /BAH Subtract a hundred and four for e-mail. ###### From: jmfbahciv@aol.com Newsgroups: alt.folklore.computers Subject: Re: Bus Design mistakes was Re: Minimalist design (was Re: Parity) Date: Sat, 08 Sep 01 09:33:27 GMT Organization: UltraNet Communications, Inc. Lines: 47 Message-ID: <9nd2gj$i2m$1@bob.news.rcn.net> References: <9mhjn3$7nh$1@nnrp2.phx.gblx.net> <20010905081118.0a4e2a04.steveo@eircom.net> <1bitex1pfy.fsf@cs.nmsu.edu> <9n7lkr$8p$4@bob.news.rcn.net> <9n7p84$j86$1@i4got.pechter.dyndns.org> <9n7rb5$p95$4@bob.news.rcn.net> <9nafjs$f38$6@bob.news.rcn.net> <3B98FA15.6155FFD6@ev1.net> X-Trace: UmFuZG9tSVYaP4ztRlddpYBjYuOooOxDW4azxWShfdy+8q8UAJu73BBsVxnaqUwY X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 8 Sep 2001 12:21:39 GMT X-Newsreader: News Xpress Version 1.0 Beta #4 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!feed2.news.rcn.net!feed1.news.rcn.net!rcn!207-172-245-189 Xref: chonsp.franklin.ch alt.folklore.computers:89962 In article <3B98FA15.6155FFD6@ev1.net>, Charles Richmond wrote: >jmfbahciv@aol.com wrote: >> >> In article , >> Jim Thomas wrote: >> >>>>>> "/BAH" == jmfbahciv writes: >> > >> > /BAH> In article <9n7p84$j86$1@i4got.pechter.dyndns.org>, >> > >> > >> DEC's Unibus had only 4 lines Bus Request 4 though 7 (BR4-7 and BG4-7) >> > >> plus the DMA NPR/NPG lines for DMA Devices. They did daisy chain >> these >> > >> lines through all the boards allowing multiple devices to share the >> > >> interrupts and two levels of priority -- >> > >> > /BAH> You use different incantation than JMF and TW did. They were >> > /BAH> always talking about PI levels and trying to figure out which >> > /BAH> level the newest device should be placed. >> > >> >Replace "BR" with "PI" and his table has the same meanings as on the -10. >> >> I had assumed that; however, this biz has so many different buzz >> words, I wanted to check. >> >> >On the UNIBUS (-11) the devices have BR levels. On the -10 the devices >> >have PI levels. Same function. >> > >> >> So that means that we could have many devices ship their interrupts >> to one level. I'm getting the sense that PCs can't or don't (which >> one is it) do that. IIRC the JMF/TW conversations, it was a >> small matter of programming to deal with all of them. >> >> I miss those guys. Think of the shit they would have posted here... >> assuming I could get them to read it. >> >What happened to Tony Wachs??? I remember when it was posted about >what happened to JMF... Helluva world this one is... > He died (cancer) a couple of years before Jim. /BAH Subtract a hundred and four for e-mail. ###### Path: chonsp.franklin.ch!not-for-mail From: Neil Franklin Newsgroups: alt.folklore.computers Subject: Re: Bus Design mistakes was Re: Minimalist design (was Re: Parity) Date: 10 Sep 2001 14:11:32 +0200 Organization: My own Private Self Lines: 57 Message-ID: <6un1434557.fsf@chonsp.franklin.ch> References: <9mhjn3$7nh$1@nnrp2.phx.gblx.net> <20010905081118.0a4e2a04.steveo@eircom.net> <1bitex1pfy.fsf@cs.nmsu.edu> <9n7lkr$8p$4@bob.news.rcn.net> <9n7p84$j86$1@i4got.pechter.dyndns.org> <9n7rb5$p95$4@bob.news.rcn.net> <9nafjs$f38$6@bob.news.rcn.net> <1bheuf8331.fsf@cs.nmsu.edu> <6uvgiuiytd.fsf@chonsp.franklin.ch> <9nd2o2$i2m$2@bob.news.rcn.net> NNTP-Posting-Host: chonsp.franklin.ch X-Trace: chonsp.franklin.ch 1000123893 460 10.0.3.2 (10 Sep 2001 12:11:33 GMT) X-Complaints-To: news@chonsp.franklin.ch NNTP-Posting-Date: 10 Sep 2001 12:11:33 GMT X-Newsreader: Gnus v5.7/Emacs 20.4 Xref: chonsp.franklin.ch alt.folklore.computers:90099 jmfbahciv@aol.com writes: > In article <6uvgiuiytd.fsf@chonsp.franklin.ch>, > Neil Franklin wrote: > > >> which to be fair couldn't realistically have been done in 1981). > > > >It certainly could have been done. The PIC chip supports wire-OR and > >level triggering on an Microchannel machine is set to that mode. > > > >This is not exactly rocket science. The PDP-8 already did it. > >The PC simly was an awfully bad design, even for its days. > > In my ignorance of hardware, I never did understand why we (DEC) > never used our PDP-8s for this stuff.. DEC _nearly_ did do it. There exists an Smithsonian Interview[1] with Gordon Bell, in which he mentiones about trying to get Intel to build PDP-8 microprocessors (this is 1972, when the 8008 was still fresh and the 8080 not yet on the drawing board). Intel wanted to, but Ken and the Operations Committee stalled these plans. Classic DEC shoot in own foot strategy. [1] http://research.microsoft.com/users/GBell/Bell_Smithsonian_Interview.htm > nevermind, I just remembered > why--DECnet. Early to mid 70s DECnet would have never been an K.O. criterium, at least market wise. Even mid 80s most PCs had no more network than an RS232. And the 8 had that in the mid 60s. While adding Ethernet to the 8 would not have been possible (not enough memory), if Intel had made 8s instead of 8080, then the logical consequence would have been 11s instead of 8086/8088. And they did have Ethernet. And then VAX instead of 80386... PC computing would have been a lot better. Assuming of course IBMs PC makers had not balked at using DEC designed CPU architectures. Hmmm, IBM going with self-build processors, no clones, not gaining the market. Instead an motly crew of 8 and 11 and VAX cloners, interesting. Total blue sky: if DEC had done more 9/15s instead of 11 (advert theme: why put up with 16 bits if you can have 18?) and migrated to 10 instead of making VAX, and Intel had produced them... -- Neil Franklin, neil@franklin.ch.remove http://neil.franklin.ch/ Hacker, Unix Guru, El Eng HTL/BSc, Sysadmin, Archer, Roleplayer - Intellectual Property is Intellectual Robbery ###### From: "Charlie Gibbs" Newsgroups: alt.folklore.computers Subject: Re: Bus Design mistakes was Re: Minimalist design (was Re: Parity) Date: 11 Sep 01 12:38:34 -0800 Organization: http://extra.newsguy.com Lines: 19 Message-ID: <594.654T1749T7584890@nowhere.in.particular> References: <9n7rb5$p95$4@bob.news.rcn.net> <9nafjs$f38$6@bob.news.rcn.net> <1bheuf8331.fsf@cs.nmsu.edu> <6uvgiuiytd.fsf@chonsp.franklin.ch> <3B9D2B95.F9F7C74C@yahoo.com> NNTP-Posting-Host: p-255.newsdawg.com X-Newsreader: THOR 2.5a (Amiga;TCP/IP) Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!newsfeed00.sul.t-online.de!t-online.de!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed.stanford.edu!pln-w!spln!dex!extra.newsguy.com!newsp.newsguy.com!news1 Xref: chonsp.franklin.ch alt.folklore.computers:90202 In article <3B9D2B95.F9F7C74C@yahoo.com> cbfalconer@yahoo.com (CBFalconer) writes: >Neil Franklin wrote: > >> This is not exactly rocket science. The PDP-8 already did it. >> The PC simly was an awfully bad design, even for its days. > >So did my 8080 based systems, designed circa 1974. It doesn't >require an unclear physicist to see that a limited resource should >be used in a manner allowing for extension. On the other hand, if you're a marketroid, this is _exactly_ what you're looking for. :-( -- cgibbs@nowhere.in.particular (Charlie Gibbs) I'm switching ISPs - watch this space. ###### Message-ID: <3B9DB17C.27278C09@ev1.net> From: Charles Richmond Reply-To: richmond@ev1.net Organization: Cannine Computer Center X-Mailer: Mozilla 4.7C-CCK-MCD {C-UDP; EBM-APPLE} (Macintosh; I; PPC) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: alt.folklore.computers Subject: Re: Bus Design mistakes was Re: Minimalist design (was Re: Parity) References: <9mhjn3$7nh$1@nnrp2.phx.gblx.net> <20010905081118.0a4e2a04.steveo@eircom.net> <1bitex1pfy.fsf@cs.nmsu.edu> <9n7lkr$8p$4@bob.news.rcn.net> <9n7p84$j86$1@i4got.pechter.dyndns.org> <9n7rb5$p95$4@bob.news.rcn.net> <9nafjs$f38$6@bob.news.rcn.net> <1bheuf8331.fsf@cs.nmsu.edu> <6uvgiuiytd.fsf@chonsp.franklin.ch> <9nd2o2$i2m$2@bob.news.rcn.net> <6un1434557.fsf@chonsp.franklin.ch> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 17 Date: Tue, 11 Sep 2001 04:41:28 GMT NNTP-Posting-Host: 24.179.111.125 X-Complaints-To: abuse@home.net X-Trace: news2.rdc2.tx.home.com 1000183288 24.179.111.125 (Mon, 10 Sep 2001 21:41:28 PDT) NNTP-Posting-Date: Mon, 10 Sep 2001 21:41:28 PDT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.tele.dk!small.news.tele.dk!64.152.100.70!sjcppf01.usenetserver.com!usenetserver.com!newsfeeder.randori.com!newshub2.rdc1.sfba.home.com!news.home.com!news2.rdc2.tx.home.com.POSTED!not-for-mail Xref: chonsp.franklin.ch alt.folklore.computers:90217 Neil Franklin wrote: > > [snip...] [snip...] [snip...] > > There exists an Smithsonian Interview[1] with Gordon Bell, in which he > mentiones about trying to get Intel to build PDP-8 microprocessors > (this is 1972, when the 8008 was still fresh and the 8080 not yet on > the drawing board). > So does this have anything to do with the microprocessor that *is* a PDP-8??? I am talking about the Intersil 6100, of course. Whose idea was this...and why did it *not* become popular??? -- +-------------------------------------------------------------+ | Charles and Francis Richmond | +-------------------------------------------------------------+ ###### Message-ID: <3B9D2B95.F9F7C74C@yahoo.com> From: CBFalconer Reply-To: cbfalconer@worldnet.att.net Organization: Ched Research X-Mailer: Mozilla 4.75 [en] (Win98; U) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: alt.folklore.computers Subject: Re: Bus Design mistakes was Re: Minimalist design (was Re: Parity) References: <9mhjn3$7nh$1@nnrp2.phx.gblx.net> <20010905081118.0a4e2a04.steveo@eircom.net> <1bitex1pfy.fsf@cs.nmsu.edu> <9n7lkr$8p$4@bob.news.rcn.net> <9n7p84$j86$1@i4got.pechter.dyndns.org> <9n7rb5$p95$4@bob.news.rcn.net> <9nafjs$f38$6@bob.news.rcn.net> <1bheuf8331.fsf@cs.nmsu.edu> <6uvgiuiytd.fsf@chonsp.franklin.ch> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 49 Date: Tue, 11 Sep 2001 05:02:59 GMT NNTP-Posting-Host: 12.90.167.60 X-Complaints-To: abuse@worldnet.att.net X-Trace: bgtnsc06-news.ops.worldnet.att.net 1000184579 12.90.167.60 (Tue, 11 Sep 2001 05:02:59 GMT) NNTP-Posting-Date: Tue, 11 Sep 2001 05:02:59 GMT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!surfnet.nl!news.stealth.net!204.127.161.2.MISMATCH!wn2feed!worldnet.att.net!135.173.83.71!wnfilter1!worldnet-localpost!bgtnsc06-news.ops.worldnet.att.net.POSTED!not-for-mail Xref: chonsp.franklin.ch alt.folklore.computers:90134 Neil Franklin wrote: > > Joe Pfeiffer writes: > > > jmfbahciv@aol.com writes: > > > > > > So that means that we could have many devices ship their interrupts > > > to one level. I'm getting the sense that PCs can't or don't (which > > > one is it) do that. > > Can't. Interrupt line sharing requires devices using open collecotr > outputs in the devices and then wire-ORing them on the bus, with an > pull-up resistor to hold "no interrupt" state, unless a device is > demanding one. It also requires an interrupt controller that reacty to > levels, not edges. > > PCs a) lack the resistors, b) have devices that drive the interrupts > with totem-pole outputs, c) an PIC programmed to edge mode, d) devices > that expect that to be so. > > > > IIRC the JMF/TW conversations, it was a > > > small matter of programming to deal with all of them. > > Something PCs do do with their software interrupt drivers (the ones > used for system calls and other hookable events). > > > Couldn't. PCI bus fixed it (along with a whole bunch of other stuff, > > PS/2 Microchannel already fixed it also, but failled in the market due > to IBMs idiotic license policy (back-pay licenses for all ISA bus machines). > > > which to be fair couldn't realistically have been done in 1981). > > It certainly could have been done. The PIC chip supports wire-OR and > level triggering on an Microchannel machine is set to that mode. > > This is not exactly rocket science. The PDP-8 already did it. > The PC simly was an awfully bad design, even for its days. So did my 8080 based systems, designed circa 1974. It doesn't require an unclear physicist to see that a limited resource should be used in a manner allowing for extension. -- Chuck F (cbfalconer@yahoo.com) (cbfalconer@XXXXworldnet.att.net) (Remove "XXXX" from reply address. yahoo works unmodified) mailto:uce@ftc.gov (for spambots to harvest) ###### Newsgroups: alt.folklore.computers Subject: Re: Bus Design mistakes was Re: Minimalist design (was Re: Parity) References: <9mhjn3$7nh$1@nnrp2.phx.gblx.net> <9nd2o2$i2m$2@bob.news.rcn.net> <6un1434557.fsf@chonsp.franklin.ch> <3B9DB17C.27278C09@ev1.net> Organization: Daedalus Consulting X-Newsreader: trn 4.0-test72 (19 April 1999) From: don@news.daedalus.co.nz (Don Stokes) Lines: 14 Message-ID: Date: Tue, 11 Sep 2001 10:57:48 GMT NNTP-Posting-Host: 203.96.144.16 X-Complaints-To: abuse@tsnz.net X-Trace: news02.tsnz.net 1000205868 203.96.144.16 (Tue, 11 Sep 2001 22:57:48 NZST) NNTP-Posting-Date: Tue, 11 Sep 2001 22:57:48 NZST Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!enews.sgi.com!news.xtra.co.nz!newsfeed01.tsnz.net!news02.tsnz.net!not-for-mail Xref: chonsp.franklin.ch alt.folklore.computers:90184 Charles Richmond wrote: >So does this have anything to do with the microprocessor that *is* a >PDP-8??? I am talking about the Intersil 6100, of course. Whose idea >was this...and why did it *not* become popular??? Too little, too late. By the time the 6100 came out (1976?), the competing 8-bitters were all capable of addressing 64 kbytes directly, while the PDP-8 architecture, designed when 4k was a *lot* of memory, couldn't. The only thing the 6100 really offered over the competition was PDP-8 compatibility; if you weren't looking for PDP-8 compatibility, the 6100 was a non-starter. -- don ###### From: Brian Inglis Newsgroups: alt.folklore.computers Subject: Re: Bus Design mistakes was Re: Minimalist design (was Re: Parity) Date: Wed, 12 Sep 2001 21:16:45 -0600 Organization: Systematic Software Lines: 21 Message-ID: References: <9mhjn3$7nh$1@nnrp2.phx.gblx.net> <20010905081118.0a4e2a04.steveo@eircom.net> <1bitex1pfy.fsf@cs.nmsu.edu> <9n7lkr$8p$4@bob.news.rcn.net> <9n7p84$j86$1@i4got.pechter.dyndns.org> <9n7rb5$p95$4@bob.news.rcn.net> <9nafjs$f38$6@bob.news.rcn.net> <1bheuf8331.fsf@cs.nmsu.edu> <6uvgiuiytd.fsf@chonsp.franklin.ch> <9nd2o2$i2m$2@bob.news.rcn.net> <6un1434557.fsf@chonsp.franklin.ch> Reply-To: Brian.dot.Inglis@SystematicSw.ab.ca NNTP-Posting-Host: h-207-148-133-206.dial.cadvision.com Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: news3.cadvision.com 1000351006 11215 207.148.133.206 (13 Sep 2001 03:16:46 GMT) X-Complaints-To: news@cadvision.com NNTP-Posting-Date: Thu, 13 Sep 2001 03:16:46 +0000 (UTC) X-Newsreader: Forte Agent 1.8/32.548 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.tele.dk!small.news.tele.dk!199.60.229.5!newsfeed.direct.ca!look.ca!west2.newsfeed.sprint-canada.net!nntp.cadvision.com!207.228.64.17.MISMATCH!not-for-mail Xref: chonsp.franklin.ch alt.folklore.computers:90291 On 10 Sep 2001 14:11:32 +0200, Neil Franklin wrote: >Total blue sky: if DEC had done more 9/15s instead of 11 (advert >theme: why put up with 16 bits if you can have 18?) and migrated >to 10 instead of making VAX, and Intel had produced them... I did find it hard going back to a 32K int from a 128K int, but getting rid of 5/7 ASCII split across two words was a pleasure -- the 9 bit byte would have reduced that problem, and maybe some low/high byte instructions. OTOH using the PDP-11 registers, instructions, addressing modes and byte addressability were a pleasure after the accumulator architecture. Thanks. Take care, Brian Inglis Calgary, Alberta, Canada -- Brian.Inglis@CSi.com (Brian dot Inglis at SystematicSw dot ab dot ca) fake address use address above to reply tosspam@aol.com abuse@aol.com abuse@yahoo.com abuse@hotmail.com abuse@msn.com abuse@sprint.com abuse@earthlink.com abuse@cadvision.com abuse@ibsystems.com uce@ftc.gov spam traps