From: anton@mips.complang.tuwien.ac.at (Anton Ertl) Newsgroups: comp.arch,alt.folklore.computers Subject: Floppy drives (was: IBM copying Apple) Date: 7 Sep 2001 13:18:01 GMT Organization: Institut fuer Computersprachen, Technische Universitaet Wien Lines: 29 Sender: anton@a0.complang.tuwien.ac.at (Anton Ertl) Message-ID: <9nahe9$e19$1@news.tuwien.ac.at> References: <9mhjn3$7nh$1@nnrp2.phx.gblx.net> <9n672m$13e$1@mpoli.fi> <9n7rc2$l2$1@news.tuwien.ac.at> <9n9dsk$7pc$1@samba.rahul.net> NNTP-Posting-Host: a0.complang.tuwien.ac.at X-Newsreader: xrn 9.02 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!newsfeed00.sul.t-online.de!newsfeed01.sul.t-online.de!t-online.de!fr.clara.net!heighliner.fr.clara.net!news-hub.siol.net!newscore.univie.ac.at!aconews-feed.univie.ac.at!news.tuwien.ac.at!a0.complang.tuwien.ac.at!anton Xref: chonsp.franklin.ch alt.folklore.computers:89846 In article <9n9dsk$7pc$1@samba.rahul.net>, rhn@nicholson.com writes: >In article <9n7rc2$l2$1@news.tuwien.ac.at>, >Anton Ertl wrote: >>AFAIK 1-bits are represented by having a change in magnetic direction, >>and 0-bits are represented by having no such change. The floppy >>controller uses a phase-locked loop or somesuch to know how many zeros >>there are between two changes of direction, and that PLL readjusts >>itself when encountering a 1. So having too many 0s might cause the >>PLL to go out of sync, which is the cause of the limit on 0s. > >There was no PLL on the Apple II disk controller, just a synchronous >shift register (with clear). How was that shift register clocked? AFAIK on the Commodore drives it was clocked with a PLL, and I just assumed that it was the same on Apple drives. > The reason for the limit on 0-bits >(absence of transitions) were the bounds on the usable frequency band >of the media/head/read channel. What limited the frequencies on the low side in that system? - anton -- M. Anton Ertl Some things have to be seen to be believed anton@mips.complang.tuwien.ac.at Most things have to be believed to be seen http://www.complang.tuwien.ac.at/anton/home.html ###### From: lysse Subject: Re: Floppy drives Newsgroups: comp.arch,alt.folklore.computers References: <9mhjn3$7nh$1@nnrp2.phx.gblx.net> <9n672m$13e$1@mpoli.fi> <9n7rc2$l2$1@news.tuwien.ac.at> <9n9dsk$7pc$1@samba.rahul.net> <9nahe9$e19$1@news.tuwien.ac.at> <9namri0117j@drn.newsguy.com> Organization: lysse's domain Reply-To: lysse.news@blueyonder.co.uk User-Agent: tin/pre-1.4-980226 (UNIX) (Linux/2.2.6 (i486)) Message-ID: Lines: 12 Date: Fri, 07 Sep 2001 23:32:39 GMT NNTP-Posting-Host: 62.31.9.47 X-Complaints-To: http://www.blueyonder.co.uk/abuse X-Trace: news1.cableinet.net 999905559 62.31.9.47 (Sat, 08 Sep 2001 00:32:39 BST) NNTP-Posting-Date: Sat, 08 Sep 2001 00:32:39 BST Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!newsfeed00.sul.t-online.de!t-online.de!colt.net!newspeer.clara.net!news.clara.net!news-hub.cableinet.net!blueyonder!internal-news-hub.cableinet.net!news1.cableinet.net.POSTED!not-for-mail Xref: chonsp.franklin.ch alt.folklore.computers:90030 Tim Shoppa wrote: > Not long later, some 8" and 5.25" floppy controllers went to all-digital PLL, > where a shift register and state machine are used with a crystal clock > running at a multiple (8x or 16x) of the raw flux-change rate. This avoids > all the analog adjustments and high-precision components necessary in a > traditional PLL's in the oscillator and loop filter. Ah, it *is* possible! I wonderred if it was... Is it reliable, though? -- lysse at lysse dot co dot uk "Why are your problems always so much bigger than everyone else's?" "Because they're mine." -- Ally McBeal ###### Message-ID: <3B992911.45ECD683@trailing-edge.com> Date: Fri, 07 Sep 2001 20:07:45 -0400 From: Tim Shoppa Organization: Trailing Edge Technology X-Mailer: Mozilla 3.03Gold (X11; I; OpenVMS V7.2 AlphaServer 1200 5/533 4MB) MIME-Version: 1.0 Newsgroups: comp.arch,alt.folklore.computers Subject: Re: Floppy drives References: <9mhjn3$7nh$1@nnrp2.phx.gblx.net> <9n672m$13e$1@mpoli.fi> <9n7rc2$l2$1@news.tuwien.ac.at> <9n9dsk$7pc$1@samba.rahul.net> <9nahe9$e19$1@news.tuwien.ac.at> <9namri0117j@drn.newsguy.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 17 NNTP-Posting-Host: 63.73.218.130 X-Trace: reader2.news.uu.net 999907665 142 63.73.218.130 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.mailgate.org!zur.uu.net!ash.uu.net!spool1.news.uu.net!spool0.news.uu.net!reader2.news.uu.net!not-for-mail Xref: chonsp.franklin.ch alt.folklore.computers:90008 lysse wrote: > > Tim Shoppa wrote: > > Not long later, some 8" and 5.25" floppy controllers went to all-digital PLL, > > where a shift register and state machine are used with a crystal clock > > running at a multiple (8x or 16x) of the raw flux-change rate. This avoids > > all the analog adjustments and high-precision components necessary in a > > traditional PLL's in the oscillator and loop filter. > > Ah, it *is* possible! I wonderred if it was... Is it reliable, though? Yes, it is. In fact, this method is referred to in the Intel 8272 (aka NEC 765) app notes as being preferred over analog PLL methods. They very much poo-poo the one-shot data separator approach (which *was* used by some S-100 MFM floppy controllers, believe it or not!) Tim. ###### From: lysse Subject: Re: Floppy drives Newsgroups: comp.arch,alt.folklore.computers References: <9mhjn3$7nh$1@nnrp2.phx.gblx.net> <9n672m$13e$1@mpoli.fi> <9n7rc2$l2$1@news.tuwien.ac.at> <9n9dsk$7pc$1@samba.rahul.net> <9nahe9$e19$1@news.tuwien.ac.at> <9namri0117j@drn.newsguy.com> <3B992911.45ECD683@trailing-edge.com> Organization: lysse's domain Reply-To: lysse.news@blueyonder.co.uk User-Agent: tin/pre-1.4-980226 (UNIX) (Linux/2.2.6 (i486)) Message-ID: Lines: 15 Date: Sat, 08 Sep 2001 11:32:45 GMT NNTP-Posting-Host: 62.31.9.47 X-Complaints-To: http://www.blueyonder.co.uk/abuse X-Trace: news1.cableinet.net 999948765 62.31.9.47 (Sat, 08 Sep 2001 12:32:45 BST) NNTP-Posting-Date: Sat, 08 Sep 2001 12:32:45 BST Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!newsfeed00.sul.t-online.de!newsfeed01.sul.t-online.de!t-online.de!fr.clara.net!heighliner.fr.clara.net!diablo.netcom.net.uk!netcom.net.uk!news-hub.cableinet.net!blueyonder!internal-news-hub.cableinet.net!news1.cableinet.net.POSTED!not-for-mail Xref: chonsp.franklin.ch alt.folklore.computers:90024 Tim Shoppa wrote: > Yes, it is. In fact, this method is referred to in the Intel 8272 > (aka NEC 765) app notes as being preferred over analog PLL methods. > They very much poo-poo the one-shot data separator approach (which > *was* used by some S-100 MFM floppy controllers, believe it or not!) Reminds me of one of the WDC floppy controllers (was it the 1771?) that had its own data separator as part of the chip, but it was so unreliable that most people using the part built their own out of frustration. (btw, this is from what I've read, not experience, so please feel free to call me a know-nothing johnny-come-lately. ;-) -- lysse at lysse dot co dot uk "Why are your problems always so much bigger than everyone else's?" "Because they're mine." -- Ally McBeal ###### From: Tim Shoppa Newsgroups: comp.arch,alt.folklore.computers Subject: Re: Floppy drives (was: IBM copying Apple) Date: 7 Sep 2001 07:50:26 -0700 Organization: Newsguy News Service [http://newsguy.com] Lines: 51 Message-ID: <9namri0117j@drn.newsguy.com> References: <9mhjn3$7nh$1@nnrp2.phx.gblx.net> <9n672m$13e$1@mpoli.fi> <9n7rc2$l2$1@news.tuwien.ac.at> <9n9dsk$7pc$1@samba.rahul.net> <9nahe9$e19$1@news.tuwien.ac.at> NNTP-Posting-Host: p-192.newsdawg.com X-Newsreader: Direct Read News v2.80 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!news-hog.berkeley.edu!ucberkeley!newsfeed.stanford.edu!pln-w!spln!dex!extra.newsguy.com!newsp.newsguy.com!drn Xref: chonsp.franklin.ch alt.folklore.computers:89836 In article <9nahe9$e19$1@news.tuwien.ac.at>, anton@mips.complang.tuwien.ac.at says... > >In article <9n9dsk$7pc$1@samba.rahul.net>, > rhn@nicholson.com writes: >>In article <9n7rc2$l2$1@news.tuwien.ac.at>, >>Anton Ertl wrote: >>>AFAIK 1-bits are represented by having a change in magnetic direction, >>>and 0-bits are represented by having no such change. The floppy >>>controller uses a phase-locked loop or somesuch to know how many zeros >>>there are between two changes of direction, and that PLL readjusts >>>itself when encountering a 1. So having too many 0s might cause the >>>PLL to go out of sync, which is the cause of the limit on 0s. >> >>There was no PLL on the Apple II disk controller, just a synchronous >>shift register (with clear). > >How was that shift register clocked? AFAIK on the Commodore drives it >was clocked with a PLL, and I just assumed that it was the same on >Apple drives. The Apple GCR encoding/decoding was *largely* done in software, with a important assist by a byte-wide shift register and a bipolar-ROM based state machine in hardware. Some of the elements of phase locking were carried out in the software and with the controller ROM, but the lowest-level bit clocking was done in the drive itself. The "standard" 34-pin interface board isn't present in the Disk II drive; instead there's a custom board that contains (among all the read/write electronics) a rather traditional PLL right inside the drive box. There's a variable capacitor in the PLL that's adjusted at the factory for the VCO's center frequency. The upgrade from 13-sector (DOS 3.2) to 16-sector (DOS 3.3) was done by more efficient GCR without ever changing the media bit rate. Note that "PLL-at-the-drive" was available as an option for many Shugart (and clone) 8" and some 5.25" drives. Not long later, some 8" and 5.25" floppy controllers went to all-digital PLL, where a shift register and state machine are used with a crystal clock running at a multiple (8x or 16x) of the raw flux-change rate. This avoids all the analog adjustments and high-precision components necessary in a traditional PLL's in the oscillator and loop filter. Many home-computer style FM data separators used simple one-shots for data separation early on. Not especially high-tech or ultra-reliable, but at least the only analog adjustment was a variable resistor. Some of us who used such setups would tell you that even though it didn't have a knob, the timing capacitor was definitely variable as well! Tim. ###### From: rhn@nicholson.com Newsgroups: comp.arch,alt.folklore.computers Subject: Re: Floppy drives (was: IBM copying Apple) Date: 7 Sep 2001 23:07:34 GMT Organization: a2i network Lines: 21 Message-ID: <9nbjvm$krc$1@samba.rahul.net> References: <9mhjn3$7nh$1@nnrp2.phx.gblx.net> <9n7rc2$l2$1@news.tuwien.ac.at> <9n9dsk$7pc$1@samba.rahul.net> <9nahe9$e19$1@news.tuwien.ac.at> NNTP-Posting-Host: waltz.rahul.net NNTP-Posting-User: rhn Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.tele.dk!small.news.tele.dk!209.30.0.50!nntp.flash.net!easynews!feedwest.news.agis.net!us.telia.net!news.mainstreet.net!bug.rahul.net!samba.rahul.net!rahul.net!a2i!rhn.a2i!rhn Xref: chonsp.franklin.ch alt.folklore.computers:89980 In article <9nahe9$e19$1@news.tuwien.ac.at>, Anton Ertl wrote: > rhn@nicholson.com writes: >> The reason for the limit on 0-bits >>(absence of transitions) were the bounds on the usable frequency band >>of the media/head/read channel. > >What limited the frequencies on the low side in that system? In approximate time-domain terms, when the "one" transitions got too far apart, the slope between transitions, as read by the disk head, became too small for the edge detector to differentiate from noise. Inter-symbol interference also tended to "push" the read magnetic transistions into any big empty gaps, so greater error got introduced into the spacing of the "ones" also. IMHO. YMMV. -- Ron Nicholson rhn@nicholson.com http://www.nicholson.com/rhn/ #include // only my own opinions, etc. ###### Sender: eric@ruckus.brouhaha.com From: Eric Smith Newsgroups: comp.arch,alt.folklore.computers Subject: Re: Floppy drives (was: IBM copying Apple) References: <9mhjn3$7nh$1@nnrp2.phx.gblx.net> <9n672m$13e$1@mpoli.fi> <9n7rc2$l2$1@news.tuwien.ac.at> <9n9dsk$7pc$1@samba.rahul.net> <9nahe9$e19$1@news.tuwien.ac.at> <9namri0117j@drn.newsguy.com> Organization: Eric Conspiracy Secret Labs X-Eric-Conspiracy: There is no conspiracy. Date: 07 Sep 2001 17:36:06 -0700 Message-ID: Lines: 33 User-Agent: Gnus/5.0807 (Gnus v5.8.7) Emacs/20.7 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii NNTP-Posting-Host: ruckus.brouhaha.com X-Trace: 7 Sep 2001 17:49:23 -0700, ruckus.brouhaha.com Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.tele.dk!small.news.tele.dk!171.64.14.106!newsfeed.stanford.edu!news.kjsl.com!news.spies.com!ruckus.brouhaha.com Xref: chonsp.franklin.ch alt.folklore.computers:90047 Tim Shoppa writes: > The Apple GCR encoding/decoding was *largely* done in software, with a > important assist by a byte-wide shift register and a bipolar-ROM based > state machine in hardware. Some of the elements of phase locking were > carried out in the software and with the controller ROM, but the lowest-level > bit clocking was done in the drive itself. The "standard" 34-pin interface > board isn't present in the Disk II drive; No. The DPLL for clock recovery is implemented in the P6 or P6A state machine PROM (P6 or P6A). The drive is not involved in "bit clocking" any more than any other "standard" floppy drive is. The software is not involved in any "phase locking" for the bit timing. It only gets involved in byte-level operations when reading. For writing, it has to do a byte write every 32, 36, or 40 microseconds, depending on whether it is writing a data byte or one of two possible lengths of self-sync pattern. In either case, it never deals with anything at the bit level, because the processor is not fast enough to do so. > instead there's a custom board > that contains (among all the read/write electronics) a rather traditional > PLL right inside the drive box. There's a variable capacitor in the PLL > that's adjusted at the factory for the VCO's center frequency. If there's a PLL in the drive (and I don't recall having seen one on the schematic), I can't imagine what it's used for. The only commonly used adjustment in the drive was for the spindle motor speed. During a read, the drive electronics provides a pulse to the controller for every flux transition on the disk, just like a "standard" floppy drive. The state machine in the controller "notices" the pulses and shifts zeros and ones into the shift register, depending on the pulse timing. ###### From: genew@mail.ocis.net (Gene Wirchenko) Newsgroups: comp.arch,alt.folklore.computers Subject: Re: Floppy drives Date: Mon, 17 Sep 2001 04:45:07 GMT Organization: Posted via Supernews, http://www.supernews.com Message-ID: <3ba571d2.26444001@news.ocis.net> Reply-To: genew@mail.ocis.net References: <9mhjn3$7nh$1@nnrp2.phx.gblx.net> <9n672m$13e$1@mpoli.fi> <9n7rc2$l2$1@news.tuwien.ac.at> <9n9dsk$7pc$1@samba.rahul.net> <9nahe9$e19$1@news.tuwien.ac.at> <9namri0117j@drn.newsguy.com> <3B992911.45ECD683@trailing-edge.com> X-Newsreader: Forte Free Agent 1.1/32.230 X-Complaints-To: newsabuse@supernews.com Lines: 27 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.ifi.unizh.ch!8317712!news.imp.ch!sunqbc.risq.qc.ca!news-hog.berkeley.edu!ucberkeley!newsfeed.stanford.edu!sn-xit-01!sn-post-01!supernews.com!corp.supernews.com!not-for-mail Xref: chonsp.franklin.ch alt.folklore.computers:90489 lysse wrote: >Tim Shoppa wrote: >> Yes, it is. In fact, this method is referred to in the Intel 8272 >> (aka NEC 765) app notes as being preferred over analog PLL methods. >> They very much poo-poo the one-shot data separator approach (which >> *was* used by some S-100 MFM floppy controllers, believe it or not!) > >Reminds me of one of the WDC floppy controllers (was it the 1771?) >that had its own data separator as part of the chip, but it was so >unreliable that most people using the part built their own out of >frustration. (btw, this is from what I've read, not experience, so >please feel free to call me a know-nothing johnny-come-lately. ;-) The 1771 docs recommended the use of external data separation. Radio Shack used the internal data separation on the TRS-80 Model I Expansion Interface. I bought an external data separator board that did it right. Sincerely, Gene Wirchenko Computerese Irregular Verb Conjugation: I have preferences. You have biases. He/She has prejudices.