From: Charles Richmond Newsgroups: alt.folklore.computers Subject: Intel i860 Workstation Microprocessor Date: Mon, 13 Sep 1999 20:07:37 +0000 Organization: Cannine Computer Center Lines: 13 Message-ID: <37DD5989.51DC31EB@plano.net> Reply-To: richmond@plano.net X-Complaints-To: newsabuse@supernews.com X-Mailer: Mozilla 4.03 (Macintosh; I; 68K) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!newsfeed-zh.ip-plus.net!news.ip-plus.net!News.Amsterdam.UnisourceCS!skynet.be!diablo.theplanet.net!remarQ-uK!rQdQ!supernews.com!remarQ.com!corp.supernews.com!not-for-mail About ten years ago, Intel came out with a microprocessor designed specifically to build "workstations" around. This chip is the i860, and it had some graphics support instructions (I presume something like the MMX for the Pentium) to make it more workstation friendly. Does anyone know anything about this chip? Was it ever used in a real product? Did it have any influence on the Intel i960, which was designed specifically for embedded applications? -- +-------------------------------------------------------------+ | Charles and Francis Richmond | +-------------------------------------------------------------+ ###### Newsgroups: alt.folklore.computers Subject: Re: Intel i860 Workstation Microprocessor References: <37DD5989.51DC31EB@plano.net> X-Newsreader: NN version 6.5.0 CURRENT #119 From: werme@werme.ne.mediaone.net (Ric Werme) Lines: 33 Message-ID: Date: Tue, 14 Sep 1999 01:35:48 GMT NNTP-Posting-Host: 24.128.109.10 X-Complaints-To: abuse@mediaone.net X-Trace: wbnws01.ne.mediaone.net 937272948 24.128.109.10 (Mon, 13 Sep 1999 21:35:48 EDT) NNTP-Posting-Date: Mon, 13 Sep 1999 21:35:48 EDT Organization: Road Runner Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!enews.sgi.com!paloalto-snf1.gtei.net!news.gtei.net!newsfeed.stanford.edu!uchinews2!newsswitch.lcs.mit.edu!netnews.com!chnws02.mediaone.net!24.128.1.101!chnws05.ne.mediaone.net!24.128.44.7!wbnws01.ne.mediaone.net.POSTED!not-for-mail Charles Richmond writes: >About ten years ago, Intel came out with a microprocessor designed >specifically to build "workstations" around. This chip is the i860, >and it had some graphics support instructions (I presume something >like the MMX for the Pentium) to make it more workstation friendly. >Does anyone know anything about this chip? It's the CPU in the "Supercomputer in my garage" thread. How many of the 1200 articles at dejanews have you checked? It was really meant for graphics co-processor, the "it's a system CPU" came late. Was it ever used in a >real product? Alliant Computer used in the the FX/2800 and FX/800 (systems with up to 29 and 9 i860s). The FX/2800 was used in the Campus 800 cluster Alliant produced just before going under. It used a HIPPI interconnect that replaced a quad CPU board. An eight node system got 5 GFLOPS, about 75% theoretical on MPP Linpack. It was/is used in various graphics systems. Did it have any influence on the Intel i960, which >was designed specifically for embedded applications? I believe the two are almost entirely different. I know virtually nothing about the i960. -- Ric Werme | http://people.ne.mediaone.net/werme werme@nospam.mediaone.net | http://www.cyberportal.net/werme ^^^^^^^ delete ###### Newsgroups: alt.folklore.computers From: bdc@world.std.com (Brian Chase) Subject: Re: Intel i860 Workstation Microprocessor Message-ID: Date: Tue, 14 Sep 1999 01:51:34 GMT References: <37DD5989.51DC31EB@plano.net> Organization: HappyNet Bungalow Lines: 43 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!newsfeed-zh.ip-plus.net!news.ip-plus.net!News.Amsterdam.UnisourceCS!uunet!ams.uu.net!ffx.uu.net!world!bdc In article , Ric Werme wrote: >Charles Richmond writes: >>About ten years ago, Intel came out with a microprocessor designed >>specifically to build "workstations" around. This chip is the i860, >>and it had some graphics support instructions (I presume something >>like the MMX for the Pentium) to make it more workstation friendly. >> >>Does anyone know anything about this chip? Was it ever used in a real >>product? >Alliant Computer used in the the FX/2800 and FX/800 (systems with up to >29 and 9 i860s). The FX/2800 was used in the Campus 800 cluster Alliant >produced just before going under. It used a HIPPI interconnect that replaced >a quad CPU board. An eight node system got 5 GFLOPS, about 75% theoretical >on MPP Linpack. > >It was/is used in various graphics systems. NeXT used it in their NeXT Dimension accelerated graphics processors. They were available for use in the NeXT Cube systems. Microway (I think?) manufactured some high performance number crunching co-processors boards for PCs during the early 1990's based on the i860 as well. Old issues of Byte from that period regularly featured the the i860 co-processor boards, along with Microway's optimized Fortran and C compilers for the i860. And then of course there are the afforementioned multi-processor Intel supercomputers based on the i860. Each processing node consisted of two i860 CPUs. IIRC, one of the nodes CPUs was used for computation, the other was used for handling I/O over the high-speed fabric. The i860 was a contemporary of the i486, and I think Intel probably used a lot of the RISC experience gained from the i860 in the development of the Pentium. I'm certainly no authority, but one would probably guess this to be the case. I'm sure that the Intel folk following the newsgroup could provide more insight on the significance of the i860 in the history of Intel. -brian. -- --- Brian "JARAI" Chase | http://world.std.com/~bdc/ | VAXZilla LIVES!!! ###### From: stronic@idt.net (Randy Dawson) Newsgroups: alt.folklore.computers Subject: Re: Intel i860 Workstation Microprocessor Date: Tue, 14 Sep 1999 03:28:52 GMT Organization: Dawson & Associates, Inc. Lines: 12 Message-ID: <37deba97.6961380@news.idt.net> References: <37DD5989.51DC31EB@plano.net> Reply-To: stronic@idt.net NNTP-Posting-Host: ppp-9.ts-1.hou.idt.net Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Newsreader: Forte Agent 1.5/32.452 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!newsfeed-zh.ip-plus.net!news.ip-plus.net!News.Amsterdam.UnisourceCS!skynet.be!newsfeed.direct.ca!news.idt.net!nntp.farm.idt.net!news Intel's "CRAY on a chip" had a few design wins. I beleive the Stellar/Ardent to Stardent (later Kubota - yes, the tractor co.) merger produced a product just befor their dissolution. These machines were popular here in Houston with the 3D geophysics buisness. Oki later made a low cost machine also popular in 3D seismic work. At&T Graphic Software Labs (TARGA boards and the genesis of Truevision) had a 3D animation program for PC's called TOPAS and they sold an i960 ISA slot board as a graphics accelerator. This was dropped when the PC clock passed 50Mhz. Randy ###### From: Torsten Poulin Newsgroups: alt.folklore.computers Subject: Re: Intel i860 Workstation Microprocessor Date: Tue, 14 Sep 1999 11:41:52 +0200 Organization: Ginnungagap Lines: 16 Message-ID: <095lr7.p61.ln@platon.poulin.dk> References: <37DD5989.51DC31EB@plano.net> NNTP-Posting-Host: firewall.poulin.dk X-Trace: news101.telia.com 937302318 29048 194.19.185.98 (14 Sep 1999 09:45:18 GMT) X-Complaints-To: abuse@telia.dk NNTP-Posting-Date: 14 Sep 1999 09:45:18 GMT X-Newsreader: TIN 1.4 User-Agent: tin/pre-1.4-19990413 ("Endemoniada") (UNIX) (Linux/2.2.5-22 (i586)) Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.belnet.be!news-feed.inet.tele.dk!bofh.vszbr.cz!newsfeed101.telia.com!news101.telia.com!not-for-mail Charles Richmond wrote: > Does anyone know anything about this chip? Was it ever used in a > real product? Did it have any influence on the Intel i960, which > was designed specifically for embedded applications? It was used in the Meiko Computing Surface 1. The CS-1 has a SPARC front-end processor running SunOS The rest of the machine uses i860 and Inmos transputers (T800s I think), the latter being used for communication between the i860 boards. A neat feature of this machine is that the topology can be selected at runtime. It runs its own operating system MeikOS internally, but that is totally invisible from the point of view of the user. I briefly did a little work on a 16 processor CS-1 in Portland C/860 some years ago. -Torsten ###### From: Victor Eijkhout Newsgroups: alt.folklore.computers Subject: Re: Intel i860 Workstation Microprocessor Date: 14 Sep 1999 14:00:13 -0400 Organization: University of Tennessee Lines: 13 Message-ID: References: <37DD5989.51DC31EB@plano.net> NNTP-Posting-Host: prancer.cs.utk.edu X-Newsreader: Gnus v5.5/Emacs 20.2 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!newsfeed-zh.ip-plus.net!news.ip-plus.net!nyc-news-feed1.bbnplanet.com!news.gtei.net!easynet-tele!easynet.net!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed.usit.net!utk.edu!not-for-mail bdc@world.std.com (Brian Chase) writes: > And then of course there are the afforementioned multi-processor Intel > supercomputers based on the i860. The iPSC/860 ('supercomputer in the garage') was an 128-processor max (?) hypercube architecture. After that, they built a one-off, the Delta, which was something like 500 i860 processors in a grid. The real supercomputer was the Paragon, which could have at least 2000 processors. I believe the one in Oak Ridge had that many. Later Paragons used Pentium chips. -- Victor Eijkhout ###### From: mww@merant.com (Michael Wojcik) Newsgroups: alt.folklore.computers Subject: Re: Intel i860 Workstation Microprocessor Date: 14 Sep 1999 21:42:59 GMT Organization: MERANT Inc. Lines: 33 Message-ID: <7rmfh3$25ed@news1.newsguy.com> References: <37DD5989.51DC31EB@plano.net> Reply-To: michael.wojcik@merant.com NNTP-Posting-Host: p-053.newsdawg.com X-Newsreader: xrn 9.00 Originator: mww@lorelei-n Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!howland.erols.net!nntp2.lotsanews.com.MISMATCH!pln-e!spln!extra.newsguy.com!newsp.newsguy.com!mww In article , bdc@world.std.com (Brian Chase) writes: > The i860 was a contemporary of the i486, and I think Intel probably used a > lot of the RISC experience gained from the i860 in the development of the > Pentium. I'm certainly no authority, but one would probably guess this to > be the case. I'm sure that the Intel folk following the newsgroup could > provide more insight on the significance of the i860 in the history of > Intel. I was working for IBM CSC when the i860 came out, and I recall someone remarking at the time that the 486 was the best CISC processor ever made, and i860 was the worst RISC processor ever made, but the i860 could outperform the 486 handily nonetheless. That's not really fair to the i860, and certainly debatable about the 486, but the basic idea was more or less confirmed by the move to RISC-in- CISC's-clothing with the Pentium. At the time, though, the RISC-vs-CISC war was still going strong. Of course, at the time IBM was pushing the RIOS, the first commercial implementation of the POWER architecture, so all other CPU architectures were scorned anyway. -- Michael Wojcik michael.wojcik@merant.com AAI Development, MERANT (block capitals are a company mandate) Department of English, Miami University Shakespeare writes bombast and knows it; Mr Thomas writes bombast and doesn't. That is the difference. -- Geoffrey Johnson ###### From: brucehoult@pobox.com (Bruce Hoult) Newsgroups: alt.folklore.computers Subject: Re: Intel i860 Workstation Microprocessor Date: Wed, 15 Sep 1999 01:21:52 +1200 Organization: The Internet Group Ltd Lines: 17 Message-ID: References: <37DD5989.51DC31EB@plano.net> NNTP-Posting-Host: macinnat.static.star.net.nz X-Newsreader: MT-NewsWatcher 2.4.4 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.belnet.be!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed.berkeley.edu!ihug.co.nz!brucehoult In article <37DD5989.51DC31EB@plano.net>, richmond@plano.net wrote: > Does anyone know anything about this chip? Was it ever used in a > real product? As recently as two years ago, I had a contract job doing C++ programming on a Stratus fault-tolerant computer which was a quad-i860 machine. At one point I was tracking down what I suspected to be a compiler bug and had cause to look at assembly dumps in gdb sans benefit of processor or ABI documentation. That turned out not to be a problem, as it looked like a pretty standard sort of a RISC setup and I had no trouble understanding the code well enough to find the problem (which turned out to be buffer overflow in a static constructor in a library that I inherited, which was triggered IFF strlen(argv[0]) % 32 = 1 ... arrrrggghhhh). -- Bruce ###### Newsgroups: alt.folklore.computers Subject: Re: Intel i860 Workstation Microprocessor References: <37DD5989.51DC31EB@plano.net> <37DE1D26.2986D340@egg.chips.and.spam.com> X-Newsreader: NN version 6.5.0 CURRENT #119 From: werme@werme.ne.mediaone.net (Ric Werme) Lines: 44 Message-ID: Date: Wed, 15 Sep 1999 12:10:02 GMT NNTP-Posting-Host: 24.128.109.10 X-Complaints-To: abuse@mediaone.net X-Trace: wbnws01.ne.mediaone.net 937397402 24.128.109.10 (Wed, 15 Sep 1999 08:10:02 EDT) NNTP-Posting-Date: Wed, 15 Sep 1999 08:10:02 EDT Organization: Road Runner Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.belnet.be!newspump.monmouth.com!newspeer.monmouth.com!netnews.com!chnws02.mediaone.net!24.128.1.101!chnws05.ne.mediaone.net!24.128.44.7!wbnws01.ne.mediaone.net.POSTED!not-for-mail fungus writes: >The really funky thing they could do was split the integer >and floating point parts of the CPU apart and run them as >two separate processors. In this mode the chip read two >instructions on each cycle and fed them to the IPU/FPU >separately. The instructions were interleaved in memory >and the CPU could enter/leave this mode of operation >under software control. It's not all that funky, the Alpha CPU does similar things, but is a couple generations further along. I.e. the cpu fetches instructions determines if they're integer/floating/bit-extract and passes them to the appropriate half (EV5) or quadrant (EV6) of the processor. Well tuned code on either i860 or Alpha is pairs of instructions. One thing that was nice on the i860 was a memory pipeline and the Alliant library folks got very good at writing assembler code that had the integer side prefetching memory, the FP managing the on chip cache as a highly configurable vector processor, with the integer side getting results back to memory. A lot of the key FP routines ran at 100% of the theoretical rate, minus a little for entry/exit. I finally got a chance to do something like that when I rewrote the IP checksum routine on Alpha and got its main loop to fully dual issue. >Another weird thing was the floating point division. >It had a ROM table to calculate the reciprocal of >a number to a few decimal places. That was obviously useful. The reciprocal square root instruction amazed me, but I'm sure some FP code must have benefited from it. Working in the Unix kernel, we weren't allowed to use FP, so we wouldn't have to save/restore the FP pipeline when handling interrupts or system calls. That made context switching and exception handling horrendous - Alliant was about the only company that did it well, though I heard from someone else (Stratus?) that they figured it out. Intel never did, one of many reasons for its few design wins. -- Ric Werme | http://people.ne.mediaone.net/werme werme@nospam.mediaone.net | http://www.cyberportal.net/werme ^^^^^^^ delete ###### Newsgroups: alt.folklore.computers Subject: Re: Intel i860 Workstation Microprocessor References: <37DD5989.51DC31EB@plano.net> X-Newsreader: NN version 6.5.0 CURRENT #119 From: werme@werme.ne.mediaone.net (Ric Werme) Lines: 19 Message-ID: Date: Wed, 15 Sep 1999 12:15:49 GMT NNTP-Posting-Host: 24.128.109.10 X-Complaints-To: abuse@mediaone.net X-Trace: wbnws01.ne.mediaone.net 937397749 24.128.109.10 (Wed, 15 Sep 1999 08:15:49 EDT) NNTP-Posting-Date: Wed, 15 Sep 1999 08:15:49 EDT Organization: Road Runner Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!feed2.nntp.acc.ca!feed.nntp.acc.ca!netnews.com!chnws02.mediaone.net!24.128.1.101!chnws05.ne.mediaone.net!24.128.44.7!wbnws01.ne.mediaone.net.POSTED!not-for-mail bdc@world.std.com (Brian Chase) writes: >The i860 was a contemporary of the i486, and I think Intel probably used a >lot of the RISC experience gained from the i860 in the development of the >Pentium. Among the things Intel told Alliant was that they were going to use the i860 line as "testbed" for new technologies and use that experience in the next x86 designs. However, chips and x86 were job 1, and they never developed good support for i860 and software. Alpha may have had something to do with that - Alliant was even talking to DEC about switching to Alpha. I also heard that Windows NT's "NT" didn't stand for new technology, but for "N10", the stepping rev of the first commercial i860. However, the N10 was late, so NT went back to x86. Just a rumor, not folklore. -- Ric Werme | http://people.ne.mediaone.net/werme werme@nospam.mediaone.net | http://www.cyberportal.net/werme ^^^^^^^ delete ###### Path: chonsp.franklin.ch!usenet From: Neil Franklin Newsgroups: alt.folklore.computers Subject: Re: Intel i860 Workstation Microprocessor Date: 15 Sep 1999 18:20:07 +0200 Organization: My own Private Self Lines: 32 Sender: neil@chonsp.franklin.ch Message-ID: <6ulna8jgeg.fsf@chonsp.franklin.ch> References: <37DD5989.51DC31EB@plano.net> X-Newsreader: Gnus v5.3/Emacs 19.34 werme@werme.ne.mediaone.net (Ric Werme) writes: > > I also heard that Windows NT's "NT" didn't stand for new technology, but > for "N10", I have also. > the stepping rev of the first commercial i860. Actually project name of the 860, I read. P[1-5] being [1-5]86 and P9 being the 386SX. > However, the N10 was late, so NT went back to x86. The reason I got quoted was that the 860s interrupt response time was somewhere around 200us, too long to make an next generation PC out of it. > Just a rumor, not folklore. Source for above: Robert Dewar/Matthew Smosna, Microprocessors - A Programmers View McGraw-Hill, 1990, ISBM 0-07-016638-2 -- Neil Franklin, Nerd, Geek, Unix Wizzard and Guru, Hacker, Mystic neil@franklin.ch.remove http://neil.franklin.ch/ Computer: toy that speeds work, so you have more time to play with it ###### From: Tim Shoppa Newsgroups: alt.folklore.computers Subject: Re: Intel i860 Workstation Microprocessor Date: Wed, 15 Sep 1999 15:57:49 -0400 Organization: Trailing Edge Technology Lines: 10 Message-ID: <37DFC1FD.5B5C3344@trailing-edge.com> References: <37DD5989.51DC31EB@plano.net> <37DE1D26.2986D340@egg.chips.and.spam.com> NNTP-Posting-Host: timaxp.trailing-edge.com Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: ffx2nh5.news.uu.net 937425481 14136 63.73.218.130 (15 Sep 1999 19:58:01 GMT) X-Complaints-To: news@ffx2nh5.news.uu.net NNTP-Posting-Date: 15 Sep 1999 19:58:01 GMT X-Mailer: Mozilla 3.03Gold (X11; I; OpenVMS V7.0 DEC 3000 Model 300L) Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.belnet.be!colt.net!easynet-tele!easynet.net!tank.news.pipex.net!pipex!uunet!zur.uu.net!ffx.uu.net!ffx2nh5!not-for-mail Ric Werme wrote: > That was obviously useful. The reciprocal square root instruction > amazed me, but I'm sure some FP code must have benefited from it. The reciprocal square root instruction is there for folks (like me) who have codes that normalize vectors all day long. Folks running Office 2000 probably don't make that much use of them (though who knows what makes that dancing paperclip work!) Tim. ###### Newsgroups: alt.folklore.computers Subject: Re: Intel i860 Workstation Microprocessor References: <37DD5989.51DC31EB@plano.net> <6ulna8jgeg.fsf@chonsp.franklin.ch> X-Newsreader: NN version 6.5.0 CURRENT #119 From: werme@werme.ne.mediaone.net (Ric Werme) Lines: 23 Message-ID: Date: Thu, 16 Sep 1999 03:53:10 GMT NNTP-Posting-Host: 24.128.109.10 X-Complaints-To: abuse@mediaone.net X-Trace: wbnws01.ne.mediaone.net 937453990 24.128.109.10 (Wed, 15 Sep 1999 23:53:10 EDT) NNTP-Posting-Date: Wed, 15 Sep 1999 23:53:10 EDT Organization: Road Runner Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.belnet.be!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!netnews.com!chnws02.mediaone.net!24.128.1.101!chnws05.ne.mediaone.net!24.128.44.7!wbnws01.ne.mediaone.net.POSTED!not-for-mail Neil Franklin writes: >werme@werme.ne.mediaone.net (Ric Werme) writes: >> However, the N10 was late, so NT went back to x86. >The reason I got quoted was that the 860s interrupt response time was >somewhere around 200us, too long to make an next generation PC out of it. I don't know what Alliant's timings were, but for cases where we didn't have to save/restore the floating point pipeline, I it was much faster. With the save/restore, 200 usec still sounds high, but it's believable. >Source for above: >Robert Dewar/Matthew Smosna, Microprocessors - A Programmers View > McGraw-Hill, 1990, ISBM 0-07-016638-2 Oh good. Sounds much more authoritative than my sources. -- Ric Werme | http://people.ne.mediaone.net/werme werme@nospam.mediaone.net | http://www.cyberportal.net/werme ^^^^^^^ delete