Newsgroups: alt.folklore.computers From: munn@bigfoot.com (Thomas Munn) Subject: Why can't we have ac operated cpus? X-Newsreader: News Xpress 2.01 Lines: 4 Message-ID: Date: Tue, 09 Feb 1999 14:59:07 GMT NNTP-Posting-Host: 206.141.246.251 X-Trace: nntp0.detroit.mi.ameritech.net 918572529 206.141.246.251 (Tue, 09 Feb 1999 10:02:09 EDT) NNTP-Posting-Date: Tue, 09 Feb 1999 10:02:09 EDT Organization: Ameritech.Net www.ameritech.net Complaints: abuse@ameritech.net Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.belnet.be!news-feed.inet.tele.dk!bofh.vszbr.cz!howland.erols.net!news.maxwell.syr.edu!ameritech.net!nntp0.detroit.mi.ameritech.net.POSTED!thomasmu I have often been curious as to why we use DC instead of AC in cpus? Is that alternating current bad for clock chips? THomas ###### From: Greg Menke Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: 09 Feb 1999 10:37:28 -0500 Lines: 24 Sender: SHOP_PC@SHOP Message-ID: References: X-Trace: GKmiOpJ1qHipRvBfW0qfc3r+5OeJxPQ6lSBKgiY0QsM= X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 9 Feb 1999 15:36:37 GMT X-Newsreader: Gnus v5.5/Emacs 20.3 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!newscore.univie.ac.at!howland.erols.net!master.news.rcn.net!not-for-mail munn@bigfoot.com (Thomas Munn) writes: > I have often been curious as to why we use DC instead of AC in cpus? Is that > alternating current bad for clock chips? > > THomas The cpu clock itself can be viewed as AC, although strictly speaking its a pulsating DC signal. I imagine RF and AC circuit design are intrinsic in all modern, faster CPUs and chipsets. An ee I know does stuff with embedded PCI, he says it places reliance on signal reflections across the PCI bus to increase the signal slew rates (the speed at which the voltage changes from low to hi or vice versa- faster is better, but it can cause other problems). Dealing with reflections is a topic dealt with by transmission line theory, which is exclusively AC in nature. The 60 cycle AC from the power mains has been often used to help syncronize the CPU clock- because its pretty stable, and since its already there, you don't have to design in a stable reference circuit. A "pure" DC cpu wouldn't work because it would have no clock. I wonder how an analog computer would be classified in this context... Gregm ###### Message-ID: <36C015C2.493BE758@trailing-edge.com> From: Tim Shoppa Organization: Trailing Edge Technology X-Mailer: Mozilla 3.03Gold (X11; I; OpenVMS V7.0 DEC 3000 Model 300L) MIME-Version: 1.0 Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? References: Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 23 Date: Tue, 09 Feb 1999 11:02:26 -0400 NNTP-Posting-Host: 198.232.144.27 X-Trace: audrey2.cais.com 918576664 198.232.144.27 (Tue, 09 Feb 1999 11:11:04 EDT) NNTP-Posting-Date: Tue, 09 Feb 1999 11:11:04 EDT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!isdnet!netnews.com!feeder.qis.net!nntp.abs.net!nntp.primenet.com!in1.nntp.cais.net!199.0.216.204.MISMATCH!audrey2.cais.com!not-for-mail Thomas Munn wrote: > > I have often been curious as to why we use DC instead of AC in cpus? Is that > alternating current bad for clock chips? It depends on what you want to call "alternating current". Many of the early MOS mircroprocessors used clock signals that went between positive and negative voltages (witness the 8080A and its special clock driver circuits.) It was considered a major leap in system design when CPU logic became +5V only in the mid/late 70's. A few years later new DRAM's stopped requiring -5V and -12V as well. If by "alternating current" you mean "120 VAC", let me assure you that if you build your CPU entirely out of AC relays, you can run it off of 120VAC. Take a look at any relay-controlled industrial system or elevator if you want proof :-). -- Tim Shoppa Email: shoppa@trailing-edge.com Trailing Edge Technology WWW: http://www.trailing-edge.com/ 7328 Bradley Blvd Voice: 301-767-5917 Bethesda, MD, USA 20817 Fax: 301-767-5927 ###### From: dcurry@silo.csci.unt.edu (David Mason Curry) Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: 9 Feb 1999 16:01:17 GMT Organization: University of North Texas Lines: 17 Message-ID: <79pm4d$6hs@hermes.acs.unt.edu> References: NNTP-Posting-Host: silo.csci.unt.edu X-Newsreader: TIN [version 1.2 PL2] Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.belnet.be!news-feed.inet.tele.dk!bofh.vszbr.cz!europa.clark.net!4.1.16.34!cpk-news-hub1.bbnplanet.com!news.gtei.net!cs.utexas.edu!news.unt.edu!silo.csci.unt.edu!dcurry Well, AC wouldn't jive too well with the common crystal clock setup, but your idea is nevertheless brilliant in that we would no longer need a clock! Actually, most everything in your computer is operating in AC, although the waveform is not sinusoidal. However, a constant reference voltage is required for more than one reason, hence DC is used. Without a consistant reference voltage, what would you use for logic values? Maybe the phase difference? Creating purely AC flip-flops, let alone registers or memory would be interesting and challinging, to say the least! Cheers, David Curry Thomas Munn (munn@bigfoot.com) wrote: : I have often been curious as to why we use DC instead of AC in cpus? Is that : alternating current bad for clock chips? : THomas ###### Path: chonsp.franklin.ch!usenet From: Neil Franklin Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: 09 Feb 1999 18:58:55 +0100 Organization: My own Private Self Lines: 39 Sender: neil@chonsp.franklin.ch Message-ID: References: X-Newsreader: Gnus v5.3/Emacs 19.34 munn@bigfoot.com (Thomas Munn) writes: > > I have often been curious as to why we use DC instead of AC in cpus? Perhaps something to do with them 100 or 120 power faillures pro second that are sort of unavoidable with AC. And you can't bridge over them with capacitors, because the reversed voltage after them will suck the capacitor empty, simply delaying the outage. For "heavy industry" such as glowbulbs or electric motors this does not matter, but for an CPU pushing MIPS losing power for thousands of clock pulses is sorta bad. If you rectify the voltage and then use capacitors, then you have got DC, which is what works. I suppose an computer using memory which holds without voltage, and an CPU being "frozen" under some minimal voltage, would work with AC, calculating in bursts. But it would still be problematic (gates are not allowed to confuse an "1" at half voltage with an "0", logic must stay same with reversed voltages) and slow (standing still 20-40% of the time. But DC is superiour for logic circuits. > Is that alternating current bad for clock chips? No worse than for any other logic circuit. -- Neil Franklin, Nerd, Geek, Unix Guru, Hacker, Mystic neil@franklin.ch.remove http://neil.franklin.ch/ Programming: when you stop hammering around on the computer as if it were a piece of dumb matter and instead tell it what to do for you ###### From: "Donald Tees" Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: Tue, 9 Feb 1999 12:31:38 -0500 Organization: IGS - Information Gateway Services Lines: 13 Message-ID: <79pr34$6ht$1@news.igs.net> References: NNTP-Posting-Host: ttye0c.kw.igs.net X-Trace: news.igs.net 918581156 6717 206.248.37.140 (9 Feb 1999 17:25:56 GMT) X-Complaints-To: abuse@igs.net NNTP-Posting-Date: 9 Feb 1999 17:25:56 GMT X-Newsreader: Microsoft Outlook Express 4.72.2106.4 X-MimeOLE: Produced By Microsoft MimeOLE V4.72.2106.4 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!newsfeed-zh.ip-plus.net!news.ip-plus.net!News.Amsterdam.UnisourceCS!skynet.be!isdnet!logbridge.uoregon.edu!cyclone.bc.net!torn!nntp.igs.net!news.igs.net!not-for-mail The problem with AC in the CPU is that the ones change to zeros and the zeros change to ones sixty times per second. They make ideal management machines, but are difficult to program. Your timing has to be just right . Thomas Munn wrote in message ... >I have often been curious as to why we use DC instead of AC in cpus? Is that >alternating current bad for clock chips? > >THomas ###### From: Greg Menke Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: 09 Feb 1999 13:53:35 -0500 Lines: 36 Sender: SHOP_PC@SHOP Message-ID: References: <79ptof$jhk$1@nnrp1.dejanews.com> X-Trace: nOBjTH7dk3LkxyQHV4DsUBOgABVd3ehLpKWXBSBab9k= X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 9 Feb 1999 18:52:44 GMT X-Newsreader: Gnus v5.5/Emacs 20.3 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!isdnet!netnews.com!feed1.news.rcn.net!rcn!master.news.rcn.net!not-for-mail stevenss@freenet.msp.mn.us writes: > > > > A "pure" DC cpu wouldn't work because it would have no clock. I wonder > > how an analog computer would be classified in this context... > > > > Gregm > > > > There are some microcontrollers produced using static, (versus dynamic) > register structures, that can operate down to DC clock rates. (many > microcontrollers use DRAM-type structures for their internal registers, which > aren't refreshed fast enough at low clock rates) I cannot recall any part > numbers right now, but the thing to look for is parts with a clock range down > to zero hertz. (i.e. 0-4 MHz). The ones that I can recall are produced in a > CMOS process. It can be convenient for the programmer to be able to > single-step through the code on the actual target processor using such a > part. Thats true, but at DC there is no clock, so the CPU is stopped. In CMOS, the DC state draws very little current, so its convienent for a low power mode in addition to single stepping. > > One boring summer day I took a 286 system with socketed clock and tried to see > how slow it could go. I remember that it would boot with a 4 MHz crystal, but > wouldn't work with a 32.768 KHz oscillator block. It booted VERY slowly at > 4MHz. If I recall, the x86 line (at least the older ones) had a min clock much > than DC. I'll look at the 286 datasheets, but its also possible that the dram/bus controllers started having trouble. Using sram, a 286 might well run as low as 32kc. Gregm ###### From: jsavard@tenMAPSONeerf.edmonton.ab.ca (John Savard) Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: Tue, 09 Feb 1999 17:33:01 GMT Organization: Videotron Communications Ltd. Lines: 26 Message-ID: <36c06fab.4472137@news.prosurfr.com> References: <79pm4d$6hs@hermes.acs.unt.edu> NNTP-Posting-Host: c9169-002.prosurfr.com X-Newsreader: Forte Free Agent 1.11/32.235 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!isdnet!howland.erols.net!newshub.northeast.verio.net!cyclone.news.idirect.com!island.idirect.com!news1.tor.metronet.ca!news1.cal.metronet.ca!news1.van.metronet.ca!news.insinc.net!stimpy.cal.sfl.net!news.videotron.ab.ca!not-for-mail >Thomas Munn (munn@bigfoot.com) wrote: >: I have often been curious as to why we use DC instead of AC in cpus? Is that >: alternating current bad for clock chips? Well, alternating current comes and goes. CPUs operate very quickly - so they'd have to use a very high frequency of AC to work. You could make a computer using AC relays - but that computer would work more slowly than 60 Hz since otherwise the power would be cut off 120 times a second. Today's computers are built from transistors, and they're made from semiconductors with dopings that impose a definite direction for DC current - originally, the simplest semiconductor device was the diode, and, although a transistor amplifies, in one sense it is a kind of fancy diode. So you would have to make every circuit twice to use AC, as well, with diode bridges at the start and end. DC is simple: AC is complex. Why do we use AC in house current, then, if AC is so bad? Because it is easy to change AC from one voltage to another with a transformer - and high voltages can go long distances over wires with less loss to resistance. Really high voltages, that you wouldn't want in your house wiring. John Savard http://www.freenet.edmonton.ab.ca/~jsavard/index.html ###### From: TheCentralScrutinizer.117@pobox.com () Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: 9 Feb 1999 18:09:07 GMT Organization: http://extra.newsguy.com Lines: 8 Message-ID: References: Reply-To: TheCentralScrutinizer.117@pobox.com NNTP-Posting-Host: edison.chisp.net X-Newsreader: slrn (0.9.3.2 UNIX) Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!newscore.univie.ac.at!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!feed1.news.rcn.net!rcn!pln-w!spln!extra.newsguy.com!newsp.newsguy.com!TheCentralScrutinizer.117 On Tue, 09 Feb 1999 14:59:07 GMT, Thomas Munn wrote: >I have often been curious as to why we use DC instead of AC in cpus? Is that >alternating current bad for clock chips? > Ask intel for a schematic for a pentium. Buy 20 million 110vac relays Build your own! ###### From: stevenss@freenet.msp.mn.us Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: Tue, 09 Feb 1999 18:11:39 GMT Organization: Deja News - The Leader in Internet Discussion Lines: 47 Message-ID: <79ptof$jhk$1@nnrp1.dejanews.com> References: NNTP-Posting-Host: 144.15.249.33 X-Article-Creation-Date: Tue Feb 09 18:11:39 1999 GMT X-Http-User-Agent: Mozilla/4.04 [en] (Win95; U) X-Http-Proxy: 1.0 webcache:3128 (Squid/2.1.PATCH2), 1.0 x13.dejanews.com:80 (Squid/1.1.22) for client 144.15.28.168, 144.15.249.33 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!newsfeed-zh.ip-plus.net!news.ip-plus.net!News.Amsterdam.UnisourceCS!masternews.telia.net!newsfeed1.swip.net!swipnet!nntp.abs.net!newsfeed.cwix.com!204.238.120.130!news-feeds.jump.net!nntp2.dejanews.com!nnrp1.dejanews.com!not-for-mail In article , Greg Menke wrote: > munn@bigfoot.com (Thomas Munn) writes: > > > I have often been curious as to why we use DC instead of AC in cpus? Is that > > alternating current bad for clock chips? > > > > THomas > > The cpu clock itself can be viewed as AC, although strictly speaking its > a pulsating DC signal. I imagine RF and AC circuit design are intrinsic > in all modern, faster CPUs and chipsets. An ee I know does stuff with > embedded PCI, he says it places reliance on signal reflections across > the PCI bus to increase the signal slew rates (the speed at which the > voltage changes from low to hi or vice versa- faster is better, but it > can cause other problems). Dealing with reflections is a topic dealt with > by transmission line theory, which is exclusively AC in nature. > > The 60 cycle AC from the power mains has been often used to help syncronize > the CPU clock- because its pretty stable, and since its already there, you > don't have to design in a stable reference circuit. > > A "pure" DC cpu wouldn't work because it would have no clock. I wonder > how an analog computer would be classified in this context... > > Gregm > There are some microcontrollers produced using static, (versus dynamic) register structures, that can operate down to DC clock rates. (many microcontrollers use DRAM-type structures for their internal registers, which aren't refreshed fast enough at low clock rates) I cannot recall any part numbers right now, but the thing to look for is parts with a clock range down to zero hertz. (i.e. 0-4 MHz). The ones that I can recall are produced in a CMOS process. It can be convenient for the programmer to be able to single-step through the code on the actual target processor using such a part. One boring summer day I took a 286 system with socketed clock and tried to see how slow it could go. I remember that it would boot with a 4 MHz crystal, but wouldn't work with a 32.768 KHz oscillator block. It booted VERY slowly at 4MHz. -----------== Posted via Deja News, The Discussion Network ==---------- http://www.dejanews.com/ Search, Read, Discuss, or Start Your Own ###### From: Mike Swaim Subject: Re: Why can't we have ac operated cpus? Newsgroups: alt.folklore.computers References: <79ptof$jhk$1@nnrp1.dejanews.com> Organization: PointeCom User-Agent: tin/pre-1.4-980818 ("Laura") (UNIX) (FreeBSD/2.2.8-RELEASE (i386)) Lines: 33 Message-ID: <0_0w2.828$_b6.325@news1.giganews.com> NNTP-Posting-Date: Tue, 09 Feb 1999 14:35:08 CDT X-Trace: sv1-t5hlEnQHZvCFJPzPnOQ0B06iV/N11F63Q5dq3oLpvhilPAmc5Tjjbna/XnAU0mqGBCwgCeNOy/lkDnN!XkG5cyoHOz0= X-Complaints-To: abuse@GigaNews.Com X-Abuse-Info: Please be sure to forward a copy of ALL headers X-Abuse-Info: Otherwise we will be unable to process your complaint properly Date: Tue, 09 Feb 1999 20:35:08 GMT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!isdnet!newsfeed.cwix.com!207.207.0.26!nntp.giganews.com!news1.giganews.com.POSTED!not-for-mail Greg Menke wrote: : stevenss@freenet.msp.mn.us writes: :> > A "pure" DC cpu wouldn't work because it would have no clock. I wonder :> > how an analog computer would be classified in this context... :> :> There are some microcontrollers produced using static, (versus dynamic) :> register structures, that can operate down to DC clock rates. (many :> microcontrollers use DRAM-type structures for their internal registers, which :> aren't refreshed fast enough at low clock rates) I cannot recall any part :> numbers right now, but the thing to look for is parts with a clock range down :> to zero hertz. (i.e. 0-4 MHz). The ones that I can recall are produced in a :> CMOS process. It can be convenient for the programmer to be able to :> single-step through the code on the actual target processor using such a :> part. : Thats true, but at DC there is no clock, so the CPU is stopped. In CMOS, : the DC state draws very little current, so its convienent for a low power mode in : addition to single stepping. : If I recall, the x86 line (at least the older ones) had a min clock much > : than DC. I'll look at the 286 datasheets, but its also possible that the dram/bus : controllers started having trouble. Using sram, a 286 might well run as low as 32kc. I believe that some members of thr 68K family could be clocked down to 0. Some Mac laptops used this to regulate power consumption/heat production. (And you can now get software that'll insert NOPs when your overclocked Celeron chip starts to overheat.) -- Mike Swaim, Avatar of Chaos: Disclaimer:I sometimes lie. Home: swaim@c-com.net Alum: swaim@alumni.rice.edu Quote: "Boingie"^4 Y,W&D ###### Newsgroups: alt.folklore.computers From: linley@netcom.com (Bruce James Robert Linley) Subject: Re: Why can't we have ac operated cpus? Message-ID: Organization: Megami no Belldandy-sama no deshi References: <79ptof$jhk$1@nnrp1.dejanews.com> <0_0w2.828$_b6.325@news1.giganews.com> Date: Wed, 10 Feb 1999 02:44:51 GMT Lines: 21 Sender: linley@netcom3.netcom.com Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.belnet.be!newsfeed.wirehub.nl!netnews.com!ix.netcom.com!linley In ye olden post Mike Swaim spake... > > I believe that some members of thr 68K family could be clocked down to >0. Some Mac laptops used this to regulate power consumption/heat >production. (And you can now get software that'll insert NOPs when your >overclocked Celeron chip starts to overheat.) Oh no. As if Cyrix's funky naming of processors (P166+ for a 133MHz chip because it "performs" like an Intel P166) was not bad enough. I can see desktop machines with variable clock rate CPUs. It speeds up when demand goes up and throttles back as it heats up. CPUs speeds will become as meaningful as CDROM speeds: 40X max CDROM! 666MHz max CPU! Yeesh, the potential for consumer confusion is scary. What's the minimum speed? The packaging will never say. Maybe that 5V P75 can run at 700MHz for short pulses? -- Bruce James Robert Linley | +---+---+--_ | "Tea is always bitter... but linley at netcom dot com | | |NV | UT | blood is warm and sweet." Programmer, Fortunet Inc. | \ CA \ |___ | Las Vegas, Nevada, USA ----------> \*| AZ | - Miyu ###### From: Jorge Delgado Mendoza Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: Wed, 10 Feb 1999 10:55:13 +0100 Organization: CONVEX Supercomputer S.A.E. Lines: 34 Message-ID: <36C15781.61422AEA@convex.es> References: <79ptof$jhk$1@nnrp1.dejanews.com> <0_0w2.828$_b6.325@news1.giganews.com> NNTP-Posting-Host: faramir.convex.es Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: 8bit X-Mailer: Mozilla 4.5 [en] (X11; I; Linux 2.0.36 i586) X-Accept-Language: en, Spanish/Spain, es-ES Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!newsfeed-zh.ip-plus.net!news.ip-plus.net!News.Amsterdam.UnisourceCS!masternews.telia.net!fanta!news.algonet.se!news-feed1.eu.concert.net!wendy.mad.servicom.es!news Bruce James Robert Linley wrote: > > In ye olden post Mike Swaim spake... > > > > I believe that some members of thr 68K family could be clocked down to > >0. Some Mac laptops used this to regulate power consumption/heat > >production. (And you can now get software that'll insert NOPs when your > >overclocked Celeron chip starts to overheat.) > > Oh no. As if Cyrix's funky naming of processors (P166+ for a 133MHz chip > because it "performs" like an Intel P166) was not bad enough. I can see > desktop machines with variable clock rate CPUs. It speeds up when demand > goes up and throttles back as it heats up. CPUs speeds will become as > meaningful as CDROM speeds: 40X max CDROM! 666MHz max CPU! Yeesh, the > potential for consumer confusion is scary. What's the minimum speed? The > packaging will never say. Maybe that 5V P75 can run at 700MHz for short > pulses? A bit off topic, but.. ¿What the hell has Mhz to do with CPU speed? Sure, for the _SAME_ architecture Mhz distinction means speed, but for different architectures, Mhz comparisons just make no sense. For example, a 500 Mhz Alpha 21264 is _INCREDIBLY_ faster than a 450 Mhz PII, and not a measly 10% (which is their Mhz difference). Also, a 450 Mhz Xeon IS faster than a 450Mhz PII. So, albeit I agree that the PR rating was misguiding, it is a valid solution. -- |ernar@convex.es |Windows 9x/NT are real 'Operating Systems'. They do | |Jorge Delgado Mendoza|whatever the hell they want to, whenever they feel like| |CONVEX Supercomputer |it. Thus all the rest should be called 'Co-Operating | |SPAIN |Systems' | |+34-91-531-00-95 | As seen in comp.os.linux.* | ###### From: tph@longhorn.uucp (Tom Harrington) Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: 10 Feb 1999 16:28:47 GMT Organization: Mechanist Industries Lines: 32 Message-ID: <79sc3v$jrs2@eccws1.dearborn.ford.com> References: <79ptof$jhk$1@nnrp1.dejanews.com> <0_0w2.828$_b6.325@news1.giganews.com> Reply-To: tph@rmi.net NNTP-Posting-Host: 19.53.90.53 X-Newsreader: TIN [version 1.2 PL2] Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!newscore.univie.ac.at!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsxfer3.itd.umich.edu!jobone!dailyplanet.srl.ford.com!eccws1.dearborn.ford.com!longhorn!tph Bruce James Robert Linley (linley@netcom.com) wrote: : In ye olden post Mike Swaim spake... : > : > I believe that some members of thr 68K family could be clocked down to : >0. Some Mac laptops used this to regulate power consumption/heat : >production. (And you can now get software that'll insert NOPs when your : >overclocked Celeron chip starts to overheat.) : Oh no. As if Cyrix's funky naming of processors (P166+ for a 133MHz chip : because it "performs" like an Intel P166) was not bad enough. I can see : desktop machines with variable clock rate CPUs. It speeds up when demand : goes up and throttles back as it heats up. CPUs speeds will become as : meaningful as CDROM speeds: 40X max CDROM! 666MHz max CPU! Yeesh, the : potential for consumer confusion is scary. What's the minimum speed? The : packaging will never say. Maybe that 5V P75 can run at 700MHz for short : pulses? Motorola's PowerPC already has a similar capability. It has on-chip temperature probes, and a register that can optionally be set as a threshold for "too hot". If the CPU exceeds its limit, the clock speed doesn't change, but instruction fetching becomes less frequent. IIRC it's normally one fetch/clock cycle, but it can be lowered to one fetch/ two clock cycles or lower. This cuts power consumption at the expense of performance. Really the only reason to use this feature is in a laptop, if you want maximum battery life and are willing to sacrifice performance to get it. I don't know if Apple actually uses this feature, though. -- Tom Harrington --------- tph@rmii.com -------- http://rainbow.rmii.com/~tph "I may be gibbering, but I don't feel I am wrong" --Mike Falkner Cookie's Revenge: ftp://ftp.rmi.net/pub2/tph/cookie/cookies-revenge.sit.hqx ###### From: korpela@islay.ssl.berkeley.edu (Eric J. Korpela) Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: 10 Feb 1999 17:21:30 GMT Organization: Cal Berkeley-- Space Sciences Lab Lines: 15 Message-ID: <79sf6q$o7p$1@agate.berkeley.edu> References: <79ptof$jhk$1@nnrp1.dejanews.com> <0_0w2.828$_b6.325@news1.giganews.com> NNTP-Posting-Host: islay.ssl.berkeley.edu Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!isdnet!logbridge.uoregon.edu!newsfeed.berkeley.edu!agate!islay.ssl.berkeley.edu!korpela In article , Bruce James Robert Linley wrote: > I can see >desktop machines with variable clock rate CPUs. Don't most desktops already have this capability? My 4 y.o. desktop kicks into standby after 20 minutes idle, and throttles down to a BIOS selectable clock rate. Eric -- Eric Korpela | An object at rest can never be korpela@ssl.berkeley.edu | stopped. Click for home page. ###### From: abaum@pa.dec.com (Allen J. Baum) Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: Wed, 10 Feb 1999 19:08:26 -0800 Organization: Compaq Computer Lines: 17 Message-ID: References: NNTP-Posting-Host: althea.pa.dec.com X-Newsreader: MT-NewsWatcher 2.4.4 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!newsfeed.wli.net!su-news-hub1.bbnplanet.com!su-news-feed2.bbnplanet.com!news.gtei.net!news1.digital.com!pa.dec.com!src.dec.com!abaum In article , Neil Franklin wrote: > munn@bigfoot.com (Thomas Munn) writes: > > > > I have often been curious as to why we use DC instead of AC in cpus? > > Perhaps something to do with them 100 or 120 power faillures pro > second that are sort of unavoidable with AC. Well, he didn't say 120v AC, or even 60hz AC... > But DC is superiour for logic circuits. Actually not - for some applications. It turns out that most of the zero-power (adabiatic) logic families actually use AC power supplies. Not fast, but use very close to no power at all. ###### From: william.hamblen@nashville.com (William Hamblen) Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: Wed, 10 Feb 1999 21:34:38 -0600 Organization: Posted via RemarQ, http://www.remarQ.com - Discussions start here! Lines: 6 Message-ID: References: Reply-To: william.hamblen@nashville.com NNTP-Posting-Host: 207.65.180.73 X-Trace: 918723378 4TJCV727NB449CF41C usenet53.supernews.com X-Complaints-To: newsabuse@remarQ.com X-Newsreader: TIN [version 1.2 PL2] Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!newscore.univie.ac.at!howland.erols.net!news-out.supernews.com.MISMATCH!remarQ73!supernews.com!remarQ.com!remarQ69!william.hamblen Thomas Munn (munn@bigfoot.com) wrote: : I have often been curious as to why we use DC instead of AC in cpus? Is that : alternating current bad for clock chips? It lets the magic smoke out. ###### From: hshubs@mindspring.com (Howard S Shubs) Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: Wed, 10 Feb 1999 22:51:01 -0600 Organization: MindSpring Enterprises Lines: 29 Message-ID: References: <79ptof$jhk$1@nnrp1.dejanews.com> <0_0w2.828$_b6.325@news1.giganews.com> <79sc3v$jrs2@eccws1.dearborn.ford.com> NNTP-Posting-Host: d1.56.d0.fc X-Server-Date: 11 Feb 1999 04:51:02 GMT X-Newsreader: MT-NewsWatcher 2.4.4 X-Face: "S"r{U%bs].&Ud}Pc~~~0a]M:t5l>>EN\1Faw10M9NK1Xq59wo7-"s0S+[{etQorO /Nf-Ci"i9v'MT!R8)J]N[4|2&x1r^Iq&{SB"6dknr0=+6UFb.>+{zMn_1=rw&/V+"d@* ZS5\LoW_ Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news-fra1.dfn.de!newsfeed.ecrc.net!news.maxwell.syr.edu!newsfeed.cwix.com!4.1.16.34!cpk-news-hub1.bbnplanet.com!news.gtei.net!firehose.mindspring.com!hshubs In article <79sc3v$jrs2@eccws1.dearborn.ford.com>, tph@rmi.net wrote: >Motorola's PowerPC already has a similar capability. It has on-chip >temperature probes, and a register that can optionally be set as a >threshold for "too hot". If the CPU exceeds its limit, the clock speed >doesn't change, but instruction fetching becomes less frequent. IIRC >it's normally one fetch/clock cycle, but it can be lowered to one fetch/ >two clock cycles or lower. This cuts power consumption at the expense of >performance. Really the only reason to use this feature is in a laptop, >if you want maximum battery life and are willing to sacrifice performance >to get it. I don't know if Apple actually uses this feature, though. I must be missing something. To make a chip/system go slower, give it a slower clock. Any chip can go -slower- than its rated speed. The way they rate a chip's "speed" in the first place is speed=maximum likely value test reliability while not reliable speed -= some value test reliability end while So making the chip go slower is trivial if the clock circuitry is adjustable. What am I missing? -- Howard S Shubs The Denim Adept ###### From: viro@weyl.math.psu.edu (Alexander Viro) Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: 11 Feb 1999 04:17:47 -0500 Organization: -ENOENT Lines: 9 Message-ID: <79u77r$mrk@weyl.math.psu.edu> References: <79ptof$jhk$1@nnrp1.dejanews.com> <79sc3v$jrs2@eccws1.dearborn.ford.com> NNTP-Posting-Host: weyl.math.psu.edu Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!news.cis.ohio-state.edu!news.ems.psu.edu!news3.cac.psu.edu!not-for-mail In article , Howard S Shubs wrote: >So making the chip go slower is trivial if the clock circuitry is >adjustable. What am I missing? DRAM. -- "You're one of those condescending Unix computer users!" "Here's a nickel, kid. Get yourself a better computer" - Dilbert. ###### From: Greg Menke Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: 11 Feb 1999 09:09:56 -0500 Lines: 26 Sender: SHOP_PC@SHOP Message-ID: References: <79ptof$jhk$1@nnrp1.dejanews.com> <0_0w2.828$_b6.325@news1.giganews.com> <79sc3v$jrs2@eccws1.dearborn.ford.com> X-Trace: I89vB8W8Gs7bETmBVzW3Kes2v6J8PNCLKHkNiNQigOk= X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 11 Feb 1999 14:09:11 GMT X-Newsreader: Gnus v5.5/Emacs 20.3 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!feed2.news.luth.se!luth.se!feed1.news.rcn.net!rcn!master.news.rcn.net!not-for-mail hshubs@mindspring.com (Howard S Shubs) writes: That will work until the timing specs of related equipment are exceeded. In any modern computer architecture there are loads of different clock signals from a variety of sources. Many are interrelated, so there are definite ranges that some clocks must be within. As another poster indicated, DRAM is one, I would add bus controller hardware as well. Gregm > > To make a chip/system go slower, give it a slower clock. Any chip can go > -slower- than its rated speed. The way they rate a chip's "speed" in the > first place is > > speed=maximum likely value > test reliability > while not reliable > speed -= some value > test reliability > end while > > So making the chip go slower is trivial if the clock circuitry is > adjustable. What am I missing? > -- > Howard S Shubs The Denim Adept ###### From: Mike Swaim Subject: Re: Why can't we have ac operated cpus? Newsgroups: alt.folklore.computers References: <79ptof$jhk$1@nnrp1.dejanews.com> <0_0w2.828$_b6.325@news1.giganews.com> Organization: PointeCom User-Agent: tin/pre-1.4-980818 ("Laura") (UNIX) (FreeBSD/2.2.8-RELEASE (i386)) Lines: 25 Message-ID: NNTP-Posting-Date: Thu, 11 Feb 1999 08:41:22 CDT X-Trace: sv1-zQe7F8JF7qaxIjrdcFI7gFLcNZuI532H4O+OsSC53NFMal+hBknXhJer+bRzkXdLgAr4hMG7A58AyLY!89xQH0e/wH8= X-Complaints-To: abuse@GigaNews.Com X-Abuse-Info: Please be sure to forward a copy of ALL headers X-Abuse-Info: Otherwise we will be unable to process your complaint properly Date: Thu, 11 Feb 1999 14:41:22 GMT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.belnet.be!news-feed.inet.tele.dk!bofh.vszbr.cz!howland.erols.net!outgoing.news.rcn.net.MISMATCH!feed1.news.rcn.net!rcn!nntp.giganews.com!news2.giganews.com.POSTED!not-for-mail Bruce James Robert Linley wrote: : In ye olden post Mike Swaim spake... :> :> I believe that some members of thr 68K family could be clocked down to :>0. Some Mac laptops used this to regulate power consumption/heat :>production. (And you can now get software that'll insert NOPs when your :>overclocked Celeron chip starts to overheat.) : Oh no. As if Cyrix's funky naming of processors (P166+ for a 133MHz chip : because it "performs" like an Intel P166) was not bad enough. I can see : desktop machines with variable clock rate CPUs. It speeds up when demand : goes up and throttles back as it heats up. It's already being done after a fashion by celeron overclockers. It probably won't hit mainstream users because 1) Power's not an issue (one of the reasons to do it in a laptop) 2) There's a decent amount of space inside most desktops for air circulation, and you can add a heat sink/fan combo that's twice the size of the CPU, so heat's not that big of an issue. (Heat was a problem on at least some of the Mac laptops.) -- Mike Swaim, Avatar of Chaos: Disclaimer:I sometimes lie. Home: swaim@c-com.net Alum: swaim@alumni.rice.edu Quote: "Boingie"^4 Y,W&D ###### From: tph@longhorn.uucp (Tom Harrington) Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: 11 Feb 1999 17:10:23 GMT Organization: Mechanist Industries Lines: 43 Message-ID: <79v2tv$fqq1@eccws1> References: <79ptof$jhk$1@nnrp1.dejanews.com> <0_0w2.828$_b6.325@news1.giganews.com> <79sc3v$jrs2@eccws1.dearborn.ford.com> Reply-To: tph@rmi.net NNTP-Posting-Host: 19.53.90.53 X-Newsreader: TIN [version 1.2 PL2] Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!feed2.news.luth.se!luth.se!feed1.news.rcn.net!rcn!howland.erols.net!newsxfer3.itd.umich.edu!jobone!dailyplanet.srl.ford.com!eccws1.dearborn.ford.com!longhorn!tph Howard S Shubs (hshubs@mindspring.com) wrote: : In article <79sc3v$jrs2@eccws1.dearborn.ford.com>, tph@rmi.net wrote: : >Motorola's PowerPC already has a similar capability. It has on-chip : >temperature probes, and a register that can optionally be set as a : >threshold for "too hot". If the CPU exceeds its limit, the clock speed : >doesn't change, but instruction fetching becomes less frequent. IIRC : >it's normally one fetch/clock cycle, but it can be lowered to one fetch/ : >two clock cycles or lower. This cuts power consumption at the expense of : >performance. Really the only reason to use this feature is in a laptop, : >if you want maximum battery life and are willing to sacrifice performance : >to get it. I don't know if Apple actually uses this feature, though. : I must be missing something. : To make a chip/system go slower, give it a slower clock. Any chip can go : -slower- than its rated speed. The way they rate a chip's "speed" in the : first place is : speed=maximum likely value : test reliability : while not reliable : speed -= some value : test reliability : end while : So making the chip go slower is trivial if the clock circuitry is : adjustable. What am I missing? I'm not sure, but I expect it has something to do with the way the PowerPC's execution units work. It has several pipelined units in parallel, and each stage is designed such that, when it's not processing an operation, it shuts down and draws (nearly) zero power. So dropping the frequency of instruction fetch will lower power consumption even if the clock speed stays the same. As to why Moto chose this approach rather than simply recommending a variable clock speed, I don't know. -- Tom Harrington --------- tph@rmii.com -------- http://rainbow.rmii.com/~tph "I would like to nominate Tom Harrington for Usenet sainthood!" -Leo G. Simonetta (arclgs@langate.gsu.edu) Cookie's Revenge: ftp://ftp.rmi.net/pub2/tph/cookie/cookies-revenge.sit.hqx ###### From: hshubs@mindspring.com (Howard S Shubs) Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: Thu, 11 Feb 1999 23:00:14 -0600 Organization: MindSpring Enterprises Lines: 13 Message-ID: References: <79ptof$jhk$1@nnrp1.dejanews.com> <0_0w2.828$_b6.325@news1.giganews.com> <79sc3v$jrs2@eccws1.dearborn.ford.com> NNTP-Posting-Host: d1.56.d1.27 X-Server-Date: 12 Feb 1999 04:56:39 GMT X-Newsreader: MT-NewsWatcher 2.4.4 X-Face: "S"r{U%bs].&Ud}Pc~~~0a]M:t5l>>EN\1Faw10M9NK1Xq59wo7-"s0S+[{etQorO /Nf-Ci"i9v'MT!R8)J]N[4|2&x1r^Iq&{SB"6dknr0=+6UFb.>+{zMn_1=rw&/V+"d@* ZS5\LoW_ Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!wn4feed!worldnet.att.net!4.1.16.34!cpk-news-hub1.bbnplanet.com!news.gtei.net!firehose.mindspring.com!hshubs In article , Greg Menke wrote: >That will work until the timing specs of related equipment are exceeded. >In any modern computer architecture there are loads of different clock >signals from a variety of sources. Many are interrelated, so there are >definite ranges that some clocks must be within. As another poster >indicated, DRAM is one, I would add bus controller hardware as well. So if the same clock is effectively timing the rest of the hardware too, and I assume that's the way it works, why would this be a problem? Now I'm sure I'm missing something, and I thought I understood this. -- Howard S Shubs The Denim Adept ###### From: hshubs@mindspring.com (Howard S Shubs) Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: Thu, 11 Feb 1999 23:00:56 -0600 Organization: MindSpring Enterprises Lines: 8 Message-ID: References: <79ptof$jhk$1@nnrp1.dejanews.com> <79sc3v$jrs2@eccws1.dearborn.ford.com> <79u77r$mrk@weyl.math.psu.edu> NNTP-Posting-Host: d1.56.d1.27 X-Server-Date: 12 Feb 1999 04:57:22 GMT X-Newsreader: MT-NewsWatcher 2.4.4 X-Face: "S"r{U%bs].&Ud}Pc~~~0a]M:t5l>>EN\1Faw10M9NK1Xq59wo7-"s0S+[{etQorO /Nf-Ci"i9v'MT!R8)J]N[4|2&x1r^Iq&{SB"6dknr0=+6UFb.>+{zMn_1=rw&/V+"d@* ZS5\LoW_ Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!cpk-news-hub1.bbnplanet.com!news.gtei.net!firehose.mindspring.com!hshubs In article <79u77r$mrk@weyl.math.psu.edu>, viro@weyl.math.psu.edu (Alexander Viro) wrote: > DRAM. Are you saying DRAM doesn't work off a clock tick? -- Howard S Shubs The Denim Adept ###### From: turbid@my-dejanews.com Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: Fri, 12 Feb 1999 07:07:26 GMT Organization: Deja News - The Leader in Internet Discussion Lines: 23 Message-ID: <7a0jva$g27$1@nnrp1.dejanews.com> References: <79ptof$jhk$1@nnrp1.dejanews.com> <0_0w2.828$_b6.325@news1.giganews.com> <79sc3v$jrs2@eccws1.dearborn.ford.com> NNTP-Posting-Host: 203.20.108.18 X-Article-Creation-Date: Fri Feb 12 07:07:26 1999 GMT X-Http-User-Agent: Mozilla/4.06 [en] (Win95; I) X-Http-Proxy: 1.0 x9.dejanews.com:80 (Squid/1.1.22) for client 203.20.108.18 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!newsfeed-zh.ip-plus.net!news.ip-plus.net!News.Amsterdam.UnisourceCS!masternews.telia.net!newsfeed1.swip.net!swipnet!news.idt.net!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!nntp2.dejanews.com!nnrp1.dejanews.com!not-for-mail In article , hshubs@mindspring.com (Howard S Shubs) wrote: > In article , Greg Menke wrote: > > >That will work until the timing specs of related equipment are exceeded. > >In any modern computer architecture there are loads of different clock > >signals from a variety of sources. Many are interrelated, so there are > >definite ranges that some clocks must be within. As another poster > >indicated, DRAM is one, I would add bus controller hardware as well. > > So if the same clock is effectively timing the rest of the hardware too, > and I assume that's the way it works, why would this be a problem? Now > I'm sure I'm missing something, and I thought I understood this. > -- > Howard S Shubs The Denim Adept > Refresh. -t. -----------== Posted via Deja News, The Discussion Network ==---------- http://www.dejanews.com/ Search, Read, Discuss, or Start Your Own ###### From: Greg Menke Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: 12 Feb 1999 10:27:56 -0500 Lines: 33 Sender: SHOP_PC@SHOP Message-ID: References: <79ptof$jhk$1@nnrp1.dejanews.com> <79sc3v$jrs2@eccws1.dearborn.ford.com> <79u77r$mrk@weyl.math.psu.edu> X-Trace: bfTnol8+WyPxdklzL5Z97+SEepagr/vh3waOSpAavN4= X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 12 Feb 1999 15:26:57 GMT X-Newsreader: Gnus v5.5/Emacs 20.3 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.belnet.be!newsfeed.wirehub.nl!netnews.com!feed1.news.rcn.net!rcn!master.news.rcn.net!not-for-mail hshubs@mindspring.com (Howard S Shubs) writes: No- it does for sure. With DRAM, the memory controller has to scan all the memory cells at some frequency above a known minimum to preserve their contents. Reading/Writing is sychronized with this process so things don't collide. Compare with SRAM, where there is no refresh cycle, so circuits containing SRAM are simpler. DRAM is used because its cheaper per byte. A system using DRAM will likely have a memory controller- its job is to refresh the DRAM, and handle the address decoding and selection of the proper DRAM chip. This controller uses a clock, maybe its own or derived from the CPU clock, to regulate its behavior. The DRAM requires a minimum frequency of refreshes, therefore the controller must be running at a clock which will allow it to meet that timing specification. If the controller's clock is tied to the CPU's, then changing the CPU clock could bring the controller's out of spec, causing read/write or refresh failures in the DRAM. Even if the controller has its own clock, it is likely tied to the CPU's in some mathematical relationship, so the principle likely still applies. Gregm > In article <79u77r$mrk@weyl.math.psu.edu>, viro@weyl.math.psu.edu > (Alexander Viro) wrote: > > > DRAM. > > Are you saying DRAM doesn't work off a clock tick? > -- > Howard S Shubs The Denim Adept ###### From: hawk@eyry.econ.iastate.edu (Richard E. Hawkins Esq.) Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: 12 Feb 1999 11:43:50 -0600 Organization: House of Hawkins Lines: 15 Message-ID: <7a1p8m$oun$1@eyry.econ.iastate.edu> References: <79ptof$jhk$1@nnrp1.dejanews.com> <79u77r$mrk@weyl.math.psu.edu> NNTP-Posting-Host: eyry.econ.iastate.edu Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!newscore.univie.ac.at!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed.cwix.com!128.174.5.49!vixen.cso.uiuc.edu!newsrelay.iastate.edu!news.iastate.edu!not-for-mail In article , Howard S Shubs wrote: >In article <79u77r$mrk@weyl.math.psu.edu>, viro@weyl.math.psu.edu >(Alexander Viro) wrote: >> DRAM. >Are you saying DRAM doesn't work off a clock tick? Nope. once those clock ticks get their sucker into a chip, it's all over, and no amount of flip-flopping and rotating ever works them off :) -- These opinions will not be those of ISU until it pays my retainer. ###### From: Greg Menke Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: 12 Feb 1999 22:08:58 -0500 Lines: 14 Sender: Administrator@GREGM Message-ID: References: <7a2cbd$evl@canyon.sr.hp.com> X-Trace: YT70/TKMql09f9KZ4/5bivUfBfiiB+lSpWAtmQ1gA1o= X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 13 Feb 1999 03:03:32 GMT X-Newsreader: Gnus v5.5/Emacs 20.3 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!newscore.univie.ac.at!howland.erols.net!outgoing.news.rcn.net.MISMATCH!feed1.news.rcn.net!rcn!master.news.rcn.net!not-for-mail joewest@sr.hp.com (Joe West) writes: > > The logic was magnetic-amplifier based, storage was a rotating drum memory. > It had a (1 KW?) radio transmitting tube as its clock driver. Clock frequency > was 1.414 MHz, period was .707 microseconds, waveform was sinusiodal. I spose you could cook your lunch by putting it on front of the tube... I guess that would crash the program though... You can do all kinds of stuff with a 707us instruction cycle, that sounds like a really nifty computer. Gregm ###### From: joewest@sr.hp.com (Joe West) Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: 12 Feb 1999 23:09:33 GMT Organization: Hewlett Packard Sonoma County Lines: 32 Message-ID: <7a2cbd$evl@canyon.sr.hp.com> References: NNTP-Posting-Host: wumpus.sr.hp.com X-Newsreader: TIN [version 1.2 PL2.2] Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!newsfeed.berkeley.edu!news2.best.com!news1.best.com!sdd.hp.com!col.hp.com!canyon.sr.hp.com!joewest (Gets out his D8 Caterpiller crawler to try to drag the thread sort of back to topic...) Allen J. Baum (abaum@pa.dec.com) wrote: : In article , Neil Franklin : > munn@bigfoot.com (Thomas Munn) writes: : > > I have often been curious as to why we use DC instead of AC in cpus? : Actually not - for some applications. : It turns out that most of the zero-power (adabiatic) logic families actually : use AC power supplies. Not fast, but use very close to no power at all. I once helped move a 1950's Remington SS-90 computer from the Fort Bragg (Calif) lumber mill (where it was _just_ removed from service) to the Univ. of Calif. Berkeley campus where the computer club hoped to give it a new home. This was in 1969 or '70 or so. (The computer _did_ run in its new home for a while as I recall.) The logic was magnetic-amplifier based, storage was a rotating drum memory. It had a (1 KW?) radio transmitting tube as its clock driver. Clock frequency was 1.414 MHz, period was .707 microseconds, waveform was sinusiodal. Is that sufficiently close to AC for you? One model for transistor behavior uses charge transferred into and out of the gate (FET) or emittor-base junction (BJT) to control the state of the device. Flow of current into and out of a node is typically modeled as an AC process in the "analog" world, its just that the AC is superimposed on top of a DC "bias" level. So in a sense, processors _do_ run in AC. Joe ###### From: nailed_barnacle@junkfree.hotmail.com (barnacle) Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: Sat, 13 Feb 1999 06:26:45 GMT Organization: [posted via Easynet Ltd] Lines: 29 Message-ID: <7a3610$26gc$1@quince.news.easynet.net> References: <7a2cbd$evl@canyon.sr.hp.com> NNTP-Posting-Host: nbarnes.easynet.co.uk X-Trace: quince.news.easynet.net 918887264 72204 194.154.98.206 (13 Feb 1999 06:27:44 GMT) X-Complaints-To: abuse@easynet.net NNTP-Posting-Date: 13 Feb 1999 06:27:44 GMT X-Newsreader: News Xpress 2.01 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news-fra1.dfn.de!newscore.ipf.de!newsfeed.germany.net!newsfeed.nacamar.de!easynet-tele!easynet.net!quince.news.easynet.net!egbert In article , Greg Menke wrote: >joewest@sr.hp.com (Joe West) writes: > >> >> The logic was magnetic-amplifier based, storage was a rotating drum memory. >> It had a (1 KW?) radio transmitting tube as its clock driver. Clock > frequency >> was 1.414 MHz, period was .707 microseconds, waveform was sinusiodal. > >I spose you could cook your lunch by putting it on front of the tube... I > guess that >would crash the program though... > >You can do all kinds of stuff with a 707us instruction cycle, that sounds like >a really nifty computer. > >Gregm I seem to remember articles in the late 70s/early 80s, possibly in Byte (RIP), converning a Josephson computer being designed. Supercooled superconducting junctions changing state, driven by a 500MHz clock which was *also* the power supply - hence AC power. There was much discussion of total size of box, maximum signal pathlengths in 2nS, and the size of the cooling device needed to make it superconduct. Dunno if they ever built one...IBM rings a bell... barnacle http://easyweb.easynet.co.uk/~nbarnes ###### From: hshubs@mindspring.com (Howard S Shubs) Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: Sat, 13 Feb 1999 10:55:41 -0600 Organization: MindSpring Enterprises Lines: 10 Message-ID: References: <79ptof$jhk$1@nnrp1.dejanews.com> <0_0w2.828$_b6.325@news1.giganews.com> <79sc3v$jrs2@eccws1.dearborn.ford.com> <7a0jva$g27$1@nnrp1.dejanews.com> NNTP-Posting-Host: d1.56.d6.49 X-Server-Date: 13 Feb 1999 16:55:41 GMT X-Newsreader: MT-NewsWatcher 2.4.4 X-Face: "S"r{U%bs].&Ud}Pc~~~0a]M:t5l>>EN\1Faw10M9NK1Xq59wo7-"s0S+[{etQorO /Nf-Ci"i9v'MT!R8)J]N[4|2&x1r^Iq&{SB"6dknr0=+6UFb.>+{zMn_1=rw&/V+"d@* ZS5\LoW_ Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!enews.sgi.com!su-news-feed4.bbnplanet.com!su-news-hub1.bbnplanet.com!cpk-news-hub1.bbnplanet.com!news.gtei.net!firehose.mindspring.com!hshubs In article <7a0jva$g27$1@nnrp1.dejanews.com>, turbid@my-dejanews.com wrote: >Refresh. Oops. "We don' got no... We don' gotta show... We Don' Gotta Do No Steeekin' Refresh!" -- core memory rools -- Howard S Shubs The Denim Adept ###### From: hshubs@mindspring.com (Howard S Shubs) Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: Sat, 13 Feb 1999 10:57:02 -0600 Organization: MindSpring Enterprises Lines: 7 Message-ID: References: <79ptof$jhk$1@nnrp1.dejanews.com> <79sc3v$jrs2@eccws1.dearborn.ford.com> <79u77r$mrk@weyl.math.psu.edu> NNTP-Posting-Host: d1.56.d6.49 X-Server-Date: 13 Feb 1999 16:57:02 GMT X-Newsreader: MT-NewsWatcher 2.4.4 X-Face: "S"r{U%bs].&Ud}Pc~~~0a]M:t5l>>EN\1Faw10M9NK1Xq59wo7-"s0S+[{etQorO /Nf-Ci"i9v'MT!R8)J]N[4|2&x1r^Iq&{SB"6dknr0=+6UFb.>+{zMn_1=rw&/V+"d@* ZS5\LoW_ Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!newscore.univie.ac.at!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!cpk-news-hub1.bbnplanet.com!news.gtei.net!firehose.mindspring.com!hshubs In article , Greg Menke wrote: >relationship, so the principle likely still applies. Bloody refresh! Oops. -- Howard S Shubs The Denim Adept ###### From: lisard@zetnet.co.uk Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: 13 Feb 1999 18:27:06 GMT Message-ID: <7a4g5q$85t$1@roch.zetnet.co.uk> References: NNTP-Posting-Host: man-009.dialup.zetnet.co.uk X-Trace: roch.zetnet.co.uk 918930426 8381 194.247.41.11 (13 Feb 1999 18:27:06 GMT) NNTP-Posting-Date: 13 Feb 1999 18:27:06 GMT X-Everything: Net-Tamer V 1.08X Lines: 34 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!newsfeed.uk.ibm.net!ibm.net!dispose.news.demon.net!demon!peer.news.zetnet.net!zetnet.co.uk!not-for-mail On 1999-02-12 nospam@erols.com said: :No- it does for sure. With DRAM, the memory controller has to scan :all the memory cells at some frequency above a known minimum to :preserve their contents. Reading/Writing is sychronized with this :process so things don't collide. Compare with SRAM, where there is :no refresh cycle, so circuits containing SRAM are simpler. DRAM is :used because its cheaper per byte. The frequency is generally measured in milliseconds, though, and has been tending to get longer. In addition, most DRAMs can do "hidden refresh" things without troubling the memory controller too much. However, DRAMs have traditionally been asynchronous in operation - no clock. This means that everything else has to watch out for the memory, including generating wait states and the like; all you know is that you've got 60 or 70 ns between strobing in the CAS and getting a value back. (Usually half that for strobing in the RAS, hence on-page accesses are twice as fast and to be preferred.) Now, to try and improve the memory latency, we do have SDRAMs, which are clocked - it doesn't seem to make them a whole lot faster, but it does give them a chance to synchronise properly with the bus; no more messing about with a few extra ns for propagation delays elsewhere. (This paragraph is actually a wild guess. Please correct.) Just because the memory controller has a clock doesn't give the DRAM a clock. DRAM isn't clocked until it has a clock input. Remember the Z-80, which was quite capable of keeping 64k DRAMs up to speed even though it only output a refresh count on instruction fetches (completely irregular in other words). -- Communa (lisard@zetnet.co.uk) -- you know soft spoken changes nothing ###### From: Greg Menke Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: 14 Feb 1999 22:39:34 -0500 Lines: 33 Sender: Administrator@GREGM Message-ID: References: <7a4g5q$85t$1@roch.zetnet.co.uk> X-Trace: kDMFh/X1KoaFabG1xLLDFiEsZWGRBtnM0bJgHkolqAY= X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 15 Feb 1999 03:34:08 GMT X-Newsreader: Gnus v5.5/Emacs 20.3 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!newscore.univie.ac.at!howland.erols.net!master.news.rcn.net!not-for-mail lisard@zetnet.co.uk writes: > > Now, to try and improve the memory latency, we do have SDRAMs, which are > clocked - it doesn't seem to make them a whole lot faster, but it does > give them a chance to synchronise properly with the bus; no more > messing about with a few extra ns for propagation delays elsewhere. > (This paragraph is actually a wild guess. Please correct.) I wonder about that myself- subjectively it LOOKS as if things are faster with PC100 SDRAM, but it wasn't so large a speedup as one might expect, moving from 60ns DRAM to 10ns. I pretty much lost track of PC design when EISA came out, the chips and circuitry just got way too complicated. Ever looked at some of those datasheets? Man, its a wonder anyone understands them, and I can't imagine modern chipsets are much simpler. > > Just because the memory controller has a clock doesn't give the DRAM a > clock. DRAM isn't clocked until it has a clock input. Remember the Z-80, > which was quite capable of keeping 64k DRAMs up to speed even though it > only output a refresh count on instruction fetches (completely irregular > in other words). Quite true, I was basing my statement on one of the Intel 286 era bus/ memory controllers, the 8207. It receives its clock from the CPU clock generator. Although it looks as if the 8207 could handle most any clock, I imagine the refresh action could exceed specs if the clock were changed too much without cooresponding compensation added to the 8207 configuration. Gregm ###### From: lisard@zetnet.co.uk Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: 16 Feb 1999 19:36:21 GMT Message-ID: <7achbl$gni$3@roch.zetnet.co.uk> References: NNTP-Posting-Host: man-195.dialup.zetnet.co.uk X-Trace: roch.zetnet.co.uk 919193781 17138 194.247.40.247 (16 Feb 1999 19:36:21 GMT) NNTP-Posting-Date: 16 Feb 1999 19:36:21 GMT X-Everything: Net-Tamer V 1.08X Lines: 52 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!newscore.univie.ac.at!btnet-peer!btnet!dispose.news.demon.net!demon!ayres.ftech.net!news.ftech.net!peer.news.zetnet.net!zetnet.co.uk!not-for-mail On 1999-02-14 nospam@erols.com said: :> Now, to try and improve the memory latency, we do have SDRAMs, :>which are clocked - it doesn't seem to make them a whole lot :>faster, but it does give them a chance to synchronise properly :>with the bus; no more messing about with a few extra ns for :>propagation delays elsewhere. (This paragraph is actually a wild :>guess. Please correct.) :I wonder about that myself- subjectively it LOOKS as if things are :faster with PC100 SDRAM, but it wasn't so large a speedup as one :might expect, moving from 60ns DRAM to 10ns. I pretty much lost :track of PC design when EISA came out, the chips and circuitry just :got way too complicated. I don't think it is actually 10ns access; it might be 20ns access, after you've strobed on CAS and RAS, though - or 10ns for a RAS-only cycle. I can't imagine it's 10ns, because isn't that about the same speed as cache RAM? What's the point of external cache once you get to those speeds? :Ever looked at some of those datasheets? Man, its a wonder anyone :understands them, and I can't imagine modern chipsets are much :simpler. The last time I looked at datasheets was for a 256kbit DRAM with a super-fast 120ns access time, and that was when I was 14. A whole decade ago. Nowadays I'm quite happy to leave it to the guys who are paid to do it. :> :> Just because the memory controller has a clock doesn't give the :>DRAM a clock. DRAM isn't clocked until it has a clock input. :>Remember the Z-80, which was quite capable of keeping 64k DRAMs :>up to speed even though it only output a refresh count on :>instruction fetches (completely irregular in other words). :Quite true, I was basing my statement on one of the Intel 286 era :bus/ memory controllers, the 8207. It receives its clock from the :CPU clock generator. Although it looks as if the 8207 could handle :most any clock, I imagine the refresh action could exceed specs if :the clock were changed too much without cooresponding compensation :added to the 8207 configuration. That's true, but it could well be argued that an 8207 was overkill. A lot of systems worked quite happily by either taking advantage of the "hidden refresh" (take RAS low, cycle CAS) or by letting the video controller refresh the whole of memory (C64, QL, etc). (Oops, I'm showing my history :> ) -- Communa (lisard@zetnet.co.uk) -- you know soft spoken changes nothing ###### From: "Peter Hendén" Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: Wed, 17 Feb 1999 02:07:21 +0100 Organization: Teknisk Dokumentation AB Lines: 29 Message-ID: <7ad4pp$pp1$1@zingo.tninet.se> References: <7achbl$gni$3@roch.zetnet.co.uk> NNTP-Posting-Host: du120-153.ppp.algonet.se X-Trace: zingo.tninet.se 919213689 26401 195.100.153.120 (17 Feb 1999 01:08:09 GMT) X-Complaints-To: abuse@algo.net NNTP-Posting-Date: 17 Feb 1999 01:08:09 GMT X-Newsreader: Microsoft Outlook Express 4.72.3155.0 X-MimeOLE: Produced By Microsoft MimeOLE V4.72.3155.0 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!newsfeed-zh.ip-plus.net!news.ip-plus.net!News.Amsterdam.UnisourceCS!masternews.telia.net!news.algonet.se!algonet!pepsi.tninet.se!not-for-mail lisard@zetnet.co.uk wrote: >On 1999-02-14 nospam@erols.com said: > :I wonder about that myself- subjectively it LOOKS as if things are > :faster with PC100 SDRAM, but it wasn't so large a speedup as one > :might expect, moving from 60ns DRAM to 10ns. I pretty much lost > :track of PC design when EISA came out, the chips and circuitry just > :got way too complicated. > >I don't think it is actually 10ns access; it might be 20ns access, after >you've strobed on CAS and RAS, though - or 10ns for a RAS-only cycle. I >can't imagine it's 10ns, because isn't that about the same speed as >cache RAM? What's the point of external cache once you get to those >speeds? The access time is nothing like 10 or even 20 ns - more like 50. I can't remember but there may be modes where you can read several locations in sequence for a cache refill or something, but the random access time is still 50-ish ns. Anyways, these things won't be folklore until 1Q00:-) Regards, Peter -- Peter Hendén http://www.algonet.se/~phenden ICQ: 14672398 Teknisk Dokumentation AB http://www.tdab.com ###### From: Greg Menke Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: 17 Feb 1999 10:46:41 -0500 Lines: 30 Sender: SHOP_PC@SHOP Message-ID: References: <7achbl$gni$3@roch.zetnet.co.uk> X-Trace: /alqwZcR696Fhg39cO/vRybRi+wsStVlNBbSHpXCtn0= X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 17 Feb 1999 15:45:32 GMT X-Newsreader: Gnus v5.5/Emacs 20.3 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!howland.erols.net!master.news.rcn.net!not-for-mail lisard@zetnet.co.uk writes: > :I wonder about that myself- subjectively it LOOKS as if things are > :faster with PC100 SDRAM, but it wasn't so large a speedup as one > :might expect, moving from 60ns DRAM to 10ns. I pretty much lost > :track of PC design when EISA came out, the chips and circuitry just > :got way too complicated. > > I don't think it is actually 10ns access; it might be 20ns access, after > you've strobed on CAS and RAS, though - or 10ns for a RAS-only cycle. I > can't imagine it's 10ns, because isn't that about the same speed as > cache RAM? What's the point of external cache once you get to those > speeds? I'll happily concede ignorance on this point- I've never delved into the technical details on SDRAM. > > > That's true, but it could well be argued that an 8207 was overkill. A > lot of systems worked quite happily by either taking advantage of the > "hidden refresh" (take RAS low, cycle CAS) or by letting the video > controller refresh the whole of memory (C64, QL, etc). I agree- the examples of 8207 I've seen were for somewhat larger scale applications; lots of subsystems, etc... I've never directly used DRAM myself, only SRAM. Gregm ###### From: korpela@islay.ssl.berkeley.edu (Eric J. Korpela) Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: 18 Feb 1999 00:21:55 GMT Organization: Cal Berkeley-- Space Sciences Lab Lines: 29 Message-ID: <7afmf3$554$1@agate.berkeley.edu> References: <7achbl$gni$3@roch.zetnet.co.uk> NNTP-Posting-Host: islay.ssl.berkeley.edu Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!newsfeed.berkeley.edu!agate!islay.ssl.berkeley.edu!korpela In article <7achbl$gni$3@roch.zetnet.co.uk>, wrote: >I don't think it is actually 10ns access; it might be 20ns access, after >you've strobed on CAS and RAS, though - or 10ns for a RAS-only cycle. I >can't imagine it's 10ns, because isn't that about the same speed as >cache RAM? What's the point of external cache once you get to those >speeds? Basically, SDRAM accesses aren't as simple as old DRAM accesses. Before you read or write to a bank or row you need to activate it which will take 30 ns or so. Then issue a read command and wait the CAS latency of 20 ns, following that the burst is transfered at one per cycle (10 ns for 100 MHz). So for random access and a burst length of 1 you're really talking ~50 ns per access. (Unless you've got a queue of random accesses to do, in which case you can start the next one before the data from the previous was valid, but that's not a usual memory access mode). For a cache line fill, though, you can transfer 8 or 16 per burst which reduces things to 12-15 ns per. The reason to continue having that external cache, is it can be bigger than the internal, meaning you can save 50 ns on every internal cache line load/flush. And with the processor chugging along at 500 MHz, it's not too long before the processor wants that next cache line. Eric -- Eric Korpela | An object at rest can never be korpela@ssl.berkeley.edu | stopped. Click for home page. ###### From: hawk@eyry.econ.iastate.edu (Richard E. Hawkins Esq.) Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: 18 Feb 1999 09:43:05 -0600 Organization: House of Hawkins Lines: 31 Message-ID: <7ahce9$5ku$1@eyry.econ.iastate.edu> References: <79ptof$jhk$1@nnrp1.dejanews.com> <79u77r$mrk@weyl.math.psu.edu> NNTP-Posting-Host: eyry.econ.iastate.edu Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!isdnet!newsfeed.cwix.com!128.174.5.49!vixen.cso.uiuc.edu!newsrelay.iastate.edu!news.iastate.edu!not-for-mail In article , Greg Menke wrote: >hshubs@mindspring.com (Howard S Shubs) writes: >No- it does for sure. With DRAM, the memory controller has to scan >all the memory cells at some frequency above a known minimum to >preserve their contents. Reading/Writing is sychronized with this >process so things don't collide. Compare with SRAM, where there is >no refresh cycle, so circuits containing SRAM are simpler. DRAM is >used because its cheaper per byte. Hmm, this is the first time i've had a temptation to include a picture in a posting. Dusting off some long unused brain cells, it takes six transistors to make a static memory bit. I'd try to draw the picture, but i don't even remember the exact combination. It comes down to (i think) four set up as two pairs such that one pair is high, and the other low, and the other two allow data in & out. Dynamic ram needs a single capacitor; either it has a charge, or it doesn't. The transistors in dram are actually used as capacitors, as they're easier & cheaper to fabricate. Whichever you use, charge bleeds off, and it is necessary to "refresh," which recharges the charged cells. rick -- These opinions will not be those of ISU until it pays my retainer. ###### From: hawk@eyry.econ.iastate.edu (Richard E. Hawkins Esq.) Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: 23 Feb 1999 13:08:34 -0600 Organization: House of Hawkins Lines: 21 Message-ID: <7auubi$18i$1@eyry.econ> References: <7a4g5q$85t$1@roch.zetnet.co.uk> NNTP-Posting-Host: eyry.econ.iastate.edu Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!news-peer1.sprintlink.net!news.sprintlink.net!vixen.cso.uiuc.edu!newsrelay.iastate.edu!news.iastate.edu!not-for-mail In article <7a4g5q$85t$1@roch.zetnet.co.uk>, wrote: >Just because the memory controller has a clock doesn't give the DRAM a >clock. DRAM isn't clocked until it has a clock input. Remember the Z-80, >which was quite capable of keeping 64k DRAMs up to speed even though it >only output a refresh count on instruction fetches (completely irregular >in other words). It couldn't do the 64k's, could it? Seems to me that they needed 8 bits of refresh, while the Z80 only provided 6 (or was it the 7 needed by the 16k's?) Come to think of it, i don't recall seeing a z80 (or any other 8 bit [maybe C64? after my time . . .]) that used 64k's; they weren't practical until 83 or 84, at which point the z80 wasn't making it into new designs (though it was still being sold in older models). rick -- These opinions will not be those of ISU until it pays my retainer. ###### Newsgroups: alt.folklore.computers From: bill@bilver.magicnet.netREMOVETHIS (Bill Vermillion) Subject: Re: Why can't we have ac operated cpus? Organization: W.J.Vermillion - Orlando / Winter Park Message-ID: References: <7a4g5q$85t$1@roch.zetnet.co.uk> <7auubi$18i$1@eyry.econ> Date: Wed, 24 Feb 1999 15:06:23 GMT Lines: 72 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!feed2.news.luth.se!luth.se!cam-news-hub1.bbnplanet.com!cpk-news-hub1.bbnplanet.com!news.gtei.net!feed1.news.rcn.net!rcn!news.magicnet.net!bilver.magicnet.net!bill In article <7auubi$18i$1@eyry.econ>, Richard E. Hawkins Esq. wrote: >In article <7a4g5q$85t$1@roch.zetnet.co.uk>, >wrote: > >>Just because the memory controller has a clock doesn't give the >>DRAM a clock. DRAM isn't clocked until it has a clock input. >>Remember the Z-80, which was quite capable of keeping 64k DRAMs up >>to speed even though it only output a refresh count on instruction >>fetches (completely irregular in other words). >It couldn't do the 64k's, could it? Seems to me that they needed >8 bits of refresh, while the Z80 only provided 6 (or was it the 7 >needed by the 16k's?) >Come to think of it, i don't recall seeing a z80 (or any other 8 >bit [maybe C64? after my time . . .]) that used 64k's; they weren't >practical until 83 or 84, at which point the z80 wasn't making it >into new designs (though it was still being sold in older models). Well just 'cause you haven't seen it doesn't mean they didn't exist. I had (two still here need to be looked at) a Max80 by Lobo Systems. It was a Radio Shack Model I work alike with the LDOS operating system. 5MHz Z80B, Z80SIO - capable of 500000bits/sec. Built in RTC. Floppy controller(s) to handle four 5.25" drives and four 8" drives at the SAME time. It used the SASI interface (later renamed SCSI) and a very early adaptec contoller card if you wanted hard drives. Two serial ports, parallel port. 128K of RAM. In the CPM 2.2 you'd bank switch the top portions in an out. In the Radio Shack mode all the system overlays were stored in a 68K Ram disk. I remember how the first IMB people were RAVING!!!! about how fast their hard drives were - WOW 69KB/sec was about the top in the first ones. Slow access and a 6:1 interleave. I was using 8" floppies with a 1:1 interleave and getting a bit over 50KB/sec meant that to me the HD's werent that much faster, considering their cost. Eight inch floppies were about $4 each then, at 1.2MB. $40 bought you 48MB storage. A 20MB HD in those days was about $500. It is amazing how much work you can accomplish in a strictly character based world with minimal horsepower. One of the favorite demo's at Lobo - to show how fast it was - was to run a program that basically was speed limited by the gawd-awful display design of the PC's. They'd load a BASCI program from floppy into the PC, and type run. Then they'd walk across the room and TYPE IN the same program. It was just a loop of 1 to 1000, and printing the numbers to the screen. The Max would always finish well ahead of the PC because of it's memory mapped video. In real live, running a program with no output to screen showed virutally no difference between the 4.7MHz 8088 and the 5MHz Z80. -- Bill Vermillion bv @ wjv.com ###### From: lisard@zetnet.co.uk Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: 24 Feb 1999 20:00:23 GMT Message-ID: <7b1lon$en5$2@roch.zetnet.co.uk> References: <7auubi$18i$1@eyry.econ> NNTP-Posting-Host: man-138.dialup.zetnet.co.uk X-Trace: roch.zetnet.co.uk 919886423 15077 194.247.40.176 (24 Feb 1999 20:00:23 GMT) NNTP-Posting-Date: 24 Feb 1999 20:00:23 GMT X-Everything: Net-Tamer V 1.08X Lines: 33 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!feed2.news.luth.se!luth.se!newsfeed.ecrc.net!dispose.news.demon.net!demon!peer.news.zetnet.net!zetnet.co.uk!not-for-mail On 1999-02-23 hawk@eyry.econ.iastate.edu(RichardE.HawkinsEsq.) said: :In article <7a4g5q$85t$1@roch.zetnet.co.uk>, :wrote: :>Just because the memory controller has a clock doesn't give the :>DRAM a clock. DRAM isn't clocked until it has a clock input. :>Remember the Z-80, which was quite capable of keeping 64k DRAMs up :>to speed even though it only output a refresh count on instruction :>fetches (completely irregular in other words). :It couldn't do the 64k's, could it? Seems to me that they needed :8 bits of refresh, while the Z80 only provided 6 (or was it the 7 :needed by the 16k's?) 7 bits. The top bit was (iirc) an offandonagain bit. :Come to think of it, i don't recall seeing a z80 (or any other 8 bit :[maybe C64? after my time . . .]) that used 64k's; they weren't :practical until 83 or 84, at which point the z80 wasn't making it :into new designs (though it was still being sold in older models). I own a computer that uses a Z80 in conjunction with 64k RAMs, a Memotech MTX512 (and if someone could give or sell me an FDX or SDX I'd be a very happy Communa indeed). I'd have to check, but I think it uses a flip-flop connected to the top of the 7 bits to refresh the whole lot. And somewhere I have the schematic for a Z80B board which has 256k RAM, again using a 2-bit counter to cover the missing bits (although as I too vaguely recall, 256k RAMs only require an 8-bit refresh circuit, as they refresh both halves at once). OK, it was designed in around 1982 (maybe 83), but it was there. :> -- Communa (lisard@zetnet.co.uk) -- you know soft spoken changes nothing ###### From: don@news.daedalus.co.nz (Don Stokes) Newsgroups: alt.folklore.computers Subject: Re: Why can't we have ac operated cpus? Date: 25 Feb 1999 09:13:22 GMT Organization: Daedalus Consulting Lines: 18 Message-ID: <7b347i$l20$1@news.wlg.netlink.net.nz> References: <7a4g5q$85t$1@roch.zetnet.co.uk> <7auubi$18i$1@eyry.econ> NNTP-Posting-Host: toyunix.zl2tnm.gen.nz Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!newscore.univie.ac.at!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed.cwix.com!203.97.37.7!newsfeed.clear.net.nz!news.wlg.netlink.net.nz!don Bill Vermillion wrote: >The Max would always finish well ahead of the PC because of it's >memory mapped video. Erm, the PC has memory mapped video too. But the BIOS calls to update it were just *bad*. And never got better. That's one of the big reasons MS-DOS capable but not-PC-compatible machines failed -- all the code being produced for the PC had to go straight to the hardware for screen updates. If the BIOS routines hadn't been so appalling, applications would have been able to use them and would have worked just fine on non-PC-combatible MS-DOS boxes. Instead, it got to the point where bug-for-bug hardware compatibility with the IBM PC became required for MS-DOS machines. -- Don Stokes, Networking Consultant http://www.daedalus.co.nz +64 25 739 724