From: Charles Richmond Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: Fri, 09 Oct 1998 21:09:23 +0000 Organization: Cannine Computer Center Lines: 55 Message-ID: <361E7B83.CEA01D80@plano.net> References: <6vdqtl$spc$1@supernews.com> <361AD22E.1D9C@well.c <6vgluk$rhc$1@nnrp1.dejanews.com> <6vk86b$but@panix.com> Reply-To: richmond@plano.net NNTP-Posting-Host: 209.44.41.109 Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: 907984839 R67V8VHUD296DD12CC usenet76.supernews.com X-Complaints-To: newsabuse@supernews.com X-Mailer: Mozilla 4.04 (Macintosh; I; 68K) To: Jeff Jonas Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!netnews.com!howland.erols.net!Supernews73!supernews.com!Supernews69!not-for-mail Jeff Jonas wrote: > > >> > My definition is a bit more liberal -- any opcode fetch to a location > >> > which has been the target of a write operation *after* power up > >> > initialization (i.e. I allow code to be *downloaded* to RAM but > >> > if modified *after* it has been copied into the RAM, then it > >> > is self modifying code -- since some part of the program altered > >> > the program fragment that was there previously) > > >> By that definition, an operating system is self-modifying because > >> applications are loaded from disk into RAM and then executed. > > >> I prefer to think of the definition of self-modifying code as being > >> restricted to cases where a program patches locations already containing > >> "live" code. Building a routine on the stack doesn't qualify because new > >> code is being created where no code existed before. Same argument for > >> building a routine in a static buffer in RAM. However, a program that > >> patched *itself* after loading would qualify. > > I have a few insights to offer. > > I've written self modifying code. I admit it freely :-) > The IBM system 360/370 had the "ex" instruction that took 2 operands: > a register and the address of an instruction. The low order byte of the > register was substituted for the 2nd byte of the target instruction > (usually a length literal) and the resulting instruction was then > immediately executed. Very useful for making a move-character instruction > variable length (the number of bytes to move was the 2nd byte). > Despite all the pipelining, you can be sure this was hard-wired to work right! > Yes, the EXecute instruction made self-modifying code safe for the msasses. ;-) I think that IBM regretted *not* making the move character instructions more flexible, and this was their way to make up for it. > > I believe that the General Precision LCP-21 allowed loading the > instruction register directly, allowing execution of anything you could > get into the accumulator first! > Is that the LCP-21 or the LGP-21? I thought that the LG_-21 was a transistorized version of the the LGP-30. The LGP-30 had a vacuum tube (valve) CPU with the main memory on a spinning drum. (Edward Lorenz was using an LGP-30 when he discovered the Butterfly Effect and Chaos Theory.) If you have any details on the LGP-21 (or LCP-21), please post them. For an example of self-modifying code, try "The Story of Mel" from the Jargon file or from several WEB sites. IMHO the great programmers from this era were the ones who used every trick they could to get the machine to do fantastic things (for its size and power). This included self-modifying code of course. Self-modifying code on a minimal machine may be the only way to get a functioning program in the limited memory space. -- +-------------------------------------------------------------+ | Charles and Francis Richmond | +-------------------------------------------------------------+ ###### From: "Frank Tuccio" Subject: Re: self-modifying code Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers References: <6vdqtl$spc$1@supernews.com> <361AD22E.1D9C@well.c <6vgluk$rhc$1@nnrp1.dejanews.com> <6vk86b$but@panix.com> <361E7B83.CEA01D80@plano.net> Message-ID: <01bdf40e$a92c1580$2dbb0318@CC1015894-B.sumt1.jn.home.com> X-Newsreader: Microsoft Internet News 4.70.1155 Lines: 59 Date: Sat, 10 Oct 1998 05:27:55 GMT NNTP-Posting-Host: 24.3.187.45 NNTP-Posting-Date: Fri, 09 Oct 1998 22:27:55 PDT Organization: @Home Network Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!nntprelay.mathworks.com!europa.clark.net!195.27.83.146!newsfeed.ecrc.net!newshub2.home.com!newshub1.home.com!news.home.com!news.rdc1.nj.home.com.POSTED!not-for-mail My favorite self modifying code trick was the 'first time switch' on the IBM 360 et al. The Conditional Branch instruction had a byte which defined the branch condition. IIRC, x'F0' was "branch always", and x'00' was "branch never" (no-op). When a one-time path was wanted, you put a branch instruction around the code, and initialized it to NOP (x'00'). Then, after entering the one-time path, you changed the x'00' to x'F0' (branch always). The net time the path was entered, the branch was taken, and the code was skipped. oh, for the old days!!! -------------------- > > I have a few insights to offer. > > > > I've written self modifying code. I admit it freely :-) > > The IBM system 360/370 had the "ex" instruction that took 2 operands: > > a register and the address of an instruction. The low order byte of the > > register was substituted for the 2nd byte of the target instruction > > (usually a length literal) and the resulting instruction was then > > immediately executed. Very useful for making a move-character instruction > > variable length (the number of bytes to move was the 2nd byte). > > Despite all the pipelining, you can be sure this was hard-wired to work right! > > > Yes, the EXecute instruction made self-modifying code safe for the msasses. ;-) > I think that IBM regretted *not* making the move character instructions more > flexible, and this was their way to make up for it. > > > > I believe that the General Precision LCP-21 allowed loading the > > instruction register directly, allowing execution of anything you could > > get into the accumulator first! > > > Is that the LCP-21 or the LGP-21? I thought that the LG_-21 was a > transistorized version of the the LGP-30. The LGP-30 had a vacuum tube > (valve) CPU with the main memory on a spinning drum. (Edward Lorenz was using > an LGP-30 when he discovered the Butterfly Effect and Chaos Theory.) If you > have any details on the LGP-21 (or LCP-21), please post them. > > For an example of self-modifying code, try "The Story of Mel" from the Jargon > file or from several WEB sites. IMHO the great programmers from this era were > the ones who used every trick they could to get the machine to do fantastic > things (for its size and power). This included self-modifying code of course. > Self-modifying code on a minimal machine may be the only way to get a > functioning program in the limited memory space. > > -- > +-------------------------------------------------------------+ > | Charles and Francis Richmond | > +-------------------------------------------------------------+ > ###### From: Dave Daniels Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: Sat, 10 Oct 1998 10:41:01 BST Organization: ArgoNet, but does not reflect its views Lines: 24 Distribution: world Message-ID: References: <6vdqtl$spc$1@supernews.com> <361AD22E.1D9C@well.c <6vgluk$rhc$1@nnrp1.dejanews.com> <6vk86b$but@panix.com> <361E7B83.CEA01D80@plano.net> <01bdf40e$a92c1580$2dbb0318@CC1015894-B.sumt1.jn.home.com> Reply-To: Dave Daniels NNTP-Posting-Host: userk879.uk.uudial.com X-Newsreader: NewsAgent 0.84 for RISC OS Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!newsfeed.wirehub.nl!btnet-peer!btnet!rill.news.pipex.net!pipex!bore.news.pipex.net!pipex!argonet.co.uk!argbq79 In article <01bdf40e$a92c1580$2dbb0318@CC1015894-B.sumt1.jn.home.com>, "Frank Tuccio" wrote: > My favorite self modifying code trick was the 'first time switch' on the > IBM 360 et al. The Conditional Branch instruction had a byte which defined > the branch condition. IIRC, x'F0' was "branch always", and x'00' was > "branch never" (no-op). When a one-time path was wanted, you put a branch > Oh dear, that brings back guilty memories... Dave -- ANTISPAM: Please note that the email address above is false. My correct address is: dave_danielsargonetcouk Please replace the and s with @ and . respectively when replying - Thanks! ###### Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers From: jkenton@world.std.com (Jeff Kenton) Subject: Re: self-modifying code Message-ID: Date: Sat, 10 Oct 1998 12:45:30 GMT References: <6vdqtl$spc$1@supernews.com> <361AD22E.1D9C@well.c <6vgluk$rhc$1@nnrp1.dejanews.com> <6vk86b$but@panix.com> <361E7B83.CEA01D80@plano.net> Organization: Kenton Systems Corporation, Weston MA Lines: 26 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!nntprelay.mathworks.com!news.mathworks.com!uunet!in3.uu.net!world!jkenton Charles Richmond writes: >For an example of self-modifying code, try "The Story of Mel" from the Jargon Absolutely. If you haven't seen "The Story of Mel" you need to. >file or from several WEB sites. IMHO the great programmers from this era were >the ones who used every trick they could to get the machine to do fantastic >things (for its size and power). This included self-modifying code of course. > Self-modifying code on a minimal machine may be the only way to get a >functioning program in the limited memory space. Several early machines were designed for self-modifying code. The IBM 7090, for example, had a whole set of opcodes for modifying parts of instructions. The Incoterm terminal had an XOR immediate instruction but no other XOR. To do anything useful with it (like parity for an output buffer) you had to put the running value back into the instruction as you went. They don't make machines like that anymore ;-) -- ------------------------------------------------------------------------- = Jeff Kenton Phone/Fax: 1-781-894-4510 = = Kenton Systems Corporation http://world.std.com/~jkenton = ------------------------------------------------------------------------- ###### From: z80@ds1.com (Peter) Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: Sun, 11 Oct 1998 07:28:35 GMT Organization: x Lines: 12 Message-ID: <3623c025.432128578@news.netcomuk.co.uk> References: <6vdqtl$spc$1@supernews.com> <361AD22E.1D9C@well.c <6vgluk$rhc$1@nnrp1.dejanews.com> <6vk86b$but@panix.com> <361E7B83.CEA01D80@plano.net> NNTP-Posting-Host: dialup-00-55.netcomuk.co.uk Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: taliesin.netcom.net.uk 908090778 22692 194.42.228.55 (11 Oct 1998 07:26:18 GMT) X-Complaints-To: abuse@corp.netcom.net.uk NNTP-Posting-Date: 11 Oct 1998 07:26:18 GMT X-Newsreader: Forte Agent 1.5/32.451 X-No-Archive: yes Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!news-raspail.gip.net!news-lond.gip.net!news.gsl.net!gip.net!baron.netcom.net.uk!netcom.net.uk!post.netcom.net.uk!netcom.net.uk!not-for-mail They also don't any longer make programmers who would understand them :) >They don't make machines like that anymore ;-) -- Peter. Return address is invalid to help stop junk mail. E-mail replies to zX80@digiYserve.com but remove the X and the Y. ###### From: antispam@here.not (john r pierce) Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: Sun, 11 Oct 1998 22:44:21 GMT Organization: I HATE BULK EMAIL! Lines: 25 Message-ID: <36233452.573407212@news.scruz.net> References: <6vdqtl$spc$1@supernews.com> <361AD22E.1D9C@well.c <6vgluk$rhc$1@nnrp1.dejanews.com> <6vk86b$but@panix.com> <361E7B83.CEA01D80@plano.net> <01bdf40e$a92c1580$2dbb0318@CC1015894-B.sumt1.jn.home.com> NNTP-Posting-Host: 205.179.103.69 Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: 908145815 MPCBFHUBS6745CDB3C usenet53.supernews.com X-Complaints-To: newsabuse@supernews.com X-Newsreader: Forte Agent 1.5/32.451 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!nntprelay.mathworks.com!logbridge.uoregon.edu!Supernews73!supernews.com!Supernews69!not-for-mail "Frank Tuccio" wrote: >My favorite self modifying code trick was the 'first time switch' on the >IBM 360 et al. The Conditional Branch instruction had a byte which defined >the branch condition. IIRC, x'F0' was "branch always", and x'00' was >"branch never" (no-op). When a one-time path was wanted, you put a branch >instruction around the code, and initialized it to NOP (x'00'). Then, after >entering the one-time path, you changed the x'00' to x'F0' (branch always). >The net time the path was entered, the branch was taken, and the code was >skipped. For that matter, in common use today on the x86 intel architecture, is floating point library calls that are built with software interrupt instructions. The FP runtime library checks to see if the hardware FPU is present, and back stuffs the INT with the proper hardware 80x87 hardware FPU instruction, then backs the return address up to reexecute the newfound opcode. 2nd pass through the same code, its a pure hardware instruction. If you _don't_ have hardware FPU, the library emulates it. -jrp ---------------------------------------------------------------------- This posting has a invalid email address to discourage bulk emailers Due to the ever increasing volumes of spam, I do not mix mail and news ---------------------------------------------------------------------- ###### From: fleetvis@ricochet.net (phil) Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: Mon, 12 Oct 1998 08:18:53 GMT Organization: http://www.supernews.com, The World's Usenet: Discussions Start Here Lines: 14 Message-ID: <3621b897.45243947@news.ricochet.net> References: <6vdqtl$spc$1@supernews.com> <361AD22E.1D9C@well.c <6vgluk$rhc$1@nnrp1.dejanews.com> <6vk86b$but@panix.com> <361E7B83.CEA01D80@plano.net> NNTP-Posting-Host: 204.179.128.74 X-Trace: 908180111 F7W8ZAFJM804ACCB3C usenet53.supernews.com X-Complaints-To: newsabuse@supernews.com X-Newsreader: Forte Free Agent 1.11/32.235 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!newsgate.cistron.nl!het.net!news-feed.inet.tele.dk!bofh.vszbr.cz!howland.erols.net!Supernews73!supernews.com!Supernews69!not-for-mail On Fri, 09 Oct 1998 21:09:23 +0000, Charles Richmond wrote: >Jeff Jonas wrote: >> I've written self modifying code. I admit it freely :-) >> The IBM system 360/370 had the "ex" instruction that took 2 operands: >Yes, the EXecute instruction made self-modifying code safe for the msasses. ;-) >I think that IBM regretted *not* making the move character instructions more >flexible, and this was their way to make up for it. Wasn't there also an execute exception defined for those cases where you attempted to execute an execute so it could not be nested (or recursive)? phil. ###### From: jeffj@panix.com (Jeff Jonas) Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: 12 Oct 1998 12:56:12 -0400 Organization: Jeff's House of Electronic Parts Lines: 18 Message-ID: <6vtcbc$k9a@panix.com> References: <6vk86b$but@panix.com> <361E7B83.CEA01D80@plano.net> <3621b897.45243947@news.ricochet.net> NNTP-Posting-Host: panix.nfs100.access.net X-Newsposter: trn 4.0-test55 (26 Feb 97) Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!newsgate.cistron.nl!het.net!news-feed.inet.tele.dk!bofh.vszbr.cz!howland.erols.net!panix!news.panix.com!not-for-mail >>> I've written self modifying code. I admit it freely :-) >>> The IBM system 360/370 had the "ex" instruction that took 2 operands: >>Yes, the EXecute instruction made self-modifying code safe for the masses. ;-) >Wasn't there also an execute exception defined for those cases where >you attempted to execute an execute so it could not be nested (or >recursive)? That sounds right, but I'm unsure I have anything to confirm that. Geez, if the 370 can't allow it, but *MUST* be dangerous :"> Seriously, though, playing with the instruction register apparently can lead to such tight loops that the CPU can really hang HARD. I was discouraged from doing that on the General Instrument system mostly because the resulting instruction could not be "seen" for debugging or tracing. -- Jeffrey Jonas jeffj@panix(dot)com The original Dr. JCL and Mr .hide ###### From: "George R. Gonzalez" Newsgroups: alt.folklore.computers Subject: Re: self-modifying code Date: Mon, 12 Oct 1998 16:13:59 -0500 Organization: University of Minnesota, Twin Cities Campus Message-ID: <6vtrl7$b7h$1@news1.tc.umn.edu> References: <6vdqtl$spc$1@supernews.com> <361AD22E.1D9C@well.c <6vgluk$rhc$1@nnrp1.dejanews.com> <6vk86b$but@panix.com> <361E7B83.CEA01D80@plano.net> <01bdf40e$a92c1580$2dbb0318@CC1015894-B.sumt1.jn.home.com> <36233452.573407212@news.scruz.net> <6vtjel$19ii$2@ausnews.austin.ibm.com> NNTP-Posting-Host: grg1.micro.umn.edu Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit X-Newsreader: Microsoft Outlook Express 4.72.3110.5 X-MimeOLE: Produced By Microsoft MimeOLE V4.72.3110.3 Lines: 31 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!news-raspail.gip.net!netnews.globalip.ch!news-lond.gip.net!news.gsl.net!gip.net!dispose.news.demon.net!demon!news-feed.inet.tele.dk!bofh.vszbr.cz!news.eecs.umich.edu!newshub.tc.umn.edu!news1.tc.umn.edu!not-for-mail Two examples of REALLY self-modifying code: The 8008 CPU had interrupts, sort-of. It actually had 8 interrupt instructions INT 0 to INT 7, which vectored through low memory. (The 808x series still has a somewhat similar superset of these). You could use these from software as software "interrupts". But I suspect their real reason for being was to allow cheap hardware interrupts. When a peripheral device requested an interrupt, what really happened is some hardware would force a INT xx op code into the execution stream. The device would OR-in its interrupt level (0 to 7) onto the bus at the right time. The CPU would see this INT instruction and merrily handle it. I don't recall how they kept the program counter from incrementing and missing the underlying op code. ----- The CDC 6000 series did not have a hardware stack for subroutine return addresses. Instead when you did a call to XXX, the hardware would buld up a jump back instruction and deposit it at XXX, then start executing at XXX+1. To return from the subroutine, you'd do a jump to XXX, or if possible fall into it to save the extra jump. It also turned out that on some models the conditional jump instruction was faster than the unconditional one, (IIRC the PDP-10 had the same foible), so the subroutine call instruction would actually store a EQ B0,B0,addr (if index register B zero equals itself, jump to addr). ###### From: scottdav@Eng.nospam.COM (Scott Davidson) Newsgroups: alt.folklore.computers Subject: Re: self-modifying code Date: 12 Oct 1998 17:43:49 GMT Organization: Sun Microsystems Inc. Lines: 96 Message-ID: <6vtf4l$702$1@engnews2.Eng.Sun.COM> References: <361E7B83.CEA01D80@plano.net> Reply-To: scottdav@Eng.nospam.COM NNTP-Posting-Host: voyager2.eng.sun.com Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!newsfeed.wli.net!su-news-hub1.bbnplanet.com!news.bbnplanet.com!venus.sun.com!sunnews1.Eng.Sun.COM!eastnews1.east.sun.com!engnews2.Eng.Sun.COM!not-for-mail In article CEA01D80@plano.net, Charles Richmond writes: >Jeff Jonas wrote: >> >> >> > My definition is a bit more liberal -- any opcode fetch to a location >> >> > which has been the target of a write operation *after* power up >> >> > initialization (i.e. I allow code to be *downloaded* to RAM but >> >> > if modified *after* it has been copied into the RAM, then it >> >> > is self modifying code -- since some part of the program altered >> >> > the program fragment that was there previously) >> >> >> By that definition, an operating system is self-modifying because >> >> applications are loaded from disk into RAM and then executed. >> >> >> I prefer to think of the definition of self-modifying code as being >> >> restricted to cases where a program patches locations already containing >> >> "live" code. Building a routine on the stack doesn't qualify because new >> >> code is being created where no code existed before. Same argument for >> >> building a routine in a static buffer in RAM. However, a program that >> >> patched *itself* after loading would qualify. >> >> I have a few insights to offer. >> >> I've written self modifying code. I admit it freely :-) >> The IBM system 360/370 had the "ex" instruction that took 2 operands: >> a register and the address of an instruction. The low order byte of the >> register was substituted for the 2nd byte of the target instruction >> (usually a length literal) and the resulting instruction was then >> immediately executed. Very useful for making a move-character instruction >> variable length (the number of bytes to move was the 2nd byte). >> Despite all the pipelining, you can be sure this was hard-wired to work right! >> >Yes, the EXecute instruction made self-modifying code safe for the msasses. ;-) >I think that IBM regretted *not* making the move character instructions more >flexible, and this was their way to make up for it. >> >> I believe that the General Precision LCP-21 allowed loading the >> instruction register directly, allowing execution of anything you could >> get into the accumulator first! >> >Is that the LCP-21 or the LGP-21? I thought that the LG_-21 was a >transistorized version of the the LGP-30. The LGP-30 had a vacuum tube >(valve) CPU with the main memory on a spinning drum. (Edward Lorenz was using >an LGP-30 when he discovered the Butterfly Effect and Chaos Theory.) If you >have any details on the LGP-21 (or LCP-21), please post them. See my post on 1962 machines done on 10/9. Email me if you want more details, I have the LGP-21 manual at work. You can't write directly to the LGP-21 instruction register. Indirectly, a conditional branch writes the new branch address to the address part of the word in the IR, but that's too controlled to be fun. The LGP21 had inherently self modifying code. The R (set return address instruction) wrote the address of the PC + 2 to a memory address, which was usually a branch. The next instruction would be an unconditional branch to a subroutine whose last instruction was the target of the R instruction. This was how subroutines were implemented. It didn't exactly support recursion. My most blatant use of self-modifying code on the LGP21 was a tic-tac-toe program that worked using two passes. Between them it converted a whole bunch of adds to subtracts. So it could be restarted, there was an initialization procedure that made sure the adds were adds. This was 30 years ago, so I don't exactly remember why I felt the need to do this, but I was in high school and not responsible for my actions. I have learned better. > >For an example of self-modifying code, try "The Story of Mel" from the Jargon >file or from several WEB sites. IMHO the great programmers from this era were >the ones who used every trick they could to get the machine to do fantastic >things (for its size and power). This included self-modifying code of course. > Self-modifying code on a minimal machine may be the only way to get a >functioning program in the limited memory space. > BTW, the LGP21 came with a cardboard wheel called the Optimum Address Locator. (A picture of it appears in the manual.) It was used to find the optimum operand address - that is one right before the read head. I guess this also could be used for assigning branch addresses, but leaving holes in the code for patches gave me enough trouble - so much so that I eventually wrote my own assembler so I wouldn't have to assign branch addresses manually. >-- >+-------------------------------------------------------------+ >| Charles and Francis Richmond | >+-------------------------------------------------------------+ --- Scott Davidson Sun Microsystems scott.davidson@eng.nospam.com Replace nospam with sun to email me. ###### From: glass2@glass2.cv.lexington.ibm.com Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: 12 Oct 1998 18:51:04 GMT Organization: IBM Austin Lines: 33 Message-ID: <6vtj2o$19ii$1@ausnews.austin.ibm.com> References: <6vk86b$but@panix.com> <361E7B83.CEA01D80@plano.net> <3621b897.45243947@news.ricochet.net> <6vtcbc$k9a@panix.com> Reply-To: wa4qal@vnet.ibm.com NNTP-Posting-Host: glass2.cv.lexington.ibm.com X-Newsreader: IBM NewsReader/2 2.0 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!nntprelay.mathworks.com!newsfeed.xcom.net!uunet!in2.uu.net!an02.austin.ibm.com!ausnews.austin.ibm.com!not-for-mail In <6vtcbc$k9a@panix.com>, jeffj@panix.com (Jeff Jonas) writes: >>>> I've written self modifying code. I admit it freely :-) >>>> The IBM system 360/370 had the "ex" instruction that took 2 operands: >>>Yes, the EXecute instruction made self-modifying code safe for the masses. ;-) >>Wasn't there also an execute exception defined for those cases where >>you attempted to execute an execute so it could not be nested (or >>recursive)? > >That sounds right, but I'm unsure I have anything to confirm that. >Geez, if the 370 can't allow it, but *MUST* be dangerous :"> >Seriously, though, playing with the instruction register apparently >can lead to such tight loops that the CPU can really hang HARD. >I was discouraged from doing that on the General Instrument system >mostly because the resulting instruction could not be "seen" >for debugging or tracing. >-- >Jeffrey Jonas >jeffj@panix(dot)com >The original Dr. JCL and Mr .hide I seem to remember that on one of the predecessors to the S/360, it was possible to execute an execute instruction. And, if you executed yourself, or otherwise put the machine into an execute loop, it was hung forever (Or, at least, until it was reset). This was obviously considered unfriendly for a machine which was designed to service multiple jobs (and, which was extremely expensive). Thus, the execute exception was introduced. Dave P.S. Standard Disclaimer: I work for them, but I don't speak for them. ###### From: glass2@glass2.cv.lexington.ibm.com Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: 12 Oct 1998 18:57:25 GMT Organization: IBM Austin Lines: 50 Message-ID: <6vtjel$19ii$2@ausnews.austin.ibm.com> References: <6vdqtl$spc$1@supernews.com> <361AD22E.1D9C@well.c <6vgluk$rhc$1@nnrp1.dejanews.com> <6vk86b$but@panix.com> <361E7B83.CEA01D80@plano.net> <01bdf40e$a92c1580$2dbb0318@CC1015894-B.sumt1.jn.home.com> <36233452.573407212@news.scruz.net> Reply-To: wa4qal@vnet.ibm.com NNTP-Posting-Host: glass2.cv.lexington.ibm.com X-Newsreader: IBM NewsReader/2 2.0 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!cpk-news-hub1.bbnplanet.com!chicago-news-feed1.bbnplanet.com!news.bbnplanet.com!cyclone.i1.net!uunet!in3.uu.net!an02.austin.ibm.com!ausnews.austin.ibm.com!not-for-mail In <36233452.573407212@news.scruz.net>, antispam@here.not (john r pierce) writes: >"Frank Tuccio" wrote: > >>My favorite self modifying code trick was the 'first time switch' on the >>IBM 360 et al. The Conditional Branch instruction had a byte which defined >>the branch condition. IIRC, x'F0' was "branch always", and x'00' was >>"branch never" (no-op). When a one-time path was wanted, you put a branch >>instruction around the code, and initialized it to NOP (x'00'). Then, after >>entering the one-time path, you changed the x'00' to x'F0' (branch always). >>The net time the path was entered, the branch was taken, and the code was >>skipped. > >For that matter, in common use today on the x86 intel architecture, is floating >point library calls that are built with software interrupt instructions. The FP >runtime library checks to see if the hardware FPU is present, and back stuffs >the INT with the proper hardware 80x87 hardware FPU instruction, then backs the >return address up to reexecute the newfound opcode. 2nd pass through the same >code, its a pure hardware instruction. If you _don't_ have hardware FPU, the >library emulates it. > >-jrp > >---------------------------------------------------------------------- > This posting has a invalid email address to discourage bulk emailers >Due to the ever increasing volumes of spam, I do not mix mail and news >---------------------------------------------------------------------- Actually, the branch condition on the S/360, S/370, 370/XA, ESA/370, and ESA/390 is just a nibble, and not a byte. The format of the instruction is: Branch on Condition (BC) OOMXBDDD Where OO is the opcode (8 bits), M is the condition (4 bits), X is the index register to be used for the branch (4 bits), B is the base register to be used for the branch (4 bits), and DDD is the displacement off of the sum of the index and base registers (12 bits). Note that it's possible to EXecute a BC instruction, in which case the contents of the register specified in the EXecute instruction overlays the mask (and index) field of the BC instruction. Talk about some difficult code to understand. It's almost as much fun as self modifying code, only without the ability to see what the code exactly was in a dump. :*) Dave P.S. Standard Disclaimer: I work for them, but I don't speak for them. ###### From: "ian.thompson-bell" Subject: Re: self-modifying code Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers References: <6vdqtl$spc$1@supernews.com> <361AD22E.1D9C@well.c <6vgluk$rhc$1@nnrp1.dejanews.com> <6vk86b$but@panix.com> <361E7B83.CEA01D80@plano.net> <01bdf40e$a92c1580$2dbb0318@CC1015894-B.sumt1.jn.home.com> <36233452.573407212@news.scruz.net> Message-ID: <01bdf616$928a6a20$6ec322c3@xx2129> X-Newsreader: Microsoft Internet News 4.70.1161 NNTP-Posting-Host: 195.34.195.110 Date: 12 Oct 1998 19:25:44 GMT X-Trace: 12 Oct 1998 19:25:44 GMT, 195.34.195.110 Lines: 45 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!nntprelay.mathworks.com!rill.news.pipex.net!pipex!news.thefree.net!195.34.195.110 Someone may already have mentioned this but all the Microsoft Basic interpreters (e.g on the Tandy CoCo) used self modifiying code in the loop that stepped thru' basic code. Ian john r pierce wrote in article <36233452.573407212@news.scruz.net>... > "Frank Tuccio" wrote: > > >My favorite self modifying code trick was the 'first time switch' on the > >IBM 360 et al. The Conditional Branch instruction had a byte which defined > >the branch condition. IIRC, x'F0' was "branch always", and x'00' was > >"branch never" (no-op). When a one-time path was wanted, you put a branch > >instruction around the code, and initialized it to NOP (x'00'). Then, after > >entering the one-time path, you changed the x'00' to x'F0' (branch always). > >The net time the path was entered, the branch was taken, and the code was > >skipped. > > For that matter, in common use today on the x86 intel architecture, is floating > point library calls that are built with software interrupt instructions. The FP > runtime library checks to see if the hardware FPU is present, and back stuffs > the INT with the proper hardware 80x87 hardware FPU instruction, then backs the > return address up to reexecute the newfound opcode. 2nd pass through the same > code, its a pure hardware instruction. If you _don't_ have hardware FPU, the > library emulates it. > > -jrp > > ---------------------------------------------------------------------- > This posting has a invalid email address to discourage bulk emailers > Due to the ever increasing volumes of spam, I do not mix mail and news > ---------------------------------------------------------------------- > ###### From: jeffj@panix.com (Jeff Jonas) Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: 12 Oct 1998 20:31:17 -0400 Organization: Jeff's House of Electronic Parts Lines: 24 Message-ID: <6vu70l$6bk@panix.com> References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <6vu1e6$62c$1@sloth.swcp.com> NNTP-Posting-Host: panix.nfs100.access.net X-Newsposter: trn 4.0-test55 (26 Feb 97) Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!nntprelay.mathworks.com!panix!news.panix.com!not-for-mail In article <6vu1e6$62c$1@sloth.swcp.com> boebert@swcp.com (William E. Boebert) writes: >All subroutines in the Burroughs 220 (ca 1960) were implemented with >self-modifying code. There was no stack. Return addresses were stored in >the code at each call. Oh my paws and whiskers, how could I forget the IBM 1130 doing something similar: jump to subroutine saved the program counter (I think IBM called it the IAR: Instruction Address Register) at the address, and jumped to the word AFTER that! I think subroutines tended to look like: subr ds 1 ; save return address op1 ... jump_indirect subr ; return Of course, this made subroutines non re-entrant unless the return address was subsequently stored in some stack or per-instance arena. -- Jeffrey Jonas jeffj@panix(dot)com The original Dr. JCL and Mr .hide ###### From: John Doty Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: Mon, 12 Oct 1998 21:52:09 -0400 Organization: Wampler-Doty Family Lines: 42 Message-ID: <3622B247.9168D001@w-d.org> References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <6vu1e6$62c$1@sloth.swcp.com> <6vu70l$6bk@panix.com> Reply-To: jpd@w-d.org NNTP-Posting-Host: chisai.w-d.org Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Mailer: Mozilla 4.04 (Macintosh; I; PPC) Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!nntprelay.mathworks.com!newsfeed.cwix.com!199.0.65.142!news-feed1.tiac.net!posterchild2!news@tiac.net Jeff Jonas wrote: > > In article <6vu1e6$62c$1@sloth.swcp.com> boebert@swcp.com > (William E. Boebert) writes: > >All subroutines in the Burroughs 220 (ca 1960) were implemented with > >self-modifying code. There was no stack. Return addresses were stored in > >the code at each call. > > Oh my paws and whiskers, how could I forget the IBM 1130 doing > something similar: jump to subroutine saved the program counter > (I think IBM called it the IAR: Instruction Address Register) > at the address, and jumped to the word AFTER that! > > I think subroutines tended to look like: > > subr ds 1 ; save return address > op1 > ... > jump_indirect subr ; return You forgot to start the label field in column 21, instruction field in 27, etc. :-) Another possibility was: SUBR EQU *+1 BSC L 0 * THE REST OF THE ROUTINE MDX SUBR-1 Which put a two word branch instruction one loc ahead of the entry point. The caller would use BSI (Branch and Store Instruction address) to call SUBR, placing the return address in the second word of the branch. To return, you then branch to the long branch before the entry point (here performed by the supernaturally versatile MDX instruction). This was less commonly used than the indirect branch for returning, but some programmers preferred it (don't ask me why). -- John Doty "You can't confuse me, that's my job." Home: jpd@w-d.org Work: jpd@space.mit.edu ###### From: thvv@best.com (Tom Van Vleck) Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: Mon, 12 Oct 1998 21:52:29 -0700 Organization: Multicians Lines: 9 Message-ID: References: <6vk86b$but@panix.com> <361E7B83.CEA01D80@plano.net> <3621b897.45243947@news.ricochet.net> <6vtcbc$k9a@panix.com> <6vtj2o$19ii$1@ausnews.austin.ibm.com> NNTP-Posting-Host: thvv.vip.best.com X-Trace: 908254435 12505 (none) 206.86.0.12 X-Newsreader: MT-NewsWatcher 2.4.1 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!newshub.northeast.verio.net!news1.best.com!nntp2.ba.best.com!thvv Jeff Kenton wrote: > I believe that was the 7090/7094. It had an execute instruction (XEC). > The way I remember the story is that they trapped an execute of an XEC > instruction, but forgot XEC indirect, which still would lock up the cpu. > Somebody else may remember more details. Actually, XEC * would freeze a 7094. People did this by mistake. One such story is in http://www.best.com/~thvv/7094.html ###### From: Robert Billing Newsgroups: alt.folklore.computers Subject: Re: self-modifying code Date: Mon, 12 Oct 1998 22:30:44 +0000 Organization: Tanglewood Message-ID: <36228314.4755C4FE@tnglwood.demon.co.uk> References: <6vdqtl$spc$1@supernews.com> <361AD22E.1D9C@well.c <6vgluk$rhc$1@nnrp1.dejanews.com> <6vk86b$but@panix.com> <361E7B83.CEA01D80@plano.net> <01bdf40e$a92c1580$2dbb0318@CC1015894-B.sumt1.jn.home.com> <36233452.573407212@news.scruz.net> <6vtjel$19ii$2@ausnews.austin.ibm.com> <6vtrl7$b7h$1@news1.tc.umn.edu> NNTP-Posting-Host: localhost.demon.co.uk X-NNTP-Posting-Host: tnglwood.demon.co.uk:158.152.132.30 X-Trace: news.demon.co.uk 908232732 nnrp-04:25933 NO-IDENT tnglwood.demon.co.uk:158.152.132.30 X-Complaints-To: abuse@demon.net Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Mailer: Mozilla 3.04 (X11; I; Linux 2.0.31 i586) Lines: 13 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!212.63.192.161.MISMATCH!newshub.bart.net!news.tele2.nl!newsfeed1.swip.net!swipnet!news-feed.inet.tele.dk!bofh.vszbr.cz!dispose.news.demon.net!demon!news.demon.co.uk!demon!tnglwood.demon.co.uk!not-for-mail George R. Gonzalez wrote: > don't recall how they kept the program counter from incrementing and > missing the underlying op code. Actually, you don't, you let it happen, and backspace the PC afterwards in the handler. Have a look at the source code of GDB, the flavour that debugs a 68K target over a serial link. -- I am Robert Billing, Christian, inventor, traveller, cook and animal lover, I live near 0:46W 51:22N. http://www.tnglwood.demon.co.uk/ "Bother," said Pooh, "Eeyore, ready two photon torpedoes and lock phasers on the Heffalump, Piglet, meet me in transporter room three" ###### Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers From: jkenton@world.std.com (Jeff Kenton) Subject: Re: self-modifying code Message-ID: Date: Mon, 12 Oct 1998 22:44:40 GMT References: <6vk86b$but@panix.com> <361E7B83.CEA01D80@plano.net> <3621b897.45243947@news.ricochet.net> <6vtcbc$k9a@panix.com> <6vtj2o$19ii$1@ausnews.austin.ibm.com> Organization: Kenton Systems Corporation, Weston MA Lines: 20 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!news-raspail.gip.net!news-peer.gip.net!news.gsl.net!gip.net!nntp.abs.net!uunet!in4.uu.net!world!jkenton glass2@glass2.cv.lexington.ibm.com writes: >I seem to remember that on one of the predecessors to the S/360, >it was possible to execute an execute instruction. And, if you >executed yourself, or otherwise put the machine into an execute >loop, it was hung forever (Or, at least, until it was reset). >This was obviously considered unfriendly for a machine which was >designed to service multiple jobs (and, which was extremely >expensive). Thus, the execute exception was introduced. I believe that was the 7090/7094. It had an execute instruction (XEC). The way I remember the story is that they trapped an execute of an XEC instruction, but forgot XEC indirect, which still would lock up the cpu. Somebody else may remember more details. -- ------------------------------------------------------------------------- = Jeff Kenton Phone/Fax: 1-781-894-4510 = = Kenton Systems Corporation http://world.std.com/~jkenton = ------------------------------------------------------------------------- ###### From: boebert@swcp.com (William E. Boebert) Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Followup-To: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Date: 12 Oct 1998 22:56:06 GMT Organization: Southwest Cyberport Lines: 6 Message-ID: <6vu1e6$62c$1@sloth.swcp.com> References: <6vk86b$but@panix.com> <361E7B83.CEA01D80@plano.net> <3621b897.45243947@news.ricochet.net> <6vtcbc$k9a@panix.com> <6vtj2o$19ii$1@ausnews.austin.ibm.com> NNTP-Posting-Host: llama.swcp.com X-Newsreader: TIN [version 1.2 PL2] Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!skynet.be!isdnet!news-spur1.maxwell.syr.edu!news.maxwell.syr.edu!newsfeed.cwix.com!208.128.37.8!feeder.lobo.net!feeder.swcp.com!sloth.swcp.com!boebert All subroutines in the Burroughs 220 (ca 1960) were implemented with self-modifying code. There was no stack. Return addresses were stored in the code at each call. Earl ###### From: jones@cs.uiowa.edu (Douglas W. Jones,201H MLH,3193350740,3193382879) Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: 13 Oct 1998 02:37:33 GMT Organization: The University of Iowa Lines: 63 Message-ID: <6vuedd$d56$1@flood.weeg.uiowa.edu> References: <6vu70l$6bk@panix.com> NNTP-Posting-Host: pyrite.cs.uiowa.edu Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!newsfeed.enteract.com!news-xfer.siscom.net!streamer1.cleveland.iagnet.net!NewsNG.Chicago.Qual.Net!news.uiowa.edu!not-for-mail From article <6vu70l$6bk@panix.com>, by jeffj@panix.com (Jeff Jonas): > In article <6vu1e6$62c$1@sloth.swcp.com> boebert@swcp.com > (William E. Boebert) writes: >>All subroutines in the Burroughs 220 (ca 1960) were implemented with >>self-modifying code. There was no stack. Return addresses were stored in >>the code at each call. > > I think subroutines tended to look like: > > subr ds 1 ; save return address > op1 > ... > jump_indirect subr ; return This model of subroutine was pretty universal on machines of the early 1960's. The corresponding code for a PDP-8 is: SUBR, .-. DCA TMP / first instruction, store argument ... TAD TMP / semifinal instruction, get result JMP I SUBR / return ... JSR SUBR / the code to call the above ... The same style of call was also used on the CCC (later Honeywell) 516, and on many other early machines. My favorite, however, was Cray's instruction set for the CDC 6600 supercomputer. On that machine, if my memory serves me correctly, the call instruction saved a branch instruction to the return location at the destination address, and then began execution at the immediately following address. To return, you jump to the entry point. Sadly, I forget the assembly language syntax, but the result was something like this: SUBR JMP 0 place holder for return jump ... body of routine JMP SUBR return jump ... JMS SUBR call to the above code ... Note that, in 1960, subroutine calls were still something of a novelty. The debate between advocates of open subroutines and closed subroutines had only recently died down. (A closed subroutine is the kind of thing you call with a special machine instruction, while an open subroutine is what we now call a macro -- now, we know that both are useful and that we really want both kinds to be available!) Anyway, it's worth noticing that Crays design for the CDC 160, one of the first few transistorized machines to make it to market back in 1959, did not include a subroutine call instruction! You can see the instruction set for this antique on http://www.cs.uiowa.edu/~jones/cdc160/ Doug Jones jones@cs.uiowa.edu ###### From: Ken Smith Newsgroups: alt.folklore.computers Subject: Re: self-modifying code Date: 13 Oct 1998 03:56:44 GMT Organization: a2i network Lines: 24 Message-ID: <6vuj1s$577$1@samba.rahul.net> References: <6vdqtl$spc$1@supernews.com> <36233452.573407212@news.scruz.net> <6vtjel$19ii$2@ausnews.austin.ibm.com> <6vtrl7$b7h$1@news1.tc.umn.edu> NNTP-Posting-Host: waltz.rahul.net NNTP-Posting-User: kensmith Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!news-raspail.gip.net!news-peer.gip.net!news.gsl.net!gip.net!nntp.abs.net!news.mcs.net!ddsw1!bug.rahul.net!samba.rahul.net!rahul.net!a2i!kensmith.a2i!kensmith In article <6vtrl7$b7h$1@news1.tc.umn.edu>, George R. Gonzalez wrote: [.....] >peripheral device requested an interrupt, what really happened is some >hardware would force a INT xx op code into the execution stream. The >device would OR-in its interrupt level (0 to 7) onto the bus at the right >time. The CPU would see this INT instruction and merrily handle it. I >don't recall how they kept the program counter from incrementing and >missing the underlying op code. The 8080 had an INT input pin and a INTE output pin. If you put the interrupt pulse in on the INT line you would get a pulse on the INTE when it was time to fetch the next instruction. The PC did not increment. The restart instruction had the format: 11nnn111 so simply letting the data bus be pulled up by some resistors caused a RST 7 instruction which caused a jump to location 38H. This allowed an amost zero parts design for the interrupt hardware. -- -- kensmith@rahul.net forging knowledge ###### From: Robert Billing Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: Tue, 13 Oct 1998 06:50:05 +0000 Organization: Tanglewood Message-ID: <3622F81D.617ED355@tnglwood.demon.co.uk> References: <6vk86b$but@panix.com> <361E7B83.CEA01D80@plano.net> <3621b897.45243947@news.ricochet.net> <6vtcbc$k9a@panix.com> <6vtj2o$19ii$1@ausnews.austin.ibm.com> <6vu1e6$62c$1@sloth.swcp.com> NNTP-Posting-Host: localhost.demon.co.uk X-NNTP-Posting-Host: tnglwood.demon.co.uk:158.152.132.30 X-Trace: news.demon.co.uk 908261780 nnrp-11:16003 NO-IDENT tnglwood.demon.co.uk:158.152.132.30 X-Complaints-To: abuse@demon.net Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Mailer: Mozilla 3.04 (X11; I; Linux 2.0.31 i586) Lines: 16 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!news-raspail.gip.net!news-lond.gip.net!news.gsl.net!gip.net!dispose.news.demon.net!demon!news.demon.co.uk!demon!tnglwood.demon.co.uk!not-for-mail William E. Boebert wrote: > > All subroutines in the Burroughs 220 (ca 1960) were implemented with > self-modifying code. There was no stack. Return addresses were stored in > the code at each call. This was also true IIRC of the PDP-8, Elliott 900, and IBM 1130. That's why the PDP-11, with hardware stack, came as a shock to those of us used to the earlier machines. -- I am Robert Billing, Christian, inventor, traveller, cook and animal lover, I live near 0:46W 51:22N. http://www.tnglwood.demon.co.uk/ "Bother," said Pooh, "Eeyore, ready two photon torpedoes and lock phasers on the Heffalump, Piglet, meet me in transporter room three" ###### Date: 13 Oct 98 11:27:24 -0800 From: "Charlie Gibbs" Subject: Re: self-modifying code References: <6vk86b$but@panix.com> <361E7B83.CEA01D80@plano.net> <3621b897.45243947@news.ricochet.net> <6vtcbc$k9a@panix.com> <6vtj2o$19ii$1@ausnews.austin.ibm.com> <6vu1e6$62c$1@sloth.swcp.com> Message-ID: <1726.590T1215T6874788@sky.bus.com> Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Lines: 38 X-Newsreader: THOR 2.5a (Amiga;TCP/IP) NNTP-Posting-Host: news.skybus.com X-Trace: 13 Oct 1998 13:03:27 -0700, news.skybus.com Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!newsgate.cistron.nl!het.net!news-feed.inet.tele.dk!bofh.vszbr.cz!howland.erols.net!news-peer.sprintlink.net!news-backup-west.sprintlink.net!news.sprintlink.net!204.244.4.2!news.westel.com!news.skybus.com!204.244.247.128 In article <6vu1e6$62c$1@sloth.swcp.com> boebert@swcp.com (William E. Boebert) writes: >All subroutines in the Burroughs 220 (ca 1960) were implemented with >self-modifying code. There was no stack. Return addresses were stored >in the code at each call. I cut my teeth on the Univac 9300, which was Univac's answer to the IBM 360/20. The 9300 had eight 16-bit registers (numbered 8 through 15) in low memory. These were used in standard 360-style base/ displacement addressing. If the base register number indicated the non-existent registers 0 through 7, the entire base-displacement field was taken as a 15-bit address, allowing direct addressing of 32K (the machine's maximum memory size) from any instruction. Our convention was to exploit this feature to store a subroutine's return address in a branch instruction, allowing the same register to be re-used for nested subroutines. (We used register 13 - that's right, 13 - for subroutine calls, since we didn't have the save area protocol used by the higher 360 models.) A typical subroutine would look like this: SUBR STH 13,SUBX+2 Store return address ... (subroutine code) SUBX B * Exit It was called with a standard BAL 13,SUBR instruction. An interesting side-effect was that if you somehow jumped into the subroutine before it had been called the first time, the processor would hang on the exit instruction, although I can't think of a time when this little feature actually helped debug anything. But at least you had a record of where the last subroutine call came from. -- cgibbs@sky.bus.com (Charlie Gibbs) Remove the first period after the "at" sign to reply. ###### From: "Stevec" Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: 13 Oct 1998 12:00:20 GMT Organization: UUNET Internet Africa Lines: 21 Message-ID: <01bdf6a1$b07d2140$6d141fc4@SERVER.PRODESIGN> References: <6vk86b$but@panix.com> <361E7B83.CEA01D80@plano.net> <3621b897.45243947@news.ricochet.net> <6vtcbc$k9a@panix.com> <6vtj2o$19ii$1@ausnews.austin.ibm.com> <6vu1e6$62c$1@sloth.swcp.com> <3622F81D.617ED355@tnglwood.demon.co.uk> NNTP-Posting-Host: 196-31-20-109.iafrica.com X-Newsreader: Microsoft Internet News 4.70.1155 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!newsgate.cistron.nl!het.net!news-feed.inet.tele.dk!bofh.vszbr.cz!news.maxwell.syr.edu!news-peer.gip.net!news-penn.gip.net!news.gsl.net!gip.net!iafrica.com!news01.iafrica.com!not-for-mail Robert Billing wrote in article <3622F81D.617ED355@tnglwood.demon.co.uk>... > William E. Boebert wrote: > > > > All subroutines in the Burroughs 220 (ca 1960) were implemented with > > self-modifying code. There was no stack. Return addresses were stored in > > the code at each call. > > This was also true IIRC of the PDP-8, Elliott 900, and IBM 1130. Don't forget the Varian 620L. (Now that brings back memories ;-) Are we not talking about a Turing machines? As I see it his machine worked only by self modification. --------- I hope my opinions coincide with my employer as it is me. ###### Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers From: jkenton@world.std.com (Jeff Kenton) Subject: Re: self-modifying code Message-ID: Date: Tue, 13 Oct 1998 12:21:16 GMT References: <6vk86b$but@panix.com> <361E7B83.CEA01D80@plano.net> <3621b897.45243947@news.ricochet.net> <6vtcbc$k9a@panix.com> <6vtj2o$19ii$1@ausnews.austin.ibm.com> <6vu1e6$62c$1@sloth.swcp.com> <3622F81D.617ED355@tnglwood.demon.co.uk> Organization: Kenton Systems Corporation, Weston MA Lines: 28 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!newsgate.cistron.nl!het.net!news-feed.inet.tele.dk!bofh.vszbr.cz!nntp.abs.net!cyclone.i1.net!uunet!in2.uu.net!world!jkenton Robert Billing writes: >William E. Boebert wrote: >> >> All subroutines in the Burroughs 220 (ca 1960) were implemented with >> self-modifying code. There was no stack. Return addresses were stored in >> the code at each call. > This was also true IIRC of the PDP-8, Elliott 900, and IBM 1130. > That's why the PDP-11, with hardware stack, came as a shock to those of >us used to the earlier machines. I had the pleasure of working on software for DEC's PDP-15 Unichannel machine, which had a PDP-11 on its bus for I/O spooling. PDP-15s were direct descendents of the PDP-1 (think of an 18 bit PDP-8 if you haven't seen one) and used JMS instructions, which stored the return address at the first instruction for subroutine calls. At the beginning of the PDP-11 code was a "JMS" macro, with a comment which said "this is to simulate a PDP-15 JMS instruction, because I don't understand the PDP-11 JSR at all." -- ------------------------------------------------------------------------- = Jeff Kenton Phone/Fax: 1-781-894-4510 = = Kenton Systems Corporation http://world.std.com/~jkenton = ------------------------------------------------------------------------- ###### From: jeffj@panix.com (Jeff Jonas) Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: 13 Oct 1998 14:32:07 -0400 Organization: Jeff's House of Electronic Parts Lines: 27 Message-ID: <7006b7$mc4@panix.com> References: <6vu1e6$62c$1@sloth.swcp.com> <3622F81D.617ED355@tnglwood.demon.co.uk> NNTP-Posting-Host: panix.nfs100.access.net X-Newsposter: trn 4.0-test55 (26 Feb 97) Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!newsgate.cistron.nl!het.net!news-feed.inet.tele.dk!bofh.vszbr.cz!howland.erols.net!panix!news.panix.com!not-for-mail >> All subroutines in the Burroughs 220 (ca 1960) were implemented with >> self-modifying code. There was no stack. Return addresses were stored in >> the code at each call. > This was also true IIRC of the PDP-8, Elliott 900, and IBM 1130. > That's why the PDP-11, with hardware stack, came as a shock to those of > us used to the earlier machines. I'd say that just adapting to the stack paradigm was a shock to those of us accustomed to using registers for everything. I remember taking delight in architectures/instruction sets that allowed register-to-register arithmetic without any dedicated accumulator such as the IBM 360's way of allowing ANY register for address offset (as opposed to only the dedicated index registers). The concept of "general purpose registers" vs dedicated registers was a relief to assemble coders. I had to learn about stacks when using Unix v6 on the PDP11/45 even when using "C" because of the way variables are on the stack and to understand when variables go out of scope and are deallocated. I still remember the shock "you mean all the args are in RAM instead of registers? That's SLOW". -- Jeffrey Jonas jeffj@panix(dot)com The original Dr. JCL and Mr .hide ###### Message-ID: <3623C8A8.DD4ADEFA@jkmicro.com> Date: Tue, 13 Oct 1998 14:39:52 -0700 From: Jim Stewart Organization: http://www.jkmicro.com X-Mailer: Mozilla 4.04 [en] (Win95; I) MIME-Version: 1.0 Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers To: Jeff Jonas Subject: Re: self-modifying code References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <6vu1e6$62c$1@sloth.swcp.com> <6vu70l$6bk@panix.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit NNTP-Posting-Host: 168.150.253.142 X-Trace: 13 Oct 1998 14:43:16 +0700, 168.150.253.142 Lines: 26 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!nntprelay.mathworks.com!howland.erols.net!news-peer.sprintlink.net!news-backup-west.sprintlink.net!news.sprintlink.net!204.94.127.5!news.cwnet.com!168.150.253.142 Jeff Jonas wrote: > > In article <6vu1e6$62c$1@sloth.swcp.com> boebert@swcp.com > (William E. Boebert) writes: > >All subroutines in the Burroughs 220 (ca 1960) were implemented with > >self-modifying code. There was no stack. Return addresses were stored in > >the code at each call. > > Oh my paws and whiskers, how could I forget the IBM 1130 doing > something similar: jump to subroutine saved the program counter > (I think IBM called it the IAR: Instruction Address Register) > at the address, and jumped to the word AFTER that! So did a PDP 8. I alway wondered where they got that kluge (: > I think subroutines tended to look like: > > subr ds 1 ; save return address > op1 > ... > jump_indirect subr ; return > > Of course, this made subroutines non re-entrant unless the return address > was subsequently stored in some stack or per-instance arena. Jim ###### Newsgroups: alt.folklore.computers From: chris@transdata.co.nz ("chris 'fufas' grace") Subject: Re: self-modifying code Message-ID: <1998Oct14.181950.22788@transdataco.nz> X-Mimeole: Produced By Microsoft MimeOLE V4.72.3110.0 Lines: 46 NNTP-Posting-Host: elizabeth X-Newsreader: Microsoft Outlook Express 4.72.3115.0 References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <6vu1e6$62c$1@sloth.swcp.com> <6vu70l$6bk@panix.com> <3623C8A8.DD4ADEFA@jkmicro.com> Date: Wed, 14 Oct 1998 06:16:53 GMT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!news-raspail.gip.net!news-peer.gip.net!news.gsl.net!gip.net!newsfeed.cwix.com!203.97.37.7!newsfeed.clear.net.nz!status.gen.nz!kcbbs!transdata!not-for-mail Jim Stewart wrote in message <3623C8A8.DD4ADEFA@jkmicro.com>... >Jeff Jonas wrote: >> >> In article <6vu1e6$62c$1@sloth.swcp.com> boebert@swcp.com >> (William E. Boebert) writes: >> >All subroutines in the Burroughs 220 (ca 1960) were implemented with >> >self-modifying code. There was no stack. Return addresses were stored in >> >the code at each call. >> >> Oh my paws and whiskers, how could I forget the IBM 1130 doing >> something similar: jump to subroutine saved the program counter >> (I think IBM called it the IAR: Instruction Address Register) >> at the address, and jumped to the word AFTER that! > >So did a PDP 8. I alway wondered where they got that kluge (: > I quite liked the way the original Atari 400/800s allowed you to write self-modifying code. You wrote the code you wanted to the screen as an output device, then you used an originally undocumented XIO function to read the screen as an input device and executed the code you had just written. You could do it with basic and machine code. My only gripe about those machines was that the documentation was dreadful and you had to spend nearly half the price of the 'puter to get the stuff you really needed. The manual supplied with the machine had some real gems such as 'this command, when used with optional arguments, has a number of other functions'. No mention of the arguments, or functions. And with the XIO command you could do just about anything, none of which was in the standard manual. They also didn't stand the conversion to PAL TV too well. The clock rate on the CPU went up, but some of the video processing was decidedly flaky. -- The Market Is Always Right. If you see something that looks like the market is wrong, it is you who are wrong. All hail the mighty market. -- Brian Scearce ###### From: "Jon Kirwan" Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Organization: New World Computing Services Reply-To: "Jon Kirwan" Message-ID: <36244da0.15204247@news.easystreet.com> References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <6vu1e6$62c$1@sloth.swcp.com> <6vu70l$6bk@panix.com> X-Newsreader: Forte Agent 1.5/32.451 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 23 NNTP-Posting-Host: 206.103.56.236 X-Trace: news6.ispnews.com 908348998 206.103.56.236 (Wed, 14 Oct 1998 03:09:58 EDT) NNTP-Posting-Date: Wed, 14 Oct 1998 03:09:58 EDT Date: Wed, 14 Oct 1998 07:10:44 GMT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!howland.erols.net!hub1.ispnews.com!news6.ispnews.com.POSTED!not-for-mail Just like the HP 21xx CPUs! I rewrote the OS on the HP 2000 series and still have the original sources for their HP 2000F system. Jon On 12 Oct 1998 20:31:17 -0400, jeffj@panix.com (Jeff Jonas) wrote: >Oh my paws and whiskers, how could I forget the IBM 1130 doing >something similar: jump to subroutine saved the program counter >(I think IBM called it the IAR: Instruction Address Register) >at the address, and jumped to the word AFTER that! > >I think subroutines tended to look like: > >subr ds 1 ; save return address > op1 > ... > jump_indirect subr ; return > >Of course, this made subroutines non re-entrant unless the return address >was subsequently stored in some stack or per-instance arena. ###### From: cbfalconer@my-dejanews.com Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: Wed, 14 Oct 1998 16:03:44 GMT Organization: Deja News - The Leader in Internet Discussion Lines: 37 Message-ID: <702i10$ei0$1@nnrp1.dejanews.com> References: <6vdqtl$spc$1@supernews.com> <361AD22E.1D9C@well.c <6vgluk$rhc$1@nnrp1.dejanews.com> <6vk86b$but@panix.com> <361E7B83.CEA01D80@plano.net> <3621b897.45243947@news.ricochet.net> NNTP-Posting-Host: 208.31.20.66 X-Article-Creation-Date: Wed Oct 14 16:03:44 1998 GMT X-Http-User-Agent: Mozilla/3.0Gold (Win95; I) X-Http-Proxy: 1.0 x8.dejanews.com:80 (Squid/1.1.22) for client 208.31.20.66 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!newscore.univie.ac.at!btnet-peer!btnet!news-feed1.eu.concert.net!newsfeed.cwix.com!204.238.120.130!news-feeds.jump.net!nntp2.dejanews.com!nnrp1.dejanews.com!not-for-mail In article <3621b897.45243947@news.ricochet.net>, fleetvis@ricochet.net (phil) wrote: > On Fri, 09 Oct 1998 21:09:23 +0000, Charles Richmond > wrote: > >Jeff Jonas wrote: > >> I've written self modifying code. I admit it freely :-) > >> The IBM system 360/370 had the "ex" instruction that took 2 operands: > >Yes, the EXecute instruction made self-modifying code safe for the msasses. ;-) > >I think that IBM regretted *not* making the move character instructions more > >flexible, and this was their way to make up for it. > Wasn't there also an execute exception defined for those cases where > you attempted to execute an execute so it could not be nested (or > recursive)? The HP3000 had a machine code 'execute' which executed the one instruction on the top of stack. You had to create the instruction and push it, then execute execute. This specifically went around the protection mechanisms, which insisted that code be in code segments, data in data segments, etc. The point again is that such operations are re-entrant. Thus the code need never be repeated. Any procedure or function that refers to globals (meaning not strictly local) is NOT re-entrant. It cannot be interrupted during execution by time-slicing for example, and called again by another thread or process. The 8080 operation I mentioned some time ago, of building an i/o instruction followed by a return on the stack, and calling that, was re-entrant. If interrupted between the i/o and the ret, for example, and the building code was called again, it would build a new instruction, execute, and eventually return to do the 'ret' before which it was interrupted (whew). -- Chuck Falconer (Charles_Falconer@NOSPAMapsnet.com) -----------== Posted via Deja News, The Discussion Network ==---------- http://www.dejanews.com/ Search, Read, Discuss, or Start Your Own ###### From: albaugh@agames.com (Mike Albaugh) Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Followup-To: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Date: 14 Oct 1998 20:29:56 GMT Organization: Atari Games Corporation Lines: 59 Message-ID: <7031k4$1ad$1@void.agames.com> References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <6vu1e6$62c$1@sloth.swcp.com> <6vu70l$6bk@panix.com> <3623C8A8.DD4ADEFA@jkmicro.com> NNTP-Posting-Host: java.agames.com X-Newsreader: TIN [version 1.2 PL2] Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!cyclone.news.idirect.com!island.idirect.com!newsfeed1.earthlink.net!newsfeed.concentric.net!newshub1.home.com!news.home.com!newshub1-work.home.com!void.agames.com!albaugh Jim Stewart (jstewart@jkmicro.com) wrote: : Jeff Jonas wrote: : > : > In article <6vu1e6$62c$1@sloth.swcp.com> boebert@swcp.com : > (William E. Boebert) writes: : > >All subroutines in the Burroughs 220 (ca 1960) were implemented with : > >self-modifying code. There was no stack. Return addresses were stored in : > >the code at each call. : > : > Oh my paws and whiskers, how could I forget the IBM 1130 doing : > something similar: jump to subroutine saved the program counter : > (I think IBM called it the IAR: Instruction Address Register) : > at the address, and jumped to the word AFTER that! : So did a PDP 8. I alway wondered where they got that kluge (: From the PDP-5, of course :-) But seriously, a _lot_ of machines used "Store caller PC at loc, branch to loc+1". The CDC 6x00 "Return Jump" is a minor variation of this. BAL (Branch and Link) is another popular form, where "next PC" is stored in either a dedicated or general register. This is quite popular on RISCs, and also quite a good idea if you have a fair number of "leaf" routines. Stacking the "next PC" is the most common for CISC micros, but there are three other possibilities I thought I'd mention for completeness: 1) Saving the PC in a dedicated _un-readable_ register. The IBM-1620 did this, although I know of no software that used the feature, since it imposed a hard limit to nesting level :-) The 8008 and PIC share the basic disease, albeit having more than one (usually) level of subroutining available 2) Using some other register as a PC. COSMAC (1802) and SC/MP (8030?) did this. You "called" a routine by loading a pointer to it in some GPR, then "switched" to using that GPR for the PC. COSMAC got away with it better than SC/MP, because SC/MP had only four registers, and needed two to do much of anything, so you could not use interrupts (which caused a switch to one of the regs) if you wanted to call subroutines. 3) The IBM 1401 (and siblings) had an interesting variation where _all_ branches stored the next PC in a register that was also used in (i.e. clobbered in) almost all other instructions. There was no difference between a "branch to subroutine" and an ordinary branch. The difference was that a subroutine had a "Store B register" instruction as its entry point, and saved that PC value in either an indirect location (for those who had paid for the indirect addressing special feature) or the "return" branch at the end of the routine. Other than the "cracker-barrel tale" aspect of this thread, does anybody know of any other (hardware) subroutine-calling method? Software methods can be arbitrarily strange (as can hardware, x86 task-gates being sort-of stacks and sort-of linked-lists, but...) so I'd be interested in hearing about them but it will take something really wierd to impress me :-) Mike | albaugh@agames.com, speaking only for myself ###### Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers From: jkenton@world.std.com (Jeff Kenton) Subject: Re: self-modifying code Message-ID: Date: Wed, 14 Oct 1998 21:44:57 GMT References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <6vu1e6$62c$1@sloth.swcp.com> <6vu70l$6bk@panix.com> <3623C8A8.DD4ADEFA@jkmicro.com> <7031k4$1ad$1@void.agames.com> Organization: Kenton Systems Corporation, Weston MA Lines: 30 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!nntprelay.mathworks.com!news.mathworks.com!uunet!in1.uu.net!world!jkenton albaugh@agames.com (Mike Albaugh) writes: > Other than the "cracker-barrel tale" aspect of this thread, >does anybody know of any other (hardware) subroutine-calling >method? Software methods can be arbitrarily strange (as can >hardware, x86 task-gates being sort-of stacks and sort-of >linked-lists, but...) so I'd be interested in hearing about them >but it will take something really wierd to impress me :-) The PDP-10 had 4 different ways of calling a subroutine: + JSR -- stored the return address (plus flags) at the entry point and jumped to the following location + JSP -- saved the return address (and flags) in a register + JSA -- saved a register at the entry point, saved return address in the register, and began execution at entry point plus 1. + PUSHJ -- store the return address on the stack Needless to say, each type of subroutine had to use the right kind of instruction to return to the caller. -- ------------------------------------------------------------------------- = Jeff Kenton Phone/Fax: 1-781-894-4510 = = Kenton Systems Corporation http://world.std.com/~jkenton = ------------------------------------------------------------------------- ###### From: daveb@iinet.net.au (David R Brooks) Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: Thu, 15 Oct 1998 00:32:14 GMT Organization: iiNet Technologies Lines: 41 Message-ID: <36263fc8.4768857@news.m.iinet.net.au> References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <6vu1e6$62c$1@sloth.swcp.com> <6vu70l$6bk@panix.com> <3623C8A8.DD4ADEFA@jkmicro.com> <7031k4$1ad$1@void.agames.com> NNTP-Posting-Host: reggae-10-241.nv.iinet.net.au Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Newsreader: Forte Agent 1.5/32.451 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!news-raspail.gip.net!news-lond.gip.net!news.gsl.net!gip.net!btnet-peer!btnet!news-feed1.eu.concert.net!fu-berlin.de!news.waia.asn.au!news.wantree.com.au!news.iinet.net.au!not-for-mail albaugh@agames.com (Mike Albaugh) wrote: [snip] : Other than the "cracker-barrel tale" aspect of this thread, :does anybody know of any other (hardware) subroutine-calling :method? Software methods can be arbitrarily strange (as can :hardware, x86 task-gates being sort-of stacks and sort-of :linked-lists, but...) so I'd be interested in hearing about them :but it will take something really wierd to impress me :-) The British Elliott 503/803 (early 1960's) were 39-bit machines, with two 18-bit instructions packed per word. The 39th bit was a "modifier", which caused the LS 18 bits of the result from the 1st half-word instruction to be added to the 2nd before execution. This addition affected the opcode bits as well as the address, so it had an effect like the IBM "execute" instruction mentioned earlier. The classic use of this was of course, subroutine linkage. In the code below, opcodes are in octal, and the two halfwords are separated by ":" if no "modification" occurs, or "/" if it does. Opcodes: 22 Increment this location 40 Jump to location 73 Store the address of this instruction (ie program counter) This is a 13-bit RAM address: the rest of the word gets zero. Given these, we can have: LINK: dw ? ;39-bit word (LS 13 bits used) CALL: 73 LINK : 40 SUBR ;Link & call ;Returns here SUBR: ..... 22 LINK / 40 0 ;Increment link & return There were a number of variations on this basic scheme, but the intent was similar. -- Dave Brooks PGP public key via , or servers ###### From: "Carl R. Friend" Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: Wed, 14 Oct 1998 21:09:42 -0400 Organization: as little as possible! Lines: 31 Message-ID: <36254B56.5C793F89@stoneweb.com> References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <6vu1e6$62c$1@sloth.swcp.com> <6vu70l$6bk@panix.com> <3623C8A8.DD4ADEFA@jkmicro.com> <7031k4$1ad$1@void.agames.com> NNTP-Posting-Host: zephyr.ultranet.com Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Complaints-To: abuse@ultra.net X-Ultra-Time: 15 Oct 1998 01:09:42 GMT X-Mailer: Mozilla 2.0 (X11; I; Linux 2.0.29 i586) Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!enews.sgi.com!news.idt.net!feed1.news.rcn.net!rcn!news.ultranet.com!not-for-mail Mike Albaugh wrote: > > Other than the "cracker-barrel tale" aspect of this thread, > does anybody know of any other (hardware) subroutine-calling > method? Software methods can be arbitrarily strange (as can > hardware, x86 task-gates being sort-of stacks and sort-of > linked-lists, but...) so I'd be interested in hearing about them > but it will take something really wierd to impress me :-) In the LINC, a JMP instruction, if branching to any location other than zero stored PC+1, ORed with a "JMP" opcode, into location zero before performing the jump. A "return" was executed by jumping to location zero. See: "http://www.ultranet.com/~engelbrt/carl/museum/doco/PDP-12/ UG-Chap3s3.html#3.16" (on one line!) for all the nauseating details. PDP-12s and _some_ LINC-8s had a status bit which could be set to disable this behaviour. Weird enough? -- ______________________________________________________________________ | | | | Carl Richard Friend (UNIX Sysadmin) | West Boylston | | Minicomputer Collector / Enthusiast | Massachusetts, USA | | mailto:carl.friend@stoneweb.com | | | http://www.ultranet.com/~engelbrt/carl/museum | ICBM: N42:22 W71:47 | |________________________________________________|_____________________| ###### From: guymacon@deltanet.com (Guy Macon) Newsgroups: comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: 14 Oct 1998 19:09:15 PDT Organization: Lines: 15 Message-ID: <703lgb$s55@chronicle.concentric.net> References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <6vu1e6$62c$1@sloth.swcp.com> <6vu70l$6bk@panix.com> <3623C8A8.DD4ADEFA@jkmicro.com> <7031k4$1ad$1@void.agames.com> <36254B56.5C793F89@stoneweb.com> NNTP-Posting-Host: 205.230.215.174 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!logbridge.uoregon.edu!news.stanford.edu!newsfeed.concentric.net!207.155.183.80.MISMATCH!global-news-master Mike Albaugh wrote: > Other than the "cracker-barrel tale" aspect of this thread, > does anybody know of any other (hardware) subroutine-calling > method? Software methods can be arbitrarily strange (as can > hardware, x86 task-gates being sort-of stacks and sort-of > linked-lists, but...) so I'd be interested in hearing about them > but it will take something really wierd to impress me :-) One of the chips that Moore designed to run FORTH as it's native Assembly Language had a normal jump to a subroutine, but the return instruction used zero bytes. One bit of every opcode was dedicated to the return instruction; you could do an add then the usual go to the next instruction, or an add then a return from the subroutine. ###### From: Charles Richmond Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: Wed, 14 Oct 1998 22:21:25 +0000 Organization: Cannine Computer Center Lines: 44 Message-ID: <362523E5.6D8001F0@plano.net> References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <6vu1e6$62c$1@sloth.swcp.com> <6vu70l$6bk@panix.com> <3623C8A8.DD4ADEFA@jkmicro.com> <7031k4$1ad$1@void.agames.com> <36254B56.5C793F89@stoneweb.com> Reply-To: richmond@plano.net NNTP-Posting-Host: 209.44.41.72 Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: 908421175 R67V8VHUD2948D12CC usenet80.supernews.com X-Complaints-To: newsabuse@supernews.com X-Mailer: Mozilla 4.04 (Macintosh; I; 68K) To: "Carl R. Friend" Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!news-raspail.gip.net!news-peer.gip.net!news.gsl.net!gip.net!howland.erols.net!Supernews73!supernews.com!Supernews69!not-for-mail Carl R. Friend wrote: > > Mike Albaugh wrote: > > > > Other than the "cracker-barrel tale" aspect of this thread, > > does anybody know of any other (hardware) subroutine-calling > > method? Software methods can be arbitrarily strange (as can > > hardware, x86 task-gates being sort-of stacks and sort-of > > linked-lists, but...) so I'd be interested in hearing about them > > but it will take something really wierd to impress me :-) > > In the LINC, a JMP instruction, if branching to any location other > than zero stored PC+1, ORed with a "JMP" opcode, into location zero > before performing the jump. A "return" was executed by jumping to > location zero. > > See: "http://www.ultranet.com/~engelbrt/carl/museum/doco/PDP-12/ > UG-Chap3s3.html#3.16" (on one line!) for all the nauseating > details. > > PDP-12s and _some_ LINC-8s had a status bit which could be set > to disable this behaviour. > > Weird enough? > Yes, weird indeed. The TI 9900 processor also had a weird subroutine linkage sequence. It had a Workspace register internal to the processor that pointed to a block of memory to be used as the 16 general 16-bit registers for the processor. That's right, the registers were actually *memory locations*. There was a single instruction that allocated a new set of registers and linked them back to the old set (so a return from subroutine could be made). Unfortunately, I can *not* bore you with the details...my reference work on this is misplaced at the moment. The National SC/MP also had a weird subroutine calling sequence. It had nothing like a "jsr" instruction or a "ret" instruction. The details are also *not* at hand right now. Someone who knows *all* about this stuff, please post details. -- +-------------------------------------------------------------+ | Charles and Francis Richmond | +-------------------------------------------------------------+ ###### Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers From: dp@world.std.com (Jeff DelPapa) Subject: Re: self-modifying code Message-ID: Date: Thu, 15 Oct 1998 05:08:33 GMT References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <6vu70l$6bk@panix.com> <3623C8A8.DD4ADEFA@jkmicro.com> <7031k4$1ad$1@void.agames.com> Organization: Chaos and Confusion Lines: 53 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!newshub.bart.net!newsgate.cistron.nl!het.net!isdnet!newspump.monmouth.com!newspeer.monmouth.com!nntprelay.mathworks.com!uunet!in4.uu.net!world!dp In article <7031k4$1ad$1@void.agames.com>, Mike Albaugh wrote: >Jim Stewart (jstewart@jkmicro.com) wrote: >: Jeff Jonas wrote: >: > >: > In article <6vu1e6$62c$1@sloth.swcp.com> boebert@swcp.com >: > (William E. Boebert) writes: >does anybody know of any other (hardware) subroutine-calling >method? Software methods can be arbitrarily strange (as can >hardware, x86 task-gates being sort-of stacks and sort-of >linked-lists, but...) so I'd be interested in hearing about them >but it will take something really wierd to impress me :-) > Well the MIT lispms had a fairly odd call. It used a stack, but the bizzare part was that you did the call, then immediately after the call instruction you started pushing the arguments on the stack, the last push was a variant form that had a bit that said "ok, you can transfer control now". I don't remember where the acutal address ended up on the call stack, or to exactly when it got pushed. Not that odd these days (and not just for subroutines) was the habit of a number of pipelined machines of executing the instruction at the address following the branch (or return). On the pdp-11 you didn't have to use the stack for subroutine calling, however the only program I saw that didn't was a boot rom (11-34 I think), that ran with only the registers for storage, and had (non nested) subroutines here and there. (the schematics included a commented listing). This is not the same as running from the registers, a trick the PDP-10 could manage. Another pdp-11 oddity -- When they came out with the LSI-11a, they changed how you got to some internal processor registers, specifically the interuppt mask level. On the unibus 11's, it was just another hunk of the memory map. On the LSI, they had dedicated instructions. When it first came out, everyone wrote code to figure out the cpu type (usually by catching the invalid address that happened when you tried the memory map method), and if it was the lsi-11, you patched the code on the fly (luckily the dedicated instruction was shorter than the memory mapped version). Then someone came up with a hack -- push the desired PSW, the current PC+4, and execute the "return from interrupt" instruction, which would stuff the psw, and "return" to the next location. I never saw a clear enough description, but the thing that was supposed to become the intel 432 was baroque in almost every detail. (the prelim manuals were big on grand gestures, but thin on hard details like a list of instructions, or even a package pinout...) I am sure that the computing equivalent to Klingon word ordering could be found in a real (likely internal) manual for the thing... ###### From: fleetvis@ricochet.net (phil) Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: Thu, 15 Oct 1998 07:35:27 GMT Organization: http://www.supernews.com, The World's Usenet: Discussions Start Here Lines: 19 Message-ID: <3625a2d9.11186034@news.ricochet.net> References: <6vdqtl$spc$1@supernews.com> <361AD22E.1D9C@well.c <6vgluk$rhc$1@nnrp1.dejanews.com> <6vk86b$but@panix.com> <361E7B83.CEA01D80@plano.net> <3621b897.45243947@news.ricochet.net> <702i10$ei0$1@nnrp1.dejanews.com> NNTP-Posting-Host: 204.179.136.118 X-Trace: 908436756 F7W8ZAFJM8876CCB3C usenet80.supernews.com X-Complaints-To: newsabuse@supernews.com X-Newsreader: Forte Free Agent 1.11/32.235 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!isdnet!newsfeed.nyu.edu!newsfeed.direct.ca!Supernews73!supernews.com!Supernews69!not-for-mail On Wed, 14 Oct 1998 16:03:44 GMT, cbfalconer@my-dejanews.com wrote: >The point again is that such operations are re-entrant. Thus the code need >never be repeated. Any procedure or function that refers to globals (meaning >not strictly local) is NOT re-entrant. It cannot be interrupted during >execution by time-slicing for example, and called again by another thread or >process. > >The 8080 operation I mentioned some time ago, of building an i/o instruction >followed by a return on the stack, and calling that, was re-entrant. If >interrupted between the i/o and the ret, for example, and the building code >was called again, it would build a new instruction, execute, and eventually >return to do the 'ret' before which it was interrupted (whew). I suspected that it had less to do with re-entrancy than with infinite recursion. phil. ###### From: dg@ (David Given) Newsgroups: alt.folklore.computers Subject: Re: self-modifying code Date: Thu, 15 Oct 1998 12:46:07 GMT Organization: I'm organised? Wow! Message-ID: <908455567.14808.0.nnrp-01.9e9878e0@news.demon.co.uk> References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <6vu70l$6bk@panix.com> <3623C8A8.DD4ADEFA@jkmicro.com> <1998Oct14.181950.22788@transdataco.nz> NNTP-Posting-Host: taos.demon.co.uk X-NNTP-Posting-Host: taos.demon.co.uk:158.152.120.224 X-Trace: news.demon.co.uk 908455567 nnrp-01:14808 NO-IDENT taos.demon.co.uk:158.152.120.224 X-Complaints-To: abuse@demon.net Lines: 30 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!newsgate.cistron.nl!het.net!newsfeed.wirehub.nl!btnet-peer!btnet!dispose.news.demon.net!demon!news.demon.co.uk!demon!taos.demon.co.uk!!dg In article <1998Oct14.181950.22788@transdataco.nz>, chris 'fufas' grace wrote: [...] >I quite liked the way the original Atari 400/800s allowed you to >write self-modifying code. You wrote the code you wanted to >the screen as an output device, then you used an originally undocumented >XIO function to read the screen as an input device and executed the >code you had just written. You could do it with basic and machine code. On ARM processors, or at least the early ones (I've only done this on the ARM2), you have to use self-modifying code to call a system call dynamically. The opcode to do a system call is SYS (think INT on ix86, but more powerful; the field was, IIRC, 28 bits wide). But you couldn't tell it to read the system call number from a register. It would only read it from the instruction. The solution was to push some code onto the stack and then run it. This was preferable to modifying code in-place because the text segment is traditionally read-only. I would put a code sample here but it's been too long since I've done any ARM programming. -- +- David Given ----------------+ | Work: dg@tao.co.uk | Smash the state, and have a nice day. | Play: dgiven@iname.com | +- http://wiredsoc.ml.org/~dg -+ ###### From: dg@ (David Given) Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: Thu, 15 Oct 1998 12:53:00 GMT Organization: I'm organised? Wow! Message-ID: <908455980.2125.0.nnrp-07.9e9878e0@news.demon.co.uk> References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <7031k4$1ad$1@void.agames.com> <36254B56.5C793F89@stoneweb.com> <362523E5.6D8001F0@plano.net> NNTP-Posting-Host: taos.demon.co.uk X-NNTP-Posting-Host: taos.demon.co.uk:158.152.120.224 X-Trace: news.demon.co.uk 908455980 nnrp-07:2125 NO-IDENT taos.demon.co.uk:158.152.120.224 X-Complaints-To: abuse@demon.net Lines: 37 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!newscore.univie.ac.at!btnet-peer!btnet!dispose.news.demon.net!demon!news.demon.co.uk!demon!taos.demon.co.uk!!dg In article <362523E5.6D8001F0@plano.net>, Charles Richmond wrote: >Yes, weird indeed. The TI 9900 processor also had a weird subroutine linkage >sequence. It had a Workspace register internal to the processor that pointed >to a block of memory to be used as the 16 general 16-bit registers for the >processor. That's right, the registers were actually *memory locations*. [...] I have a OISC processor that I'm (very slowly) designing; I'm planning to write an emulator at some point. I haven't actually thought much about how you'd do subroutine calls. Since the instruction decoder (such as it is) is actually a memory-mapped device, the easiest thing would probably be to read the current program counter out of it and store it on the stack before reprogramming the instruction decoder with the subroutine's addresses. Sort of equivalent to push pc jmp sub sub: ... pop a add 4, a mov a, pc Do any real-world processors do anything like this? (I think I need to add some hardware support for subroutines. Processor design is trickier than I thought.) -- +- David Given ----------------+ | Work: dg@tao.co.uk | Smash the state, and have a nice day. | Play: dgiven@iname.com | +- http://wiredsoc.ml.org/~dg -+ ###### From: Ken Smith Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: 15 Oct 1998 13:07:52 GMT Organization: a2i network Lines: 16 Message-ID: <704s38$dkj$1@samba.rahul.net> References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <3623C8A8.DD4ADEFA@jkmicro.com> <7031k4$1ad$1@void.agames.com> NNTP-Posting-Host: waltz.rahul.net NNTP-Posting-User: kensmith Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!newsgate.cistron.nl!het.net!212.63.192.161.MISMATCH!newshub.bart.net!news.tele2.nl!newsfeed1.swip.net!swipnet!news.maxwell.syr.edu!news-peer.gip.net!news.gsl.net!gip.net!peerfeed.ncal.verio.net!bug.rahul.net!samba.rahul.net!rahul.net!a2i!kensmith.a2i!kensmith In article , Jeff DelPapa wrote: [ weird call/return ] We dont need no call and return instructions. The RCA1802 didnt have a call or a return instruction, as such. You loaded one of the registers with the address of the routine and then used the "SEP" instruction to cause that register to start working as your PC. When the routine wanted to return you switched the PC back. Any of the 16 registers could be used as the PC. -- -- kensmith@rahul.net forging knowledge ###### From: "Stevec" Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: 15 Oct 1998 14:44:55 GMT Organization: UUNET Internet Africa Message-ID: <01bdf84b$09006b60$4d141fc4@SERVER.PRODESIGN> References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <7031k4$1ad$1@void.agames.com> <36254B56.5C793F89@stoneweb.com> <362523E5.6D8001F0@plano.net> <908455980.2125.0.nnrp-07.9e9878e0@news.demon.co.uk> NNTP-Posting-Host: 196-31-20-77.iafrica.com X-Newsreader: Microsoft Internet News 4.70.1155 Lines: 23 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!newsgate.cistron.nl!het.net!news-feed.inet.tele.dk!bofh.vszbr.cz!dispose.news.demon.net!demon!colt.net!Pollux.Teleglobe.net!uunet!in2.uu.net!iafrica.com!news01.iafrica.com!not-for-mail > In article <362523E5.6D8001F0@plano.net>, > Charles Richmond wrote: > >Yes, weird indeed. The TI 9900 processor also had a weird subroutine linkage > >sequence. It had a Workspace register internal to the processor that pointed > >to a block of memory to be used as the 16 general 16-bit registers for the > >processor. That's right, the registers were actually *memory locations*. > [...] > I am now using the Siemens C161. This does the same thing which makes context switching a breeze. BTW Thanx to everybidy whoreplied to my posting on benchmarks. I really got a lot of usefull info. Esp. about ZILOG ;-) Regards StaveC ###### From: Robert Billing Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: Thu, 15 Oct 1998 20:07:41 +0000 Organization: Tanglewood Message-ID: <3626560D.30202E0B@tnglwood.demon.co.uk> References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <6vu1e6$62c$1@sloth.swcp.com> <6vu70l$6bk@panix.com> <3623C8A8.DD4ADEFA@jkmicro.com> <7031k4$1ad$1@void.agames.com> NNTP-Posting-Host: localhost.demon.co.uk X-NNTP-Posting-Host: tnglwood.demon.co.uk:158.152.132.30 X-Trace: news.demon.co.uk 908491939 nnrp-08:18833 NO-IDENT tnglwood.demon.co.uk:158.152.132.30 X-Complaints-To: abuse@demon.net Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Mailer: Mozilla 3.04 (X11; I; Linux 2.0.31 i586) Lines: 21 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!nntprelay.mathworks.com!btnet-peer!btnet!dispose.news.demon.net!demon!news.demon.co.uk!demon!tnglwood.demon.co.uk!not-for-mail Mike Albaugh wrote: > does anybody know of any other (hardware) subroutine-calling > method? Software methods can be arbitrarily strange (as can Texas TMS 9000/99000 had IIRC only 3 16 bit registers on the chip. These were the PC, a status register, and a pointer to a block of RAM that contained 16 virtual registers. The procedure call involved an instruction that loaded both the PC and virtual register pointers from a vector (memory begins to fade at this point). I remember constructing some macros to synthesise a stack from this, and a dirty hack to handle 16kHz (TV *line* rate) interrupts that involved two partially overlapping register sets. Things of extreme evil, as the man said... -- I am Robert Billing, Christian, inventor, traveller, cook and animal lover, I live near 0:46W 51:22N. http://www.tnglwood.demon.co.uk/ "Bother," said Pooh, "Eeyore, ready two photon torpedoes and lock phasers on the Heffalump, Piglet, meet me in transporter room three" ###### From: Dave Daniels Newsgroups: alt.folklore.computers Subject: Re: self-modifying code Date: Thu, 15 Oct 1998 21:29:24 BST Organization: ArgoNet, but does not reflect its views Lines: 25 Distribution: world Message-ID: References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <6vu1e6$62c$1@sloth.swcp.com> <6vu70l$6bk@panix.com> <3623C8A8.DD4ADEFA@jkmicro.com> <1998Oct14.181950.22788@transdataco.nz> Reply-To: Dave Daniels NNTP-Posting-Host: userk943.uk.uudial.com X-Newsreader: NewsAgent 0.84 for RISC OS Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!newsfeed.wirehub.nl!diablo.theplanet.net!join.news.pipex.net!pipex!warm.news.pipex.net!bore.news.pipex.net!pipex!argonet.co.uk!argbq79 In article <1998Oct14.181950.22788@transdataco.nz>, chris@transdata.co.nz ("chris 'fufas' grace") wrote: > They also didn't stand the conversion to PAL TV too well. The clock rate > on > the CPU went up, but some of the video processing was decidedly flaky. I heard somewhere that the first Commodore 64s in the UK had a problem where a clock on them lost ten minutes *per hour*. It was due to the change from the 60Hhz US mains frequency to the 50Hz UK one. How true this is, I do not know. Dave -- ANTISPAM: Please note that the email address above is false. My correct address is: dave_danielsargonetcouk Please replace the and s with @ and . respectively when replying - Thanks! ###### From: Dave Daniels Newsgroups: alt.folklore.computers Subject: Re: self-modifying code Date: Thu, 15 Oct 1998 21:32:06 BST Organization: ArgoNet, but does not reflect its views Lines: 41 Distribution: world Message-ID: References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <6vu70l$6bk@panix.com> <3623C8A8.DD4ADEFA@jkmicro.com> <1998Oct14.181950.22788@transdataco.nz> <908455567.14808.0.nnrp-01.9e9878e0@news.demon.co.uk> Reply-To: Dave Daniels NNTP-Posting-Host: userk943.uk.uudial.com X-Newsreader: NewsAgent 0.84 for RISC OS Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!news-raspail.gip.net!news-lond.gip.net!news.gsl.net!gip.net!diablo.theplanet.net!join.news.pipex.net!pipex!warm.news.pipex.net!bore.news.pipex.net!pipex!argonet.co.uk!argbq79 In article <908455567.14808.0.nnrp-01.9e9878e0@news.demon.co.uk>, dg@ (David Given) wrote: > On ARM processors, or at least the early ones (I've only done this on the > ARM2), you have to use self-modifying code to call a system call > dynamically. Correct. > The solution was to push some code onto the stack and then run it. This > was preferable to modifying code in-place because the text segment is > traditionally read-only. > This was the 'approved' way of doing it using the Acorn OS RISCOS on processors up to the ARM 7. The snag is, when the StrongARM came along it had separate data and code caches instead of one single cache for everything and so self-modifying code like this no longer worked unless you flushed the caches before branching to the code. The problem here is that doing this takes an eternity on a SA110 StrongARM clocked at 233Mhz, something like a millisecond. Ironically, the 'bad' way to do it, where you update the code in place, has a good chance of working as when the SWI decoding code reads the instruction, it will most likely read the instruction you just faked from the data cache. Nowadays RISCOS has a system call that takes the SWI number to be executed as a parameter and you no longer have to worry about using self-modifying code to kludge it. The change, though, broke a lot of code at the time. Dave -- ANTISPAM: Please note that the email address above is false. My correct address is: dave_danielsargonetcouk Please replace the and s with @ and . respectively when replying - Thanks! ###### Path: chonsp.franklin.ch!usenet From: Neil Franklin Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: 15 Oct 1998 21:38:25 +0200 Organization: My own Private Self Lines: 54 Sender: neil@chonsp.franklin.ch Message-ID: References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <6vu1e6$62c$1@sloth.swcp.com> <6vu70l$6bk@panix.com> <3623C8A8.DD4ADEFA@jkmicro.com> <7031k4$1ad$1@void.agames.com> <36254B56.5C793F89@stoneweb.com> <362523E5.6D8001F0@plano.net> X-Newsreader: Gnus v5.3/Emacs 19.34 Charles Richmond writes: > > Yes, weird indeed. The TI 9900 processor also had a weird subroutine linkage > sequence. It had a Workspace register internal to the processor that pointed > to a block of memory to be used as the 16 general 16-bit registers for the > processor. That's right, the registers were actually *memory locations*. > There was a single instruction that allocated a new set of registers and > linked them back to the old set (so a return from subroutine could be made). > Unfortunately, I can *not* bore you with the details...my reference work on > this is misplaced at the moment. So I will add them pesky (and perverse) details. The processor had internally: - 16bit workspace pointer (this is an 32k*16bit system, 8bit Byte addressable) to address an 16 word work space ("registers") - 8bit flags. - 4bit instruction register select (selects which of the 16 registers are used as PC!! - 4bit stack pointer select (same for SP) To execute an instruction: - calculate wp+pc-index -> address bus - input data bus -> ALU, +1 -> data bus = PC writeback - send old data bus (or new one, I can't remember -> address - fetch actual instruction from data bus - same for stacking/unstacking This (together with fetching all Basic tokens/variables from the video RAM (via the video processor)) was why the TI99/4A was so slow, despite having an 16bit processor. And while we are on unusual subroutine calls and work spaces: Don't forget an contemporary architecture: Sun Sparc! - the instruction set sees 32 registers - 0..7 are an fixed set of 8 registers for global vars - 8..31 are an 24 register window into an ring buffer of (n=8..32)*16 registers (yes, that makes a few hundred registers) - on every call the window is shifted by +16, on return -16 8 overlapping are call parameters, 8 non overlapping local vars - The instruction pointer is one of the local var registers. - when call depth is too large a section of registers is copied to RAM - when return comes to the right level they are restored -- *** New home Addresses Mail and Web *** home: neil@franklin.ch.remove http://neil.franklin.ch/ work: franklin@arch.ethz.ch.remove http://caad.arch.ethz.ch/~franklin/ Microsoft is Software Communism, Fight for GNU Freedom! ###### From: hawk@eyry.econ.iastate.edu (Richard E. Hawkins Esq.) Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: 17 Oct 1998 12:29:16 -0500 Organization: House of Hawkins Lines: 25 Message-ID: <70ak5c$c1q$1@eyry.econ.iastate.edu> References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <7031k4$1ad$1@void.agames.com> <704s38$dkj$1@samba.rahul.net> NNTP-Posting-Host: eyry.econ.iastate.edu Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!nntprelay.mathworks.com!howland.erols.net!vixen.cso.uiuc.edu!newsrelay.iastate.edu!news.iastate.edu!not-for-mail In article <704s38$dkj$1@samba.rahul.net>, Ken Smith wrote: >In article , Jeff DelPapa wrote: > >[ weird call/return ] > >We dont need no call and return instructions. > >The RCA1802 didnt have a call or a return instruction, as such. You >loaded one of the registers with the address of the routine and then used >the "SEP" instruction to cause that register to start working as your PC. >When the routine wanted to return you switched the PC back. Any of the 16 >registers could be used as the PC. iirc, this pushed the nibble pointing to the PC (P?) and another (X?) into another register, didn't it? which could then be pushed to a stack? or was it that there was an instruction to push these to the stack before making the change? And i'll go further out on a limb and try to remember that register 2 was alwasy associated with that stack. rick, who probably grossly overreached his memory . . . -- These opinions will not be those of ISU until it pays my retainer. ###### From: Ken Smith Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: 18 Oct 1998 01:43:03 GMT Organization: a2i network Lines: 22 Message-ID: <70bh37$b9h$1@samba.rahul.net> References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <704s38$dkj$1@samba.rahul.net> <70ak5c$c1q$1@eyry.econ.iastate.edu> NNTP-Posting-Host: waltz.rahul.net NNTP-Posting-User: kensmith Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!newsfeed.wirehub.nl!btnet-peer!btnet!nntprelay.mathworks.com!peerfeed.ncal.verio.net!bug.rahul.net!samba.rahul.net!rahul.net!a2i!kensmith.a2i!kensmith In article <70ak5c$c1q$1@eyry.econ.iastate.edu>, Richard E. Hawkins Esq. wrote: [.....] >iirc, this pushed the nibble pointing to the PC (P?) and another (X?) > into another register, didn't it? which could then be pushed to a >stack? or was it that there was an instruction to push these to the >stack before making the change? And i'll go further out on a >limb and try to remember that register 2 was alwasy associated >with that stack. Time to change the chips in your memory. What you have there is the "mark" instruction that was used to interrupts. An interrupt forced the PC to be R2 (I think) and stored the old setting of that and the X in a temp register. The interrupt code had to get those values back if it ever hoped to return to the main code. I've always figured the designers of that one went home snickering every night. -- -- kensmith@rahul.net forging knowledge ###### From: Jerry Avins Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: Sat, 31 Oct 1998 02:57:22 -0500 Organization: The Hectic Eclectic Lines: 55 Message-ID: <363AC2E2.FC@erols.com> References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <704s38$dkj$1@samba.rahul.net> <70ak5c$c1q$1@eyry.econ.iastate.edu> <70bh37$b9h$1@samba.rahul.net> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: w6gdbjee1EdCNJ9vsJNkIqhEzQVZxksUyR/Z+9WgYwM= X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 31 Oct 1998 07:57:50 GMT X-Mailer: Mozilla 3.01C-DH397 (Win95; I) Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!cpk-news-hub1.bbnplanet.com!news.news.gtei.net!howland.erols.net!master.news.rcn.net!not-for-mail Ken Smith wrote: > > In article <70ak5c$c1q$1@eyry.econ.iastate.edu>, > Richard E. Hawkins Esq. wrote: > > [.....] > >iirc, this pushed the nibble pointing to the PC (P?) and another (X?) > > into another register, didn't it? which could then be pushed to a > >stack? or was it that there was an instruction to push these to the > >stack before making the change? And i'll go further out on a > >limb and try to remember that register 2 was alwasy associated > >with that stack. > > Time to change the chips in your memory. What you have there is the > "mark" instruction that was used to interrupts. An interrupt forced the > PC to be R2 (I think) and stored the old setting of that and the X in a > temp register. The interrupt code had to get those values back if it ever > hoped to return to the main code. I've always figured the designers of > that one went home snickering every night. > > -- > kensmith@rahul.net forging knowledge Actually, the CALL and RETURN structure was quite nice, if you followed the convention in the manual. Although there were some registers dedicated to special purposes in special circumstances, all the registers could do almost anything. R0 was the only register that could be a DMA pointer, and you could only DMA one way at a time Still, at the time, no other micro had built-in DMA. R2 was the interrupt stack pointer; you could use it as the all-purpose stack pointer, but you didn't have to. R3 was a the interrupt data pointer (X), and usually used that way for normal code. R4 and R5 were by convention reserved as dedicated program counters for CALL and RETURN subroutines that were so written that the PCs ended up where they started; they didn't need resetting. The CALL subroutine pushed R6, then stored the return address in it. That way, it served as a link register so a subroutine could pick up in-line parameters from the calling code, inserted right after the CALL instruction (essentially, make R4 the PC). Incrementing the link register after each fetch left it pointing to the next instruction, ready for the return (make R5 the program counter, which unwound everything). Some of the DEC machines had a link register. I miss it! Jerry P.S. It was designed by one guy as a TTL toy. When RCA woke up and decided that they needed a microprocessor in their product line, they just masked his design in CMOS and ran with it. First silicon was on 2 chips (1801), but that didn't last long. A later version had CALL and RETURN op codes, but a lot of new code was in a way to keep the link register. It was that handy. -- Engineering is the art | Let's talk about what of making what you want | you need; you may see from things you can get. | how to do without it. --------------------------------------------------------- ###### From: Jerry Avins Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: Sat, 31 Oct 1998 03:12:50 -0500 Organization: The Hectic Eclectic Lines: 25 Message-ID: <363AC682.1B4@erols.com> References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <3623C8A8.DD4ADEFA@jkmicro.com> <7031k4$1ad$1@void.agames.com> <704s38$dkj$1@samba.rahul.net> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: f3eKY6XQpPf2lp7MUIq5XneLjHuBIPhuwnikltKVQFg= X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 31 Oct 1998 08:13:17 GMT X-Mailer: Mozilla 3.01C-DH397 (Win95; I) Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!nntprelay.mathworks.com!howland.erols.net!master.news.rcn.net!not-for-mail Ken Smith wrote: > > In article , Jeff DelPapa wrote: > > [ weird call/return ] > > We dont need no call and return instructions. > > The RCA1802 didnt have a call or a return instruction, as such. You > loaded one of the registers with the address of the routine and then used > the "SEP" instruction to cause that register to start working as your PC. > When the routine wanted to return you switched the PC back. Any of the 16 > registers could be used as the PC. 8 registers, I think. .. jya > > -- > -- > kensmith@rahul.net forging knowledge -- Engineering is the art | Let's talk about what of making what you want | you need; you may see from things you can get. | how to do without it. --------------------------------------------------------- ###### From: fleetvis@ricochet.net (phil) Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: Sat, 31 Oct 1998 10:26:21 GMT Organization: http://www.supernews.com, The World's Usenet: Discussions Start Here Lines: 16 Message-ID: <363ae4ce.16112438@news.ricochet.net> References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <3623C8A8.DD4ADEFA@jkmicro.com> <7031k4$1ad$1@void.agames.com> <704s38$dkj$1@samba.rahul.net> <363AC682.1B4@erols.com> NNTP-Posting-Host: 204.179.136.48 X-Trace: 909829407 F7W8ZAFJM8830CCB3C usenet78.supernews.com X-Complaints-To: newsabuse@supernews.com X-Newsreader: Forte Free Agent 1.11/32.235 Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!newsgate.cistron.nl!het.net!news-feed.inet.tele.dk!bofh.vszbr.cz!newsfeed.direct.ca!Supernews73!supernews.com!Supernews69!not-for-mail On Sat, 31 Oct 1998 03:12:50 -0500, Jerry Avins wrote: >Ken Smith wrote: >> The RCA1802 didnt have a call or a return instruction, as such. You >> loaded one of the registers with the address of the routine and then used >> the "SEP" instruction to cause that register to start working as your PC. >> When the routine wanted to return you switched the PC back. Any of the 16 >> registers could be used as the PC. >8 registers, I think. .. jya Pretty sure it was 16 registers. Worst processor i ever used. Sucked donkeys but it was CMOS. phil. ###### From: Ken Smith Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: 31 Oct 1998 23:35:38 GMT Organization: a2i network Lines: 39 Message-ID: <71g6sa$lpk$1@samba.rahul.net> References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <70ak5c$c1q$1@eyry.econ.iastate.edu> <70bh37$b9h$1@samba.rahul.net> <363AC2E2.FC@erols.com> NNTP-Posting-Host: waltz.rahul.net NNTP-Posting-User: kensmith Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!peerfeed.ncal.verio.net!bug.rahul.net!samba.rahul.net!rahul.net!a2i!kensmith.a2i!kensmith In article <363AC2E2.FC@erols.com>, Jerry Avins wrote: >Ken Smith wrote: [... stuff about the 1802 ....] > >Actually, the CALL and RETURN structure was quite nice, if you followed >the convention in the manual. IMO, you obviously have a very sick and twisted view of what is "quite nice". I wrote the code for two products that used the 1802. The fact that the CALL routine overwrote the D, meant that I could not pass parameters via the D. The large overhead in volved meant that I had to straight line code the printer driving software. >Although there were some registers >dedicated to special purposes in special circumstances, all the >registers could do almost anything. I disagree. All the registers could do almost nothing. They had to be loaded via the D. You could not use them as operands in math instructions. > R0 was the only register that could >be a DMA pointer, and you could only DMA one way at a time Still, at the >time, no other micro had built-in DMA. [.... stuff I agree with and am not commenting on ....] >resetting. The CALL subroutine pushed R6, then stored the return address >in it. That way, it served as a link register so a subroutine could pick >up in-line parameters from the calling code, inserted right after the This was the method I used to pass parameters. It means that parameters have to be constants. -- -- kensmith@rahul.net forging knowledge ###### From: Ken Smith Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: 31 Oct 1998 23:45:03 GMT Organization: a2i network Lines: 14 Message-ID: <71g7dv$lr5$1@samba.rahul.net> References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <704s38$dkj$1@samba.rahul.net> <363AC682.1B4@erols.com> <363ae4ce.16112438@news.ricochet.net> NNTP-Posting-Host: waltz.rahul.net NNTP-Posting-User: kensmith Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!news-peer.gip.net!news.gsl.net!gip.net!peerfeed.ncal.verio.net!bug.rahul.net!samba.rahul.net!rahul.net!a2i!kensmith.a2i!kensmith In article <363ae4ce.16112438@news.ricochet.net>, phil wrote: [....] >Pretty sure it was 16 registers. If anyone really cares I can go look it up. I still have the manual for it. Its at work, but I'm at home right now. -- -- kensmith@rahul.net forging knowledge ###### From: jasnider@iglou2.iglou.com (Pat Larkin) Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <704s38$dkj$1@samba.rahul.net> <363AC682.1B4@erols.com> <363ae4ce.16112438@news.ricochet.net> <71g7dv$lr5$1@samba.rahul.net> User-Agent: slrn/0.9.5.3 (UNIX) NNTP-Posting-Host: 192.107.41.17 X-NNTP-Posting-Host: 192.107.41.17 Message-ID: <363bfbce.0@news.iglou.com> Date: 1 Nov 1998 01:12:30 -0500 X-Trace: 1 Nov 1998 01:12:30 -0500, 192.107.41.17 Lines: 15 X-NNTP-Posting-Host: 192.107.41.52 Organization: IgLou Internet Services, Inc. Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!news.shore.net!uunet!in1.uu.net!news.iglou.com!jasnider In article <71g7dv$lr5$1@samba.rahul.net>, Ken Smith wrote: >In article <363ae4ce.16112438@news.ricochet.net>, >phil wrote: >[....] >>Pretty sure it was 16 registers. > >If anyone really cares I can go look it up. I still have the manual for >it. Its at work, but I'm at home right now. Sixteen sixteen-bit registers, 0 through F, any of which could be set to be Program Counter or X (stack) register (SEP and SEX op codes). Playing with one of these taught me a lot! (Wish I could still remember half of it! Pat Larkin First initial Last name @ iglou.com ###### From: Jerry Avins Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: Mon, 02 Nov 1998 13:51:39 -0500 Organization: The Hectic Eclectic Lines: 52 Message-ID: <363DFF3B.6623@erols.com> References: <6vtj2o$19ii$1@ausnews.austin.ibm.com> <70ak5c$c1q$1@eyry.econ.iastate.edu> <70bh37$b9h$1@samba.rahul.net> <363AC2E2.FC@erols.com> <71g6sa$lpk$1@samba.rahul.net> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: MRvrkNO/MB3LWTRmE2uD0yq/bhAO3okz/0GMhFtG/nk= X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 2 Nov 1998 18:52:01 GMT X-Mailer: Mozilla 3.01C-DH397 (Win95; I) Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!newsgate.cistron.nl!het.net!newsfeed.wirehub.nl!howland.erols.net!master.news.rcn.net!not-for-mail My sick and twisted mind found an easy way to pass variables: push them onto the stack. (To get at them without the return address getting in the way, you could implement a separate passing stack.) You could also pass a limited number in registers. I believe that both methods are still used. Jerry -- Engineering is the art | Let's talk about what of making what you want | you need; you may see from things you can get. | how to do without it. --------------------------------------------------------- Ken Smith wrote: > > In article <363AC2E2.FC@erols.com>, Jerry Avins wrote: > >Ken Smith wrote: > > [... stuff about the 1802 ....] > > > >Actually, the CALL and RETURN structure was quite nice, if you followed > >the convention in the manual. > > IMO, you obviously have a very sick and twisted view of what is "quite > nice". I wrote the code for two products that used the 1802. The fact > that the CALL routine overwrote the D, meant that I could not pass > parameters via the D. The large overhead in volved meant that I had to > straight line code the printer driving software. > > >Although there were some registers > >dedicated to special purposes in special circumstances, all the > >registers could do almost anything. > > I disagree. All the registers could do almost nothing. They had to be > loaded via the D. You could not use them as operands in math > instructions. > > > R0 was the only register that could > >be a DMA pointer, and you could only DMA one way at a time Still, at the > >time, no other micro had built-in DMA. > > [.... stuff I agree with and am not commenting on ....] > > >resetting. The CALL subroutine pushed R6, then stored the return address > >in it. That way, it served as a link register so a subroutine could pick > >up in-line parameters from the calling code, inserted right after the > > This was the method I used to pass parameters. It means that parameters > have to be constants. > > -- > -- > kensmith@rahul.net forging knowledge ###### From: Charles Richmond Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: Tue, 03 Nov 1998 22:34:36 +0000 Organization: Cannine Computer Center Lines: 19 Message-ID: <363F84FB.8CA93F1E@plano.net> References: <363DFF3B.6623@erols.com> <71o5nh$tpr$7@irk.zetnet.co.uk> Reply-To: richmond@plano.net NNTP-Posting-Host: 209.44.41.239 Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: 910153924 R67V8VHUD29EFD12CC usenet52.supernews.com X-Complaints-To: newsabuse@supernews.com X-Mailer: Mozilla 4.04 (Macintosh; I; 68K) To: lisard@zetnet.co.uk Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!newsfeed.wirehub.nl!howland.erols.net!Supernews73!supernews.com!Supernews69!not-for-mail lisard@zetnet.co.uk wrote: > > On 1998-11-02 jyavins@erols.com said: > :My sick and twisted mind found an easy way to pass variables: push > :them onto the stack. (To get at them without the return address > :getting in the way, you could implement a separate passing stack.) > > Jerry, that's beginning to sound dangerously Forth-like... ;> Which is a > point. How would you have written an inner interpreter in 1802 code? > Seems like the Forth Interest Group offered the assembly code for a FORTH interpreter for the RCA 1802. I know they had FORTH's for the Motorola 6800, Motorola 6809, PDP-11, Intel 8080, and MOS Technology 6502--because I ordered the assembly listings for *all* of these from FIG. -- +-------------------------------------------------------------+ | Charles and Francis Richmond | +-------------------------------------------------------------+ ###### From: lisard@zetnet.co.uk Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: 4 Nov 1998 00:05:05 GMT Lines: 17 Message-ID: <71o5nh$tpr$7@irk.zetnet.co.uk> References: <363DFF3B.6623@erols.com> NNTP-Posting-Host: man-037.dialup.zetnet.co.uk X-Trace: irk.zetnet.co.uk 910137905 30523 194.247.41.46 (4 Nov 1998 00:05:05 GMT) NNTP-Posting-Date: 4 Nov 1998 00:05:05 GMT X-Everything: Net-Tamer V 1.08X Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news.belnet.be!195.200.0.51.MISMATCH!newshub.bart.net!ayres.ftech.net!news.ftech.net!peer.news.zetnet.net!zetnet.co.uk!not-for-mail On 1998-11-02 jyavins@erols.com said: :My sick and twisted mind found an easy way to pass variables: push :them onto the stack. (To get at them without the return address :getting in the way, you could implement a separate passing stack.) Jerry, that's beginning to sound dangerously Forth-like... ;> Which is a point. How would you have written an inner interpreter in 1802 code? :You could also pass a limited number in registers. I believe that :both methods are still used. "TOS cache"? -- Communa (together) we remember... we'll see you falling you know soft spoken changes nothing to sing within her... ###### From: Ken Smith Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: 4 Nov 1998 00:45:16 GMT Organization: a2i network Lines: 23 Message-ID: <71o82s$b02$1@samba.rahul.net> References: <363DFF3B.6623@erols.com> <71o5nh$tpr$7@irk.zetnet.co.uk> NNTP-Posting-Host: foxtrot.rahul.net NNTP-Posting-User: kensmith Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!news.pbi.net!bug.rahul.net!samba.rahul.net!rahul.net!a2i!kensmith.a2i!kensmith In article <71o5nh$tpr$7@irk.zetnet.co.uk>, wrote: > > >On 1998-11-02 jyavins@erols.com said: > :My sick and twisted mind found an easy way to pass variables: push > :them onto the stack. (To get at them without the return address > :getting in the way, you could implement a separate passing stack.) > >Jerry, that's beginning to sound dangerously Forth-like... ;> Which is a >point. How would you have written an inner interpreter in 1802 code? At that time you just wrote a check to RCA for CDP18S820. It was called "microFORTH System for the CDP1802 COSMAC Microprocessor" I am looking at the data sheet for it as I type this, and I know someone that used it, so it was real. If you think the FORTH was slow you should have seen the basic. -- -- kensmith@rahul.net forging knowledge ###### From: Jerry Avins Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers Subject: Re: self-modifying code Date: Wed, 04 Nov 1998 02:48:04 -0500 Organization: The Hectic Eclectic Lines: 27 Message-ID: <364006B4.843@erols.com> References: <363DFF3B.6623@erols.com> <71o5nh$tpr$7@irk.zetnet.co.uk> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Trace: FDuEtBDYpmKf/3qxmwlpwMebm4sa2zovLpMP6ozzC/4= X-Complaints-To: abuse@rcn.com NNTP-Posting-Date: 4 Nov 1998 07:48:29 GMT X-Mailer: Mozilla 3.01C-DH397 (Win95; I) Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!news.maxwell.syr.edu!howland.erols.net!master.news.rcn.net!not-for-mail Forth, Inc. had an 1802 version of Forth early on. That was my first exposure to Forth, but unfortunately, the project died before I got much into it. You could ask Elizabeth Rather. (I think the port turned out to be a financial disaster, but I once heard her speak of it fondly. it _was_ a nice machine, designed expressly for implementing interpreters.) Jerry -- Never wrestle with a pig. You'll both get dirty, but the pig likes it. ---------------------------------------------------------------------- lisard@zetnet.co.uk wrote: > > On 1998-11-02 jyavins@erols.com said: > :My sick and twisted mind found an easy way to pass variables: push > :them onto the stack. (To get at them without the return address > :getting in the way, you could implement a separate passing stack.) > > Jerry, that's beginning to sound dangerously Forth-like... ;> Which is a > point. How would you have written an inner interpreter in 1802 code? > > :You could also pass a limited number in registers. I believe that > :both methods are still used. > > "TOS cache"? > -- > Communa (together) we remember... we'll see you falling > you know soft spoken changes nothing to sing within her... ###### Newsgroups: comp.os.cpm,comp.arch.embedded,alt.folklore.computers From: "Ralph Wade Phillips" Subject: Re: self-modifying code X-Nntp-Posting-Host: zs150050.shrv.bna.boeing.com Message-ID: X-Mimeole: Produced By Microsoft MimeOLE V4.72.3110.3 Lines: 40 Sender: nntp@news.boeing.com (Boeing NNTP News Access) Organization: The Boeing Company X-Newsreader: Microsoft Outlook Express 4.72.3110.5 References: <363DFF3B.6623@erols.com> <71o5nh$tpr$7@irk.zetnet.co.uk> Date: Thu, 5 Nov 1998 16:12:45 GMT Path: chonsp.franklin.ch!pfaff.ethz.ch!news-zh.switch.ch!news-ge.switch.ch!isdnet!howland.erols.net!feed1.news.rcn.net!rcn!newsfeed.xcom.net!news.shore.net!uunet!in2.uu.net!xyzzy!nntp Hi there! lisard@zetnet.co.uk wrote in message <71o5nh$tpr$7@irk.zetnet.co.uk>... > > >On 1998-11-02 jyavins@erols.com said: > :My sick and twisted mind found an easy way to pass variables: push > :them onto the stack. (To get at them without the return address > :getting in the way, you could implement a separate passing stack.) > >Jerry, that's beginning to sound dangerously Forth-like... ;> Which is a >point. How would you have written an inner interpreter in 1802 code? I don't know, but one of the languages that we (meaning the R&D department where I worked in the late 70's - yeah, SOMEONE had to sweep the floors and empty the trash, and that someone was ME, but I !WAS! on the team ... > :You could also pass a limited number in registers. I believe that > :both methods are still used. > >"TOS cache"? >-- >Communa (together) we remember... we'll see you falling >you know soft spoken changes nothing to sing within her...