estimated config bits sizes for some PALs and FPGAs
author Neil Franklin, last modification 2002.04.25

chip                FFs                 config bits


PALs

PAL16R8      8x1 =    8     8x8  x16x2 =    2048
PAL20R8      8x1 =    8     8x8  x20x2 =    2560
PAL32R16    16x1 =   16    16x8  x32x2 =    8192
PAL64R32    32x1 =   32    32x8  x64x2 =   32768
PAL18V8      8x1 =    8    8x13  x18x2 =    3744+Cell( 8x2=16)
PAL22V10    10x1 =   10   10x13  x22x2 =    5720+Cell(10x2=20)
ATV750B     10x2 =   20   10x17  x22x2 =    7480+Cell(12xca5=60)
ATV2500B    24x2 =   48   24x17  x84x2 =   68544+Cell(24xca5=120)


smallish Virtex FPGAs, plus some small hypothetical sizes

....1     2x 3x4 =   24    2x 3 x48x18 =    5184+I( 10x900=  9000)
....2     3x 4x4 =   48    3x 4 x48x18 =   10368+I( 14x900= 12600)
....4     4x 6x4 =   96    4x 6 x48x18 =   20736+I( 20x900= 18000)+B( 2x4096)
....10    6x 9x4 =  216    6x 9 x48x18 =   46656+I( 30x900= 27000)
XC2S15    8x12x4 =  384    8x12 x48x18 =   82944+I( 40x900= 36000)+B( 4x4096)
XC2S30   12x18x4 =  864   12x18 x48x18 =  186624+I( 60x900= 54000)+B( 6x4096)
XC2S50   16x24x4 = 1536   16x24 x48x18 =  331776+I( 80x900= 72000)+B( 8x4096)
XC2S100  24x36x4 = 3456   24x36 x48x18 =  746496+I(120x900= 98000)+B(12x4096)
XCV300   32x48x4 = 6144   32x48 x48x18 = 1327104+I(160x900=144000)+B(16x4096)


hypothetical Virtex logic cells in an PAL-like wiring

14C6         6x2 =   12    6x12  14+12 =    1872+Cell( 6xca50= 300)
18C8         8x2 =   16    8x12  18+16 =    3264+Cell( 8xca50= 400)
22C10       10x2 =   20   10x12  22+20 =    5040+Cell(10xca50= 500)
30C14       14x2 =   28   14x12  30+28 =    9744+Cell(14xca50= 700)
38C18       18x2 =   36   18x12  38+36 =   15984+Cell(18xca50= 900)
46C22       22x2 =   44   22x12  46+44 =   23760+Cell(22xca50=1100)
62C30       30x2 =   60   30x12  62+60 =   43920+Cell(30xca50=1500)
82C40       40x2 =   80   40x12  82+80 =   77760+Cell(40xca50=2000)