http://neil.franklin.ch/Projects/VirtexTools/FAQ author Neil Franklin, last modification 2002.10.14 Frequently* Asked Questions (FAQ) for the VirtexTools project * not really frequent, but that is what such files are called Q: What is a Virtex? A: It is an FPGA (Field Programmable Gate Array) chip made by Xilinx. Q: What is an FPGA? A: It is a chip containing an regular grid (array) of programmable logic elements (4LUTs) paired with FFs and programmable interconnect to connect all of them. It allows single and small series circuits to be realised in an single VLSI chip instead of an pile of TTL chips. Q: What is a 4LUT? A: It is an 4-input Look Up Table, basically an 4 address line, 16 bit, 1 output line SRAM. It is used by specifying the desired output value for every of the 16 possible input combinations of the 4 lines. Q: What are these XAPP138 and XAPP151 things? A: Xilinx Application Notes No 138 and 151. Basically an partial documentation of the Virtex bitstream format. It details the positions of the LUTs, FFs, BRAMs and IOBs in the file. It also details the basic config stream format, and config headers. It also details how to download configuration and read back chip state. Q: Why not just use the JBits tools? A: Bitfile generating requires Java, which being an non-FPGA-specific language requires bloated code, with lots of non-design verbosity. So it distracts and slows down programmers. SO I want an more optimal code generator. BoardScope does not show the LUT contents, only the FFs. Requires constantly re-counting LUT positions. It is also slow due to being written in Java and using Swing. So I want an more optimal bitstream viewer and debugger. Q: Why not use other Xilinx tools, such as FPGA editor? A: They run only on Windows or Solaris. I have neither, as I use Linux. I have neither the money or space to get and run an Sun, nor the nerves to put up with anything made by Microsoft. Q: Why an tool to generate bitstreams? A: Because the existing tools are not sufficient. Limits, such as only few available for Linux, the available one using Java and resulting code verbosity, non optimal routing requiring workarounds in user code, closed source requiring fixing by vendors and no safe future, make them frustrating to use for anyone used to open source software. Q: What will be *better* about it than the tools already in use? A: All that in open source is better: - simple download/compile/install/use, any computer/OS native - no licensing, can give copy to anyone. allows "config&compile at customers site" designs, and yes, that includes "customer selects modules and generates bitstream that runs them" style adaption to modular interface hardware (see recompiling Linux kernel as an example) - bugs can be fixed by anyone, or more likey have already got fixed before you ever hit them, even OpenBSD style code audits go - guaranteed to remain available (because user-adaptable to new systems ad infinitum), no forced upgrade cycle - anyone can add their brains to development, wherever they have the expertise (compare the open process of science vs pronouncements from high from any closed governing body) Q: Why an tool to visualise FPGAs? A: See the entry for vd and vv in the first section of the README file at: http://neil.franklin.ch/Projects/VirtexTools/README Q: Why an tools to load LUT-RAMs and BRAMs? A: To avoid the time cost of having to regenerate an entire bitstream to just change an few simple to set bits. Good for reloading programs or microcode or for setting serial numbers. Q: Where can I get code? A: The newest (read: in edit, sometimes not functional) from: http://neil.franklin.ch/Projects/VirtexTools/ or as .tar.gz as: http://neil.franklin.ch/Projects/VirtexTools.tar.gz Various milestones (read: archives, of working stuff) from: http://neil.franklin.ch/Projects/VirtexTools-/ or as .tar.gz as: http://neil.franklin.ch/Projects/VirtexTools-.tar.gz