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; avr_registers.inc - my systematic usage and naming of AVR registers
; author Neil Franklin, last modification 2009.04.02

; large amount of (nearly) orthogonal registers in AVR
;   allows specialised usage (and naming) instead of simply "use next"
; quite a few spaceial cases where some instructions expect stuff
;   this requires placing to fit these
; register usage and calling conventions for speed
;   callee-push/pop minimises code but allways runtime overhead
;   caller-push/pop minimises runtime overhead but repeated code
; large amount allow optimising call conventions, save push/pop code+time+stack
;   some used for callee, caller pushes, only if it needs these
;   some used for caller, callee pushes, only if it needs these
;   with an good splitting policy only push/pop in multilevel calls
; this system is partly derived from official nomenclature of MIPS processor
;   also naming choice ist partially taken from there


; instruction set specialty registers, with 16bit
;   on all 16bit regisger pairs use *H:*L naming
;   for temporary stuff use ZH:ZL, XH:XL, MH:ML, permanent DH:DL, YH:YL

; registers usable for X Y and Z addressing

.def ZL = R30   ; often special use, all lpm, often changed, ideal 16bit *temp*
.def ZH = R31   ;   callee may use any time, caller push if still in use

.def YL = R28   ; only non-Z with +q addressing, potential frame pointer
.def YH = R29   ;   so use in entire caller, callee push if used as third

.def XL = R26   ; often 2 pointers are quickly needed, not Y for this, *temp*
.def XH = R27   ;   callee may use any time, caller push if still in use

; other registers with 16bit arithmetic (only adiw and sbiw), D = Double

.def DL = R24   ; never changed unneccessary, can have lasting stuff
.def DH = R25   ;   must survive entire caller, callee push if used

; registers needed for 16bit multiplication result, M = Multiplication

.def ML = R0    ; change at any multiplication, not lasting stuff, as *temp*
.def MH = R1    ;   callee may use any time, caller push if still in use


; instruction set normal registers, only 8bit

; registers with immediate instructions (ldi, subi, sbci, cpi, andi, ori)
;   are R16..R31, rest of these gives R16..R23

; immediate temporaries (and parameters and return values), T = Temp

.def T0 = R16   ; often changed, callee fast usage, as 8bit *temp*
.def T1 = R17   ;   callee may use any time, caller push if still in use
.def T2 = R18

; immediate saved (and loop counters), S = Save

.def S0 = R19   ; never changed unneccessary, can have lasting stuff
.def S1 = R20   ;   must survive entire caller, incl calls, callee push if used
.def S2 = R21

; immediate for interupts service routines (any type of use), I = Interrupt

.def I0 = R22   ; not used in normal code, only for interrupt, ISR without push
.def I1 = R23   ;   therefore also survive between multiple interrupt calls


; instruction set reduced functionality registers, 8bit

; registers without immediate instructions, but with everything else
;   are R0..R15, rest of these gives R2..R15

; fast direct access (register not memory) variables, F = Fast
;   but also rename these in whatever program uses them, from R15 downwards

.def F0 = R2    ; must survive entire program, callee push if used
.def F1 = R3    ;   this may be changed on an per project base
.def F2 = R4
.def F3 = R5
.def F4 = R6
.def F5 = R7
.def F6 = R8
.def F7 = R9
.def F8 = R10
.def F9 = R11
.def F10 = R12
.def F11 = R13
.def F12 = R14
.def F13 = R15

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