Controller Selection author Neil Franklin, last modification 2007.05.31 devices looked at: 6502 maxes out at 4MHz, with avg 3clock/instr only 1.3MIPS, too slow actually ZX-80/81 style ca 20 1cycle instr (= 4bit/instr) direct (no chargen) 25.18/8=3.15MHz, 800/8*4/5*4bit/line, = 320pix@1bpp or 160pix@2bpp good enough for nearly all VCS style or even C64 style games more work, separate proc + Flash + SRAM + decode + shift reg + colouriser decoder unknown 20 1istr -> 16bitmaps and start/stop, shift 2* 2bit colourizer 4 74LS374, 2 74LS138 for read + write decode, max 2bpp/4colour no ISP reprogramming of ext Flash, and no JTAG in CPU to emulate it OTOH allows 32k SRAM, full picture (but also requires), leaves 32k Flash and instruction set I know, and classic components/system bonus 65C02 possibly up to 10MHz, same also 65C816, 10*4Mbit/s, 210@4bpp one single 65816 based microcontroller, no bus, too slow, oddball product Z80 maxes out at 10MHz, 2.5Minstr, avg 1.2MIPS, too slow but can do ZX-80/81 style "DMA", slower instr count, but more 1 cycle instr so can decode 6bits/instr instead of 4, allows 3pixel@3bpp, shift 2* 3bit 25.18/(3*4)=2.10MHz, 800/12*4/5*6bit/line, so 320@1bpp or 160@2bpp Z84C00 goes up to 20MHz, 5*6Mbit/s, even with 3bit/Pixel 10MHz, 210@3bpp also modern eZ80 parts, 1clock/cycle, high clock frequency, SRAM on chip possibly no Flash on chip, but seem to be extremely embedded web focus and no mentioning of Linux tools, no known open source tools for it 6809/68HC11/68HC12/68k, colleage says they have fast 16bit parts Motorolas website is even worse than normal, failled entirely spun off Freescale, revisit that address, still lousy javascript, semi works focus split wireless/net/automotive, no general, in auto found microcontroll 6809 not mentioned, 68HC05 max 2.1MHz, 68HC11 max 4MHz, 68HC12 max 8MHz 68HSC12 max 25MHz (hmmm), 683xx max 25MHz (but divided like all 68k) 56800/E max 120MHz (but DSP, multi memory bus), PPC max 105MHz (OK, cache?) but not much open source support, none found in woody apt-cache search 8051 looks like it still is largest ind standard, up to 64k ROM 256+64k SRAM many vendors but many no Flash, often just funny IO added but slow at 12clocks/cycle and 1..4 cycles/instr, 12..60Mhz = 0.5..6MIPS as output instr (MOV SFR,A) are in 12-cycle, 6MHz, 150@8bpp, 300@4bpp alternative read external SRAM (MOV A,@xx), same speed Atmel has 20MHz/20MIPS AT89LV*, but only 4k Flash 256bytes SRAM 20pin, no ext and output instructions (MOV SFR,A) are 2-cycle, so only 10MIPS Analog Devices also has 20MHz/20MIPS ADUC841, 62k Flash, 2k SRAM, but LQCSP also no external memory, to do ZX-80/81 like Dallas/Maxim has 33MHz/33MPIS DS89C4[35]0, with 16/64k Flash, 40pin DIP and also 1K SRAM, can even be used for Data->Code space transition Silicon Labs hat up to 100MHz/100MIPS, but little support for DIP all 1-cycle parts are more or less nonstandard, diff rates, diff extensions would have to limit to 10MHz, and not use DPTR extensions or SRAM PIC widely liked with hobbyists, and 16bit instr PIC18 has decent memory size but except PIC18 awfull instruction set, address extensions needed at 4clock/instr, ..40MHz ..10MIPS, but have PLL modes, but only clock reduce large support by open source tools, even woody has 8 packages but proprietary architecture, if ignoring Ubicom clone Ubicom SX has 75MHz/MIPS, but old 12bit PIC16C5x 512x12 Flash 24byte SRAM clone upgraded with memory management to max 4kx12 Flash and 8+26*16byte SRAM DIP only SX28 28pins with halved memory, full memory only in SX52 PQFP mem managment looks like a bugger to program, but is best from speed so far preloading special registers before >512byte jump or full indir full SRAM used in the xgamestation (52 in micro, 28 in nano), can even do NTSC/PAL not only clone of proprietary architecture, but officially dead AVR 16MHz/MIPS, one arch from small 8pin up to 256k Flash 16k SRAM 100pin examples ATmega162 16k Flash and 1k SRAM, 16MHz, 35IOs on DIP40, largest DIP new ATmega2561 256k Flash, 8k SRAM, 16MHz, 51IOs on TQFP64 and new (preliminary) 20MHz/MIPS, but only up to ATmega168 16k Flash 1k SRAM max 23IOs on DIP28, may not fit 8vid, 1|6 audio, (2*)5 joyst, 3 paddl, clk also newest (advance info) 20MHz/MIPS, up to ATmega644 64k Flash 4k SRAM max 32IOs on DIP40, so full 32 IOs of 16k/32k (exept 8515/162 35 IOs) best on everything but speed up to now, overclocking possible? largest support by open source tools, woody has 10 packages, sarge even more and quite a few people in LUGS and LUG-Camp have experience with these proprietary architecture, but no worse than extended 8051 ARM7T Atmel AT91SAM7S* 55MHz/50MIPS 256k Flash (>30MHz waits!) 64k SRAM had USB support but only device not host, so useless for access USB sticks also AT91RM3400 66MHz/60MIPS no Flash 96k SRAM (use like 64k Flash 32k SRAM) needs serial EEPROM to boot, but result allways single-cycle memory instead of just 64k boot EEPROM, use large (up to 16M) SPI Flash "disk" or use hardware support for external SD/MMC Flash disk memories largest amount of GPIO pins, as no external bus, near ideal, USB dev-only also AT91R40008 75MHz/70MIPS no Flash 256k SRAM, ext par Flash boot, no USB even better SRAM, but full external bus Flash costs IOs, back to average variants AT91FR40* with 2nd 512/2048k Flash chip in casing, ideal but only in BGA cases, so not processable, so unusable but all of these have QFP cases, need (available) PGA adaptors for 2.54mm this may then also interfere with external memory bus speed, load into SRAM also ARM ist a compicated architecture, all the SOC around it even more so ARM9 Atmel AT91RM9200 180MHz 200MIPS ARM9 no Flash only 16k SRAM, USB dev+host needs extern Flash and SDRAM, lots of external bus wiring, LQFP and few IOs hardware support for external SD/MMC and CF and USB sticks (by USB host) not usable for project, because of caches introducing irregular timing but nice for small Linux sys, see sbc.twibright.com for open source board ARM Intel XScale PXA270 520MHz 256k SRAM, extern par Flash boot, USB host but requires external Flash, and is in an BGA case, not usable not usable for project, because of caches introducing irregular timing 8088/80x86/PC high speed (upto GHz) but slow IO (parport on ISA or LPC bus) processor speed irregular from having cache, but parport waits semi-sync large memory, all DRAM, with BIOS boot from disk drive, but slow startup only few and weak GPIO (parport) but already separate PS/2, RS232, ether but requires external stuff to be self-powered, or from non-parport and large size and power consumption cooling requirement and noise but already existant device, no buying parts, no soldering and no loading programs via development sys parport onto non running system but can reboot into full OS with ssh, and even local compile if multitasking irregularities akzeptable no need for 2nd, use dev system development tools full as86/ld86 available, for dev PC anything one wants 80188/186 non-PC could be quite fast, quite large memory partial controller features (timer, DMA, ...), but needs external memory chips (has CS unit for this) conclusion up to now for first experiments use PC parport, ev 2nd PC running raw 8088 code looks like going for 16MHZ or 20MHz (overclocked to 25MHz) 28|40pin AVR if these are fast enough (at 3 or 4 instr/pixel for 160pixel/line VGA) or 66MHz AT91RM3400 and external SPI Flash, needed if larger system is wanted of if von Neumann code-from-SRAM wanted, for full local OS, load programs theoretically 75MHz SX is in race, has speed, but programming awfull and small and architecture is end of lifed, so no future, that kills it