Microcontroller based CPU Emulators author Neil Franklin, last modification 2008.04.30 uC alternative to making transistor logic or TTL or PAL|GAL computer this uses higher integrated chips, so less of them, so smaller device less buying parts and wiring them, so more can be made and also most likely less power needed, smaller supply, less cost uC to emulate CPU, proc engine, ROM microcode, RAM registers, ports CPU bus basically a microcoded machine (c.f. original meaning of microprocessor!) and also what the original 4004 was invented for, microcoded calculator and 8008 for microcoded terminal control logic but slower unless fast (>100MHz) 68k or even ARM based uC or DSP is used possibly even use an existing small computer such as Linksys NSLU-2 gives CPU + Flash + SRAM + Ether + USB + clock + power all prewired but is then in the end is just an 100% software emulator on small system aim for PDP-8 or PDP-11 or PDP-1 or Xerox Alto or any similar size historic CPU or clone Z80 or 6502 or any other 8/16bit also 8088 or T212 or simple 16bit RISC is possible or go for own 8/16bit design, improved 8080 or 6502 style or even go up to an Lisp Machine, or Forth machine also something like 8052 Basic or Basic Stamp for small 8/16bit systems an 16/20MHz AVR should suffice for speed either fastest 33..100MHz 8051 or even 75..100MHz Ubicom SX uC or right up to an modern fast >100MHz high integrated 32bit controller CPU with an 8/16/32bit uC as microengine to emulate the CPU or even go for one of the >500MHz semi-DSP/semi-CPU chips this is software-wise just a normal CPU emulator, on uC harward machine but using uC PIO pins and ext memory instead of array in internal memory for the emulated CPUs memory, and so has more "hardware" feel to it real RAM and IO devices main difference to simply emulator running on PC internal memory only for microcode and processor state/registers external SRAM up to 2*512kx8 (for 1M) or 2*128kx8 (256k) or 2*32kx8 (64k) possibly split into half SRAM and half Flash for BIOS or system or similar offer microcode boot option to download to BIOS/system memory if no Flash use small bit of microcode for booting from emulated disk offer microcode boot option to download/install "disk" contents use PIO ports for accessing emulated systems memory and IO externally and no uC IO device emulation, as that is external as real circuits which is usually anyway the largest fun in constructing computers apart from instruction set design, which is in the microcode 4*8bit PIO ports allow 16A+8D or 12A+12D or muxed 16A/D or muxed 4A+16A/D plus space for memory control signals and interrupts enough to address 64kbyte or 64kword machine, or even 1Mbyte or 1Mword worst case PDP-8 8*4kx12 -> 8*4k*2x6, 64kx6, 3/4 of 2 32kx8 chips if possible use uC "external memory" interface for A/D/C driving pins 8051 uC use MOVX 64k Interface, AVR uC use 8bit A with top 8bit IOs alternative leave C at "read" and just OUT A + IN D, but loses muxing external hardware TTL|PAL|GAL for making MMU/segments or do this also inside software possibly too slow for this, unless just slow/simple expanded 12bit segmentation possibly 20bit PC, add when jump/call/ret, sub when call store for emulated disk, very small one use part of uC internal Flash or for larger use uC I2C or SPI connector with 8pin SEEPROM or SFlash for this uC will have to emulate an disk controller or external on PIO A+D bus 32pin Flash as "disk" with TTL address gen 128kx8bit with 9bit "byte" zero/increment reg and 8bit "sector" load reg gives 256 512byte sectors, PC-style floppy but small 512kx8bit with 8it "byte" zero/increment reg and 11bit "sector" load reg gives 2048 256byte sectors, more old fashioned floppy style or external on PIO A+D bus simple par/ser..ser/par and SPI SFlash chip 128kx8bit as 1024 "sectors" of 1024/8=128bytes 512kx8bit as 2048 "sectors" of 2048/8=256bytes or 2nd uC with either sort of Flash behind it, hides details may even be SD or CF (smaller and big enough) or IDE disk (full size/speed) or even just USB storage support with anything behind it uC just protocol, A+D bus based external, or RS232 or I2C or SPI internal for user IO, possibly use uC internal RS232 and ext terminal/pc/etc but for this uC will have to emulate an RS232 controller, or special IO instr better use an existing external hardware RS232 chip, mapped into IO space for for video display on [F]BAS TV Cinch or VGA HD15 (VGA ev every 2nd line) use framebuffer SRAM and video generator addr counter and shift regs pure HW bitmap like on non-charmode video cards, onto FBAS or VGA moni minimal would be about 8k SRAM, 320x200x1bpp maximal about 32k SRAM, 640x200x2bpp or 640x400x1bpp for access possibly short address and line select on card for this linesegment+offset, or go for 256 or 512 pixel/line or on fast uC simulate video chip video output with techniques such as Gunnee PIC|SX Pong|Tetris games colour video requir 100MHz, but CGA res VGA only 33MHz, full VGA 100MHz uC just protocol A+D bus ext, or RS232 or I2C or SPI internal use some handshaked protocol so that uC don't need disturbing by IRQs may be more interesting as the entire rest of emulator project in meantime lead to http://neil.franklin.ch/Projects/SoftVGA/ project or integrate this into main uC, but requires more pins, and processor load OTOH it saves even more on chips, makes very small system but separate uCs are preferrable, for flexible and undisturbed timing for keyboard PS/2 or possibly USB HID support or Apple I and ][ style parallel with own uC, or C64 style matrix for mouse 2nd PS/2 or RS232 or 2nd USB HID support for joystick Atari DB9 or PC DB15 or 3rd USB HID support printer leave away, or (miss-)use mouse RS232, or PC-like LPT possibly integrate key/etc onto video uC, making an simulated RS232 terminal which is what the original 8008 was invented for, microcoded terminals