http://neil.franklin.ch/Projects/PDP-10/pdp10.sld - design of processor state logic diagram automatically grep-ed from pdp10.java, last generation 2002.06.25 A B C D E F G H I J K L M N O in state insget (Instruction Get) MAM-Mux=PC IR.OP-Mux=IR.AC-Mux=IR.I-Mux=IR.X-Mux=MA-Mux=MD ClkE-IR+MA=1 PC-Mux=PC+1 ClkE-PC=1 state=insexec in state insexec (Instruction Execute) if IR.X MAM-Mux=IR.X IR.OP-Mux=IR.AC-Mux=IR.I-Mux=IR IR.X-Mux=0 MA-Mux=MA+MD ClkE-IR+MA=1 state=insexec elseif IR.I MAM-Mux=MA IR.OP-Mux=IR.AC-Mux=IR IR.I-Mux=IR.X-Mux=MA-Mux=MD ClkE-IR+MA=1 state=insexec elseif ... insdecode (Instruction Decode) see the instruction unit sections for elseif continuations else unimplemented opcode, not tested for, FSM simply hangs in the end all opcodes will be accounted for, until then avoid in state insexec (Instruction Execute), continued from Irma insexec elseif IR.OP=011000mmm atestcai (Atest Compare Immediate) MAM-Mux=IR.AC # 1st operand C(AC) Imm-Mux=E # 2nd operand 0,,E PC-Mux=PC+1 # skip if doit # apply "tt:sub" and "mmm" test ClkE-PC=1 state=insget # we are done elseif IR.OP=011001mmm atestcam (Atest Compare Memory) MAM-Mux=MA # 2nd operand C(MA) ClkE-AR=1 # store to AR state=atestseccam # get second operand and test elseif IR.OP=011tt0mmm atestjump (Atest Zero/AddOne/SubOne and Jump) MAM-Mux=IR.AC # 1st operand C(AC) PC-Mux=MA # jump to 0,,E if doit # apply "tt" and "mmm" test ClkE-PC=1 if IR.OP=0111t0mmm # AOJ/SOJ ClkE-atestAR=1 # store to atestAR state=atestwracc # and write back to C(AC) else state=insget # we are done elseif IR.OP=011tt1mmm atestskip (Atest Zero/AddOne/SubOne and Skip) MAM-Mux=MA # 1st operand C(MA) PC-Mux=PC+1 # skip if doit # apply "tt" and "mmm" test ClkE-PC=1 if IR.OP=0111t1mmm # AOS/SOS ClkE-atestAR=1 # store to atestAR state=atestwrmem # write back to C(MA) if IR.AC # with write to C(AC) ClkE-atestAR=1 # store "second" copy to atestAR state=atestwracc # write also to C(AC) else state=insget # we are done in state atestseccam (Atest Compare Acc Mem second fetch) MAM-Mux=IR.AC # 1st operand C(AC) Imm-Mux=AR # 2nd operand from AR PC-Mux=PC+1 # skip if doit # apply "tt:sub" and "mmm" test ClkE-PC=1 state=insget # we are done in state atestwracc (Atest Write Result to Accumulator) MAM-Mux=IR.AC MD-Mux=atest ClkE-Mem=1 state=insget # we are done in state atestwrmem (Atest Write Result to Memory) MAM-Mux=IR.MA MD-Mux=atest ClkE-Mem=1 if IR.AC # with write to C(AC) state=atestwracc # write back to C(MA) else # was AOJ/SOJ or SKIP with AC, done state=insget # we are done in state insexec (Instruction Execute), continued from Irma insexec elseif IR.OP=100ffff01 logicimmed (Logic from Immediate) MAM-Mux=IR.AC # 1st operand C(AC) Imm-Mux=E # 2nd operand 0,,E ClkE-logicAR=1 # apply "ffff", store to logicAR state=logicstoac # store logicAR to C(AC) elseif IR.OP=100ffffmm logicmem (Logic from Memory) MAM-Mux=MA # 2nd operand C(MA) ClkE-AR=1 # store to AR state=logicsecmem # get second operand and operate in state logicsecmem (Logic Second from Memory) MAM-Mux=IR.AC # 1st operand C(AC) Imm-Mux=AR # 2nd operand from AR ClkE-logicAR=1 # apply "ffff", store to logicAR if IR.OP=100ffff10 # memory mode state=logicstomem # store logicAR to C(MA) else state=logicstoac # store logicAR to C(AC) in state logicstoac (Logic Store to Accumulator) MAM-Mux=IR.AC MD-Mux=logic ClkE-Mem=1 if IR.OP=100ffff11 # both mode state=logicstomem # store logicAR also to C(MA) else state=insget # we are done in state logicstomem (Logic Store to Memory) MAM-Mux=MA MD-Mux=logic ClkE-Mem=1 state=insget # we are done in state insexec (Instruction Execute), continued from Irma insexec elseif IR.OP=101toot01 hwordimmed (Hword from Immediate) Imm-Mux=E # 1st operand 0,,E MAM-Mux=IR.AC # 2nd operand C(AC) ClkE-hwordAR=1 # apply "toot", store to hwordAR state=hwordstoac # store hwordAR to C(AC) elseif IR.OP=101toot10 hwordac (Hword from Accumulator) MAM-Mux=IR.AC # 1st operand C(AC) ClkE-AR=1 # store to AR state=hwordsecmem # get second operand and operate elseif IR.OP=101tootmm hwordmem (Hword from Memory) MAM-Mux=MA # 1st operand C(MA) ClkE-AR=1 # store to AR if IR.OP=101toot11 # self mode, second also memory state=hwordsecmem # get second operand and operate else state=hwordsecac # get second operand and operate in state hwordsecmem (Hword Second from Memory) Imm-Mux=AR # 1st operand from AR MAM-Mux=MA # 2nd operand C(MA) ClkE-hwordAR=1 # apply "toot", store to hwordAR state=hwordstomem # store hwordAR to C(MA) in state hwordsecac (Hword Second from Accumulator) Imm-Mux=AR # 1st operand from AR MAM-Mux=IR.AC # 2nd operand C(AC) ClkE-hwordAR=1 # apply "toot", store to hwordAR state=hwordstoac # store hwordAR only to C(AC) in state hwordstomem (Hword Store to Memory) MAM-Mux=MA MD-Mux=hword ClkE-Mem=1 if IR.OP=101toot11 and IR.AC # self mode, second also C(AC) state=hwordstoac # store hwordAR also to C(MA) else state=insget # we are done in state hwordstoac (Hword Store to Accumulator) MAM-Mux=IR.AC MD-Mux=hword ClkE-Mem=1 state=insget # we are done in state insexec (Instruction Execute), continued from Irma insexec elseif IR.OP=110oo0mma btestimmed (Btest from Immediate) MAM-Mux=IR.AC # 1st operand C(AC) Imm-Mux=E # 2nd operand 0,,E PC-Mux=PC+1 # skip if doit # apply "sub" and test ClkE-PC=1 if IR.OP=11000amma state=insget # we are done else ClkE-btestAR=1 # apply "aao", store to btestAR state=bteststoac elseif IR.OP=110oo1mma btestmem (Btest from Memory) MAM-Mux=MA # 2nd operand C(MA) ClkE-AR=1 # store to AR state=btestsecmem # get second operand and test in state btestsecmem (Btest Second from Memory) MAM-Mux=IR.AC # 1st operand C(AC) Imm-Mux=AR # 2nd operand from AR PC-Mux=PC+1 # skip if doit # apply "sub" and test ClkE-PC=1 if IR.OP=11000amma state=insget # we are done else ClkE-btestAR=1 # apply "aao", store to btestAR state=bteststoac in state bteststoac (Btest Store to Accumulator) MAM-Mux=IR.AC MD-Mux=btest ClkE-Mem=1 state=insget # we are done